beep.hif

买的开发板上自带的例程

-1
3
q_a11
-1
3
q_a10
-1
3
q_a1
-1
3
q_a0
-1
3
data_b9
-1
3
data_b8
-1
3
data_b7
-1
3
data_b6
-1
3
data_b5
-1
3
data_b4
-1
3
data_b31
-1
3
data_b30
-1
3
data_b3
-1
3
data_b29
-1
3
data_b28
-1
3
data_b27
-1
3
data_b26
-1
3
data_b25
-1
3
data_b24
-1
3
data_b23
-1
3
data_b22
-1
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data_b21
-1
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data_b20
-1
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data_b2
-1
3
data_b19
-1
3
data_b18
-1
3
data_b17
-1
3
data_b16
-1
3
data_b15
-1
3
data_b14
-1
3
data_b13
-1
3
data_b12
-1
3
data_b11
-1
3
data_b10
-1
3
data_b1
-1
3
data_b0
-1
3
data_a9
-1
3
data_a8
-1
3
data_a7
-1
3
data_a6
-1
3
data_a5
-1
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data_a4
-1
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data_a31
-1
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data_a30
-1
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data_a3
-1
3
data_a29
-1
3
data_a28
-1
3
data_a27
-1
3
data_a26
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data_a25
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data_a24
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3
data_a23
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3
data_a22
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3
data_a21
-1
3
data_a20
-1
3
data_a2
-1
3
data_a19
-1
3
data_a18
-1
3
data_a17
-1
3
data_a16
-1
3
data_a15
-1
3
data_a14
-1
3
data_a13
-1
3
data_a12
-1
3
data_a11
-1
3
data_a10
-1
3
data_a1
-1
3
data_a0
-1
3
clocken1
-1
3
clocken0
-1
3
clock1
-1
3
clock0
-1
3
byteena_a3
-1
3
byteena_a2
-1
3
byteena_a1
-1
3
byteena_a0
-1
3
address_b7
-1
3
address_b6
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b1
-1
3
address_b0
-1
3
address_a7
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# include_file {
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
c22bfd353214c01495b560fc34e47d79
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
2263a3bdfffeb150af977ee13902f70
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
60d229340bc3c24acb0a137b4849830
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
d4e3a69a331d3a99d3281790d99a1ebd
d:|altera|72|quartus|libraries|megafunctions|altram.inc
e66a83eccf6717bed97c99d891ad085
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
99d442b5b66c88db4daf94d99c6e4e77
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
74e08939f96a7ea8e7a4d59a5b01fe7
}
# hierarchies {
beep_cup:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_ocimem:the_cpu_0_nios2_ocimem|cpu_0_ociram_lpm_dram_bdp_component_module:cpu_0_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram
}
# lmf
d:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram_c572
# storage
db|beep.(15).cnf
db|beep.(15).cnf
# case_insensitive
# source_file
db|altsyncram_c572.tdf
70b3dd23e30a44bf79f41a2b86c447d
6
# used_port {
wren_b
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3
wren_a
-1
3
q_b9
-1
3
q_b8
-1
3
q_b7
-1
3
q_b6
-1
3
q_b5
-1
3
q_b4
-1
3
q_b31
-1
3
q_b30
-1
3
q_b3
-1
3
q_b29
-1
3
q_b28
-1
3
q_b27
-1
3
q_b26
-1
3
q_b25
-1
3
q_b24
-1
3
q_b23
-1
3
q_b22
-1
3
q_b21
-1
3
q_b20
-1
3
q_b2
-1
3
q_b19
-1
3
q_b18
-1
3
q_b17
-1
3
q_b16
-1
3
q_b15
-1
3
q_b14
-1
3
q_b13
-1
3
q_b12
-1
3
q_b11
-1
3
q_b10
-1
3
q_b1
-1
3
q_b0
-1
3
q_a9
-1
3
q_a8
-1
3
q_a7
-1
3
q_a6
-1
3
q_a5
-1
3
q_a4
-1
3
q_a31
-1
3
q_a30
-1
3
q_a3
-1
3
q_a29
-1
3
q_a28
-1
3
q_a27
-1
3
q_a26
-1
3
q_a25
-1
3
q_a24
-1
3
q_a23
-1
3
q_a22
-1
3
q_a21
-1
3
q_a20
-1
3
q_a2
-1
3
q_a19
-1
3
q_a18
-1
3
q_a17
-1
3
q_a16
-1
3
q_a15
-1
3
q_a14
-1
3
q_a13
-1
3
q_a12
-1
3
q_a11
-1
3
q_a10
-1
3
q_a1
-1
3
q_a0
-1
3
data_b9
-1
3
data_b8
-1
3
data_b7
-1
3
data_b6
-1
3
data_b5
-1
3
data_b4
-1
3
data_b31
-1
3
data_b30
-1
3
data_b3
-1
3
data_b29
-1
3
data_b28
-1
3
data_b27
-1
3
data_b26
-1
3
data_b25
-1
3
data_b24
-1
3
data_b23
-1
3
data_b22
-1
3
data_b21
-1
3
data_b20
-1
3
data_b2
-1
3
data_b19
-1
3
data_b18
-1
3
data_b17
-1
3
data_b16
-1
3
data_b15
-1
3
data_b14
-1
3
data_b13
-1
3
data_b12
-1
3
data_b11
-1
3
data_b10
-1
3
data_b1
-1
3
data_b0
-1
3
data_a9
-1
3
data_a8
-1
3
data_a7
-1
3
data_a6
-1
3
data_a5
-1
3
data_a4
-1
3
data_a31
-1
3
data_a30
-1
3
data_a3
-1
3
data_a29
-1
3
data_a28
-1
3
data_a27
-1
3
data_a26
-1
3
data_a25
-1
3
data_a24
-1
3
data_a23
-1
3
data_a22
-1
3
data_a21
-1
3
data_a20
-1
3
data_a2
-1
3
data_a19
-1
3
data_a18
-1
3
data_a17
-1
3
data_a16
-1
3
data_a15
-1
3
data_a14
-1
3
data_a13
-1
3
data_a12
-1
3
data_a11
-1
3
data_a10
-1
3
data_a1
-1
3
data_a0
-1
3
clocken1
-1
3
clocken0
-1
3
clock1
-1
3
clock0
-1
3
byteena_a3
-1
3
byteena_a2
-1
3
byteena_a1
-1
3
byteena_a0
-1
3
address_b7
-1
3
address_b6
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b1
-1
3
address_b0
-1
3
address_a7
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# memory_file {
cpu_0_ociram_default_contents.mif
6482bc31d5ad12b61cecfff4c4d
}
# hierarchies {
beep_cup:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_ocimem:the_cpu_0_nios2_ocimem|cpu_0_ociram_lpm_dram_bdp_component_module:cpu_0_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_c572:auto_generated
}
# lmf
d:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
cpu_0_nios2_avalon_reg
# storage
db|beep.(16).cnf
db|beep.(16).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
cpu_0.vhd
68d1c42abf36541c69f6a8e443c1a85
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
 constraint(address)
8 downto 0
PARAMETER_STRING
USR
 constraint(writedata)
31 downto 0
PARAMETER_STRING
USR
 constraint(oci_ienable)
31 downto 0
PARAMETER_STRING
USR
 constraint(oci_reg_readdata)
31 downto 0
PARAMETER_STRING
USR
}
# include_file {
altera_vhdl_support.vhd
534dfcf4982d9e2da8ea40f5168a306c
}
# hierarchies {
beep_cup:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_avalon_reg:the_cpu_0_nios2_avalon_reg
}
# lmf
d:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
cpu_0_nios2_oci_break
# storage
db|beep.(17).cnf
db|beep.(17).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
cpu_0.vhd
68d1c42abf36541c69f6a8e443c1a85
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
 constraint(jdo)
37 downto 0
PARAMETER_STRING
USR
 constraint(break_readreg)
31 downto 0
PARAMETER_STRING
USR
 constraint(dbrk0)
77 downto 0
PARAMETER_STRING
USR
 constraint(dbrk1)
77 downto 0
PARAMETER_STRING
USR
 constraint(dbrk2)
77 downto 0
PARAMETER_STRING
USR
 constraint(dbrk3)
77 downto 0
PARAMETER_STRING
USR
 constraint(xbrk0)
13 downto 0
PARAMETER_STRING
USR
 constraint(xbrk1)
13 downto 0
PARAMETER_STRING
USR
 constraint(xbrk2)
13 downto 0
PARAMETER_STRING
USR
 constraint(xbrk3)
13 downto 0
PARAMETER_STRING
USR
 constraint(xbrk_ctrl0)
7 downto 0
PARAMETER_STRING
USR
 constraint(xbrk_ctrl1)
7 downto 0
PARAMETER_STRING
USR
 constraint(xbrk_ctrl2)
7 downto 0
PARAMETER_STRING
USR
 constraint(xbrk_ctrl3)
7 downto 0
PARAMETER_STRING
USR
}
# include_file {
altera_vhdl_support.vhd
534dfcf4982d9e2da8ea40f5168a306c
}
# hierarchies {
beep_cup:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_oci_break:the_cpu_0_nios2_oci_break
}
# lmf
d:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
cpu_0_nios2_oci_xbrk
# storage
db|beep.(18).cnf
db|beep.(18).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
cpu_0.vhd
68d1c42abf36541c69f6a8e443c1a85
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
 constraint(f_pc)
11 downto 0
PARAMETER_STRING
USR
 constraint(xbrk0)
13 downto 0
PARAMETER_STRING
USR
 constraint(xbrk1)
13 downto 0
PARAMETER_STRING
USR
 constraint(xbrk2)
13 downto 0
PARAMETER_STRING
USR
 constraint(xbrk3)
13 downto 0
PARAMETER_STRING
USR
 constraint(xbrk_ctrl0)
7 downto 0
PARAMETER_STRING
USR
 constraint(xbrk_ctrl1)
7 downto 0
PARAMETER_STRING
USR
 constraint(xbrk_ctrl2)
7 downto 0
PARAMETER_STRING
USR
 constraint(xbrk_ctrl3)
7 downto 0
PARAMETER_STRING
USR
}
# include_file {
altera_vhdl_support.vhd
534dfcf4982d9e2da8ea40f5168a306c
}
# hierarchies {
beep_cup:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_oci_xbrk:the_cpu_0_nios2_oci_xbrk
}
# lmf
d:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
cpu_0_nios2_oci_dbrk
# storage
db|beep.(19).cnf
db|beep.(19).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
cpu_0.vhd
68d1c42abf36541c69f6a8e443c1a85
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
 constraint(e_st_data)
31 downto 0
PARAMETER_STRING
USR
 constraint(av_ld_data_aligned_filtered)
31 downto 0
PARAMETER_STRING
USR
 constraint(d_address)
13 downto 0
PARAMETER_STRING
USR
 constraint(dbrk0)
77 downto 0
PARAMETER_STRING
USR
 constraint(dbrk1)
77 downto 0
PARAMETER_STRING
USR
 constraint(dbrk2)
77 downto 0
PARAMETER_STRING
USR
 constraint(dbrk3)
77 downto 0
PARAMETER_STRING
USR
 constraint(cpu_d_address)
13 downto 0
PARAMETER_STRING
USR
 constraint(cpu_d_readdata)
31 downto 0
PARAMETER_STRING
USR
 constraint(cpu_d_writedata)
31 downto 0
PARAMETER_STRING
USR
}
# include_file {
altera_vhdl_support.vhd
534dfcf4982d9e2da8ea40f5168a306c
}
# hierarchies {
beep_cup:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_oci_dbrk:the_cpu_0_nios2_oci_dbrk
}
# lmf
d:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
cpu_0_nios2_oci_match_paired
# storage
db|beep.(20).cnf
db|beep.(20).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
cpu_0.vhd
68d1c42abf36541c69f6a8e443c1a85
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
 constraint(addr)
13 downto 0
PARAMETER_STRING
USR
 constraint(data)
31 downto 0
PARAMETER_STRING
USR
 constraint(dbrka)
70 downto 0
PARAMETER_STRING
USR
 constraint(dbrkb)
70 downto 0
PARAMETER_STRING
USR
}
# include_file {
altera_vhdl_support.vhd
534dfcf4982d9e2da8ea40f5168a306c
}
# hierarchies {
beep_cup:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_oci_dbrk:the_cpu_0_nios2_oci_dbrk|cpu_0_nios2_oci_match_paired:cpu_0_nios2_oci_dbrk_hit0_match_paired
beep_cup:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_oci_dbrk:the_cpu_0_nios2_oci_dbrk|cpu_0_nios2_oci_match_paired:cpu_0_nios2_oci_dbrk_hit2_match_paired
}
# lmf
d:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
cpu_0_nios2_oci_match_single
# storage
db|beep.(21).cnf