beep.hier_info

买的开发板上自带的例程

d1_onchip_memory_0_s1_end_xfer => ~NO_FANOUT~
onchip_memory_0_s1_readdata_from_sa[0] => cpu_0_instruction_master_readdata~32.IN1
onchip_memory_0_s1_readdata_from_sa[1] => cpu_0_instruction_master_readdata~33.IN1
onchip_memory_0_s1_readdata_from_sa[2] => cpu_0_instruction_master_readdata~34.IN1
onchip_memory_0_s1_readdata_from_sa[3] => cpu_0_instruction_master_readdata~35.IN1
onchip_memory_0_s1_readdata_from_sa[4] => cpu_0_instruction_master_readdata~36.IN1
onchip_memory_0_s1_readdata_from_sa[5] => cpu_0_instruction_master_readdata~37.IN1
onchip_memory_0_s1_readdata_from_sa[6] => cpu_0_instruction_master_readdata~38.IN1
onchip_memory_0_s1_readdata_from_sa[7] => cpu_0_instruction_master_readdata~39.IN1
onchip_memory_0_s1_readdata_from_sa[8] => cpu_0_instruction_master_readdata~40.IN1
onchip_memory_0_s1_readdata_from_sa[9] => cpu_0_instruction_master_readdata~41.IN1
onchip_memory_0_s1_readdata_from_sa[10] => cpu_0_instruction_master_readdata~42.IN1
onchip_memory_0_s1_readdata_from_sa[11] => cpu_0_instruction_master_readdata~43.IN1
onchip_memory_0_s1_readdata_from_sa[12] => cpu_0_instruction_master_readdata~44.IN1
onchip_memory_0_s1_readdata_from_sa[13] => cpu_0_instruction_master_readdata~45.IN1
onchip_memory_0_s1_readdata_from_sa[14] => cpu_0_instruction_master_readdata~46.IN1
onchip_memory_0_s1_readdata_from_sa[15] => cpu_0_instruction_master_readdata~47.IN1
onchip_memory_0_s1_readdata_from_sa[16] => cpu_0_instruction_master_readdata~48.IN1
onchip_memory_0_s1_readdata_from_sa[17] => cpu_0_instruction_master_readdata~49.IN1
onchip_memory_0_s1_readdata_from_sa[18] => cpu_0_instruction_master_readdata~50.IN1
onchip_memory_0_s1_readdata_from_sa[19] => cpu_0_instruction_master_readdata~51.IN1
onchip_memory_0_s1_readdata_from_sa[20] => cpu_0_instruction_master_readdata~52.IN1
onchip_memory_0_s1_readdata_from_sa[21] => cpu_0_instruction_master_readdata~53.IN1
onchip_memory_0_s1_readdata_from_sa[22] => cpu_0_instruction_master_readdata~54.IN1
onchip_memory_0_s1_readdata_from_sa[23] => cpu_0_instruction_master_readdata~55.IN1
onchip_memory_0_s1_readdata_from_sa[24] => cpu_0_instruction_master_readdata~56.IN1
onchip_memory_0_s1_readdata_from_sa[25] => cpu_0_instruction_master_readdata~57.IN1
onchip_memory_0_s1_readdata_from_sa[26] => cpu_0_instruction_master_readdata~58.IN1
onchip_memory_0_s1_readdata_from_sa[27] => cpu_0_instruction_master_readdata~59.IN1
onchip_memory_0_s1_readdata_from_sa[28] => cpu_0_instruction_master_readdata~60.IN1
onchip_memory_0_s1_readdata_from_sa[29] => cpu_0_instruction_master_readdata~61.IN1
onchip_memory_0_s1_readdata_from_sa[30] => cpu_0_instruction_master_readdata~62.IN1
onchip_memory_0_s1_readdata_from_sa[31] => cpu_0_instruction_master_readdata~63.IN1
reset_n => ~NO_FANOUT~
cpu_0_instruction_master_address_to_slave[0] <= cpu_0_instruction_master_address[0].DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_address_to_slave[1] <= cpu_0_instruction_master_address[1].DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_address_to_slave[2] <= cpu_0_instruction_master_address[2].DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_address_to_slave[3] <= cpu_0_instruction_master_address[3].DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_address_to_slave[4] <= cpu_0_instruction_master_address[4].DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_address_to_slave[5] <= cpu_0_instruction_master_address[5].DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_address_to_slave[6] <= cpu_0_instruction_master_address[6].DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_address_to_slave[7] <= cpu_0_instruction_master_address[7].DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_address_to_slave[8] <= cpu_0_instruction_master_address[8].DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_address_to_slave[9] <= cpu_0_instruction_master_address[9].DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_address_to_slave[10] <= cpu_0_instruction_master_address[10].DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_address_to_slave[11] <= cpu_0_instruction_master_address[11].DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_address_to_slave[12] <= cpu_0_instruction_master_address[12].DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_address_to_slave[13] <= cpu_0_instruction_master_address[13].DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[0] <= cpu_0_instruction_master_readdata~64.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[1] <= cpu_0_instruction_master_readdata~65.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[2] <= cpu_0_instruction_master_readdata~66.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[3] <= cpu_0_instruction_master_readdata~67.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[4] <= cpu_0_instruction_master_readdata~68.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[5] <= cpu_0_instruction_master_readdata~69.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[6] <= cpu_0_instruction_master_readdata~70.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[7] <= cpu_0_instruction_master_readdata~71.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[8] <= cpu_0_instruction_master_readdata~72.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[9] <= cpu_0_instruction_master_readdata~73.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[10] <= cpu_0_instruction_master_readdata~74.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[11] <= cpu_0_instruction_master_readdata~75.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[12] <= cpu_0_instruction_master_readdata~76.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[13] <= cpu_0_instruction_master_readdata~77.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[14] <= cpu_0_instruction_master_readdata~78.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[15] <= cpu_0_instruction_master_readdata~79.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[16] <= cpu_0_instruction_master_readdata~80.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[17] <= cpu_0_instruction_master_readdata~81.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[18] <= cpu_0_instruction_master_readdata~82.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[19] <= cpu_0_instruction_master_readdata~83.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[20] <= cpu_0_instruction_master_readdata~84.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[21] <= cpu_0_instruction_master_readdata~85.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[22] <= cpu_0_instruction_master_readdata~86.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[23] <= cpu_0_instruction_master_readdata~87.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[24] <= cpu_0_instruction_master_readdata~88.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[25] <= cpu_0_instruction_master_readdata~89.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[26] <= cpu_0_instruction_master_readdata~90.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[27] <= cpu_0_instruction_master_readdata~91.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[28] <= cpu_0_instruction_master_readdata~92.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[29] <= cpu_0_instruction_master_readdata~93.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[30] <= cpu_0_instruction_master_readdata~94.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_readdata[31] <= cpu_0_instruction_master_readdata~95.DB_MAX_OUTPUT_PORT_TYPE
cpu_0_instruction_master_waitrequest <= r_0.DB_MAX_OUTPUT_PORT_TYPE


|beep|beep_cup:inst|cpu_0:the_cpu_0
clk => cpu_0_rf_module:cpu_0_rf.clock1
clk => cpu_0_rf_module:cpu_0_rf.clock0
clk => F_pc[11].CLK
clk => F_pc[10].CLK
clk => F_pc[9].CLK
clk => F_pc[8].CLK
clk => F_pc[7].CLK
clk => F_pc[6].CLK
clk => F_pc[5].CLK
clk => F_pc[4].CLK
clk => F_pc[3].CLK
clk => F_pc[2].CLK
clk => F_pc[1].CLK
clk => F_pc[0].CLK
clk => internal_i_read.CLK
clk => wait_for_one_post_bret_inst.CLK
clk => hbreak_pending.CLK
clk => D_iw[31].CLK
clk => D_iw[30].CLK
clk => D_iw[29].CLK
clk => D_iw[28].CLK
clk => D_iw[27].CLK
clk => D_iw[26].CLK
clk => D_iw[25].CLK
clk => D_iw[24].CLK
clk => D_iw[23].CLK
clk => D_iw[22].CLK
clk => D_iw[21].CLK
clk => D_iw[20].CLK
clk => D_iw[19].CLK
clk => D_iw[18].CLK
clk => D_iw[17].CLK
clk => D_iw[16].CLK
clk => D_iw[15].CLK
clk => D_iw[14].CLK
clk => D_iw[13].CLK
clk => D_iw[12].CLK
clk => D_iw[11].CLK
clk => D_iw[10].CLK
clk => D_iw[9].CLK
clk => D_iw[8].CLK
clk => D_iw[7].CLK
clk => D_iw[6].CLK
clk => D_iw[5].CLK
clk => D_iw[4].CLK
clk => D_iw[3].CLK
clk => D_iw[2].CLK
clk => D_iw[1].CLK
clk => D_iw[0].CLK
clk => D_valid.CLK
clk => R_valid.CLK
clk => R_wr_dst_reg.CLK
clk => R_dst_regnum[4].CLK
clk => R_dst_regnum[3].CLK
clk => R_dst_regnum[2].CLK
clk => R_dst_regnum[1].CLK
clk => R_dst_regnum[0].CLK
clk => R_logic_op[1].CLK
clk => R_logic_op[0].CLK
clk => R_compare_op[1].CLK
clk => R_compare_op[0].CLK
clk => R_src2_use_imm.CLK
clk => E_valid.CLK
clk => E_new_inst.CLK
clk => E_src1[31].CLK
clk => E_src1[30].CLK
clk => E_src1[29].CLK
clk => E_src1[28].CLK
clk => E_src1[27].CLK
clk => E_src1[26].CLK
clk => E_src1[25].CLK
clk => E_src1[24].CLK
clk => E_src1[23].CLK
clk => E_src1[22].CLK
clk => E_src1[21].CLK
clk => E_src1[20].CLK
clk => E_src1[19].CLK
clk => E_src1[18].CLK
clk => E_src1[17].CLK
clk => E_src1[16].CLK
clk => E_src1[15].CLK
clk => E_src1[14].CLK
clk => E_src1[13].CLK
clk => E_src1[12].CLK
clk => E_src1[11].CLK
clk => E_src1[10].CLK
clk => E_src1[9].CLK
clk => E_src1[8].CLK
clk => E_src1[7].CLK
clk =