beep.map.eqn

买的开发板上自带的例程

--E1_D_iw[18] is beep_cup:inst|cpu_0:the_cpu_0|D_iw[18]
E1_D_iw[18] = AMPP_FUNCTION(clk, E1L800, D1_data_out, E1_F_valid);


--U1_q_a[12] is beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_r0r1:auto_generated|q_a[12]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
U1_q_a[12] = AMPP_FUNCTION(E1_W_rf_wren_a, E1_module_input3, clk, clk, E1_W_alu_result[12], E1L879, E1L880, E1L881, E1L882, E1L883, E1_av_ld_byte1_data[4], E1_D_iw[22], E1_D_iw[23], E1_D_iw[24], E1_D_iw[25], E1_D_iw[26]);

--U1_q_b[12] is beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_r0r1:auto_generated|q_b[12]
U1_q_b[12] = AMPP_FUNCTION(E1_W_rf_wren_a, E1_module_input3, clk, clk, E1_W_alu_result[12], E1L879, E1L880, E1L881, E1L882, E1L883, E1_av_ld_byte1_data[4], E1_D_iw[22], E1_D_iw[23], E1_D_iw[24], E1_D_iw[25], E1_D_iw[26]);


--E1L953 is beep_cup:inst|cpu_0:the_cpu_0|R_src2_lo[12]~1122
E1L953 = AMPP_FUNCTION(E1_D_iw[18], U1_q_b[12], E1_R_src2_use_imm, E1L957);


--E1L651 is beep_cup:inst|cpu_0:the_cpu_0|E_src1[12]~74
E1L651 = AMPP_FUNCTION(E1_D_iw[16], U1_q_a[12], E1L937);


--U1_q_a[11] is beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_r0r1:auto_generated|q_a[11]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
U1_q_a[11] = AMPP_FUNCTION(E1_W_rf_wren_a, E1_module_input3, clk, clk, E1_W_alu_result[11], E1L879, E1L880, E1L881, E1L882, E1L883, E1_av_ld_byte1_data[3], E1_D_iw[22], E1_D_iw[23], E1_D_iw[24], E1_D_iw[25], E1_D_iw[26]);

--U1_q_b[11] is beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_r0r1:auto_generated|q_b[11]
U1_q_b[11] = AMPP_FUNCTION(E1_W_rf_wren_a, E1_module_input3, clk, clk, E1_W_alu_result[11], E1L879, E1L880, E1L881, E1L882, E1L883, E1_av_ld_byte1_data[3], E1_D_iw[22], E1_D_iw[23], E1_D_iw[24], E1_D_iw[25], E1_D_iw[26]);


--E1L952 is beep_cup:inst|cpu_0:the_cpu_0|R_src2_lo[11]~1123
E1L952 = AMPP_FUNCTION(E1_D_iw[17], U1_q_b[11], E1_R_src2_use_imm, E1L957);


--E1L648 is beep_cup:inst|cpu_0:the_cpu_0|E_src1[11]~75
E1L648 = AMPP_FUNCTION(E1_D_iw[15], U1_q_a[11], E1L937);


--U1_q_a[10] is beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_r0r1:auto_generated|q_a[10]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
U1_q_a[10] = AMPP_FUNCTION(E1_W_rf_wren_a, E1_module_input3, clk, clk, E1_W_alu_result[10], E1L879, E1L880, E1L881, E1L882, E1L883, E1_av_ld_byte1_data[2], E1_D_iw[22], E1_D_iw[23], E1_D_iw[24], E1_D_iw[25], E1_D_iw[26]);

--U1_q_b[10] is beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_r0r1:auto_generated|q_b[10]
U1_q_b[10] = AMPP_FUNCTION(E1_W_rf_wren_a, E1_module_input3, clk, clk, E1_W_alu_result[10], E1L879, E1L880, E1L881, E1L882, E1L883, E1_av_ld_byte1_data[2], E1_D_iw[22], E1_D_iw[23], E1_D_iw[24], E1_D_iw[25], E1_D_iw[26]);


--E1L951 is beep_cup:inst|cpu_0:the_cpu_0|R_src2_lo[10]~1124
E1L951 = AMPP_FUNCTION(E1_D_iw[16], U1_q_b[10], E1_R_src2_use_imm, E1L957);


--E1L645 is beep_cup:inst|cpu_0:the_cpu_0|E_src1[10]~76
E1L645 = AMPP_FUNCTION(E1_D_iw[14], U1_q_a[10], E1L937);


--U1_q_a[9] is beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_r0r1:auto_generated|q_a[9]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
U1_q_a[9] = AMPP_FUNCTION(E1_W_rf_wren_a, E1_module_input3, clk, clk, E1_W_alu_result[9], E1L879, E1L880, E1L881, E1L882, E1L883, E1_av_ld_byte1_data[1], E1_D_iw[22], E1_D_iw[23], E1_D_iw[24], E1_D_iw[25], E1_D_iw[26]);

--U1_q_b[9] is beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_r0r1:auto_generated|q_b[9]
U1_q_b[9] = AMPP_FUNCTION(E1_W_rf_wren_a, E1_module_input3, clk, clk, E1_W_alu_result[9], E1L879, E1L880, E1L881, E1L882, E1L883, E1_av_ld_byte1_data[1], E1_D_iw[22], E1_D_iw[23], E1_D_iw[24], E1_D_iw[25], E1_D_iw[26]);


--E1L950 is beep_cup:inst|cpu_0:the_cpu_0|R_src2_lo[9]~1125
E1L950 = AMPP_FUNCTION(E1_D_iw[15], U1_q_b[9], E1_R_src2_use_imm, E1L957);


--E1L642 is beep_cup:inst|cpu_0:the_cpu_0|E_src1[9]~77
E1L642 = AMPP_FUNCTION(E1_D_iw[13], U1_q_a[9], E1L937);


--U1_q_a[8] is beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_r0r1:auto_generated|q_a[8]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
U1_q_a[8] = AMPP_FUNCTION(E1_W_rf_wren_a, E1_module_input3, clk, clk, E1_W_alu_result[8], E1L879, E1L880, E1L881, E1L882, E1L883, E1_av_ld_byte1_data[0], E1_D_iw[22], E1_D_iw[23], E1_D_iw[24], E1_D_iw[25], E1_D_iw[26]);

--U1_q_b[8] is beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_r0r1:auto_generated|q_b[8]
U1_q_b[8] = AMPP_FUNCTION(E1_W_rf_wren_a, E1_module_input3, clk, clk, E1_W_alu_result[8], E1L879, E1L880, E1L881, E1L882, E1L883, E1_av_ld_byte1_data[0], E1_D_iw[22], E1_D_iw[23], E1_D_iw[24], E1_D_iw[25], E1_D_iw[26]);


--E1L949 is beep_cup:inst|cpu_0:the_cpu_0|R_src2_lo[8]~1126
E1L949 = AMPP_FUNCTION(E1_D_iw[14], U1_q_b[8], E1_R_src2_use_imm, E1L957);


--E1L639 is beep_cup:inst|cpu_0:the_cpu_0|E_src1[8]~78
E1L639 = AMPP_FUNCTION(E1_D_iw[12], U1_q_a[8], E1L937);


--U1_q_a[7] is beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_r0r1:auto_generated|q_a[7]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
U1_q_a[7] = AMPP_FUNCTION(E1_W_rf_wren_a, E1_module_input3, clk, clk, E1_W_alu_result[7], E1L879, E1L880, E1L881, E1L882, E1L883, E1_av_ld_byte0_data[7], E1_D_iw[22], E1_D_iw[23], E1_D_iw[24], E1_D_iw[25], E1_D_iw[26]);

--U1_q_b[7] is beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_r0r1:auto_generated|q_b[7]
U1_q_b[7] = AMPP_FUNCTION(E1_W_rf_wren_a, E1_module_input3, clk, clk, E1_W_alu_result[7], E1L879, E1L880, E1L881, E1L882, E1L883, E1_av_ld_byte0_data[7], E1_D_iw[22], E1_D_iw[23], E1_D_iw[24], E1_D_iw[25], E1_D_iw[26]);


--E1L948 is beep_cup:inst|cpu_0:the_cpu_0|R_src2_lo[7]~1127
E1L948 = AMPP_FUNCTION(E1_D_iw[13], U1_q_b[7], E1_R_src2_use_imm, E1L957);


--E1L636 is beep_cup:inst|cpu_0:the_cpu_0|E_src1[7]~79
E1L636 = AMPP_FUNCTION(E1_D_iw[11], U1_q_a[7], E1L937);


--U1_q_a[6] is beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_r0r1:auto_generated|q_a[6]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
U1_q_a[6] = AMPP_FUNCTION(E1_W_rf_wren_a, E1_module_input3, clk, clk, E1_W_alu_result[6], E1L879, E1L880, E1L881, E1L882, E1L883, E1_av_ld_byte0_data[6], E1_D_iw[22], E1_D_iw[23], E1_D_iw[24], E1_D_iw[25], E1_D_iw[26]);

--U1_q_b[6] is beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_r0r1:auto_generated|q_b[6]
U1_q_b[6] = AMPP_FUNCTION(E1_W_rf_wren_a, E1_module_input3, clk, clk, E1_W_alu_result[6], E1L879, E1L880, E1L881, E1L882, E1L883, E1_av_ld_byte0_data[6], E1_D_iw[22], E1_D_iw[23], E1_D_iw[24], E1_D_iw[25], E1_D_iw[26]);


--E1L947 is beep_cup:inst|cpu_0:the_cpu_0|R_src2_lo[6]~1128
E1L947 = AMPP_FUNCTION(E1_D_iw[12], U1_q_b[6], E1_R_src2_use_imm, E1L957);


--E1_D_iw[10] is beep_cup:inst|cpu_0:the_cpu_0|D_iw[10]
E1_D_iw[10] = AMPP_FUNCTION(clk, E1L783, D1_data_out, E1_F_valid);


--E1L633 is beep_cup:inst|cpu_0:the_cpu_0|E_src1[6]~80
E1L633 = AMPP_FUNCTION(E1_D_iw[10], U1_q_a[6], E1L937);


--U1_q_a[5] is beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_r0r1:auto_generated|q_a[5]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
U1_q_a[5] = AMPP_FUNCTION(E1_W_rf_wren_a, E1_module_input3, clk, clk, E1_W_alu_result[5], E1L879, E1L880, E1L881, E1L882, E1L883, E1_av_ld_byte0_data[5], E1_D_iw[22], E1_D_iw[23], E1_D_iw[24], E1_D_iw[25], E1_D_iw[26]);

--U1_q_b[5] is beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_r0r1:auto_generated|q_b[5]
U1_q_b[5] = AMPP_FUNCTION(E1_W_rf_wren_a, E1_module_input3, clk, clk, E1_W_alu_result[5], E1L879, E1L880, E1L881, E1L882, E1L883, E1_av_ld_byte0_data[5], E1_D_iw[22], E1_D_iw[23], E1_D_iw[24], E1_D_iw[25], E1_D_iw[26]);


--E1L946 is beep_cup:inst|cpu_0:the_cpu_0|R_src2_lo[5]~1129
E1L946 = AMPP_FUNCTION(E1_D_iw[11], U1_q_b[5], E1_R_src2_use_imm, E1L957);


--E1_D_iw[9] is beep_cup:inst|cpu_0:the_cpu_0|D_iw[9]
E1_D_iw[9] = AMPP_FUNCTION(clk, E1L781, D1_data_out, E1_F_valid);


--E1L630 is beep_cup:inst|cpu_0:the_cpu_0|E_src1[5]~81
E1L630 = AMPP_FUNCTION(E1_D_iw[9], U1_q_a[5], E1L937);


--U1_q_a[4] is beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_r0r1:auto_generated|q_a[4]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
U1_q_a[4] = AMPP_FUNCTION(E1_W_rf_wren_a, E1_module_input3, clk, clk, E1_W_alu_result[4], E1L879, E1L880, E1L881, E1L882, E1L883, E1_av_ld_byte0_data[4], E1_D_iw[22], E1_D_iw[23], E1_D_iw[24], E1_D_iw[25], E1_D_iw[26]);

--U1_q_b[4] is beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_r0r1:auto_generated|q_b[4]
U1_q_b[4] = AMPP_FUNCTION(E1_W_rf_wren_a, E1_module_input3, clk, clk, E1_W_alu_result[4], E1L879, E1L880, E1L881, E1L882, E1L883, E1_av_ld_byte0_data[4], E1_D_iw[22], E1_D_iw[23], E1_D_iw[24], E1_D_iw[25], E1_D_iw[26]);


--E1L945 is beep_cup:inst|cpu_0:the_cpu_0|R_src2_lo[4]~1130
E1L945 = AMPP_FUNCTION(E1_D_iw[10], U1_q_b[4], E1_R_src2_use_imm, E1L957);


--E1_D_iw[8] is beep_cup:inst|cpu_0:the_cpu_0|D_iw[8]
E1_D_iw[8] = AMPP_FUNCTION(clk, E1L779, D1_data_out, E1_F_valid);


--E1L627 is beep_cup:inst|cpu_0:the_cpu_0|E_src1[4]~82
E1L627 = AMPP_FUNCTION(E1_D_iw[8], U1_q_a[4], E1L937);


--U1_q_a[3] is beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_r0r1:auto_generated|q_a[3]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
U1_q_a[3] = AMPP_FUNCTION(E1_W_rf_wren_a, E1_module_input3, clk, clk, E1_W_alu_result[3], E1L879, E1L880, E1L881, E1L882, E1L883, E1_av_ld_byte0_data[3], E1_D_iw[22], E1_D_iw[23], E1_D_iw[24], E1_D_iw[25], E1_D_iw[26]);

--U1_q_b[3] is beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_r0r1:auto_generated|q_b[3]
U1_q_b[3] = AMPP_FUNCTION(E1_W_rf_wren_a, E1_module_input3, clk, clk, E1_W_alu_result[3], E1L879, E1L880, E1L881, E1L882, E1L883, E1_av_ld_byte0_data[3], E1_D_iw[22], E1_D_iw[23], E1_D_iw[24], E1_D_iw[25], E1_D_iw[26]);


--E1L944 is beep_cup:inst|cpu_0:the_cpu_0|R_src2_lo[3]~1131
E1L944 = AMPP_FUNCTION(E1_D_iw[9], U1_q_b[3], E1_R_src2_use_imm, E1L957);


--E1_D_iw[7] is beep_cup:inst|cpu_0:the_cpu_0|D_iw[7]
E1_D_iw[7] = AMPP_FUNCTION(clk, E1L777, D1_data_out, E1_F_valid);


--E1L624 is beep_cup:inst|cpu_0:the_cpu_0|E_src1[3]~71
E1L624 = AMPP_FUNCTION(E1_D_iw[7], U1_q_a[3], E1L937);


--U1_q_a[2] is beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_r0r1:auto_generated|q_a[2]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
U1_q_a[2] = AMPP_FUNCTION(E1_W_rf_wren_a, E1_module_input3, clk, clk, E1_W_alu_result[2], E1L879, E1L880, E1L881, E1L882, E1L883, E1_av_ld_byte0_data[2], E1_D_iw[22], E1_D_iw[23], E1_D_iw[24], E1_D_iw[25], E1_D_iw[26]);

--U1_q_b[2] is beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_r0r1:auto_generated|q_b[2]
U1_q_b[2] = AMPP_FUNCTION(E1_W_rf_wren_a, E1_module_input3, clk, clk, E1_W_alu_result[2], E1L879, E1L880, E1L881, E1L882, E1L883, E1_av_ld_byte0_data[2], E1_D_iw[22], E1_D_iw[23], E1_D_iw[24], E1_D_iw[25], E1_D_iw[26]);


--E1L943 is beep_cup:inst|cpu_0:the_cpu_0|R_src2_lo[2]~1132
E1L943 = AMPP_FUNCTION(E1_D_iw[8], U1_q_b[2], E1_R_src2_use_imm, E1L957);


--E1_D_iw[6] is beep_cup:inst|cpu_0:the_cpu_0|D_iw[6]
E1_D_iw[6] = AMPP_FUNCTION(clk, E1L775, D1_data_out, E1_F_valid);


--E1L621 is beep_cup:inst|cpu_0:the_cpu_0|E_src1[2]~72
E1L621 = AMPP_FUNCTION(E1_D_iw[6], U1_q_a[2], E1L937);


--U1_q_a[1] is beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_r0r1:auto_generated|q_a[1]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
U1_q_a[1] = AMPP_FUNCTION(E1_W_rf_wren_a, E1_module_input3, clk, clk, E1L1051, E1L879, E1L880, E1L881, E1L882, E1L883, E1_av_ld_byte0_data[1], E1_D_iw[22], E1_D_iw[23], E1_D_iw[24], E1_D_iw[25], E1_D_iw[26]);

--U1_q_b[1] is beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_r0r1:auto_generated|q_b[1]
U1_q_b[1] = AMPP_FUNCTION(E1_W_rf_wren_a, E1_module_input3, clk, clk, E1L1051, E1L879, E1L880, E1L881, E1L882, E1L883, E1_av_ld_byte0_data[1], E1_D_iw[22], E1_D_iw[23], E1_D_iw[24], E1_D_iw[25], E1_D_iw[26]);


--E1L942 is beep_cup:inst|cpu_0:the_cpu_0|R_src2_lo[1]~1133
E1L942 = AMPP_FUNCTION(E1_D_iw[7], U1_q_b[1], E1_R_src2_use_imm, E1L957);


--E1L941 is beep_cup:inst|cpu_0:the_cpu_0|R_src2_lo[0]~1134
E1L941 = AMPP_FUNCTION(E1_D_iw[6], U1_q_b[0], E1_R_src2_use_imm, E1L957);


--E1L284 is beep_cup:inst|cpu_0:the_cpu_0|D_ctrl_alu_subtract~343
E1L284 = AMPP_FUNCTION(E1_D_iw[14], E1_D_iw[15], E1_D_iw[11], E1_D_iw[16]);


--E1L285 is beep_cup:inst|cpu_0:the_cpu_0|D_ctrl_alu_subtract~344
E1L285 = AMPP_FUNCTION(A1L43, E1L284, E1_D_iw[13], E1_D_iw[12]);


--A1L44 is rtl~2932
A1L44 = A1L43 & !E1_D_iw[13] & !E1_D_iw[12] & !E1_D_iw[16];


--E1L286 is beep_cup:inst|cpu_0:the_cpu_0|D_ctrl_alu_subtract~345
E1L286 = AMPP_FUNCTION(E1_D_iw[11], E1_D_iw[14], E1_D_iw[15], A1L44);


--E1L481 is beep_cup:inst|cpu_0:the_cpu_0|E_alu_sub~0
E1L481 = AMPP_FUNCTION(E1_R_valid, E1L285, E1L287, E1L286);


--A1L45 is rtl~2933
A1L45 = E1_D_iw[13] & E1_D_iw[12] & A1L43 & !E1_D_iw[11];


--A1L28 is rtl~49
A1L28 = !E1_D_iw[0] & !E1_D_iw[1] & E1_D_iw[2] & !E1_D_iw[3];


--A1L27 is rtl~47
A1L27 = !E1_D_iw[0] & !E1_D_iw[1] & E1_D_iw[2] & E1_D_iw[3];


--E1L297 is beep_cup:inst|cpu_0:the_cpu_0|D_ctrl_dst_data_sel_logic_result~50
E1L297 = AMPP_FUNCTION(E1_D_iw[4], A1L28, A1L27);


--E1_D_ctrl_dst_data_sel_logic_result is beep_cup:inst|cpu_0:the_cpu_0|D_ctrl_dst_data_sel_logic_result
E1_D_ctrl_dst_data_sel_logic_result = AMPP_FUNCTION(A1L45, E1_D_iw[16], E1L297);


--E1_E_shift_rot_result[14] is beep_cup:inst|cpu_0:the_cpu_0|E_shift_rot_result[14]
E1_E_shift_rot_result[14] = AMPP_FUNCTION(clk, E1L599, E1_E_src1[14], D1_data_out, E1_E_new_inst);


--E1_R_ctrl_shift_rot_right is beep_cup:inst|cpu_0:the_cpu_0|R_ctrl_shift_rot_right
E1_R_ctrl_shift_rot_right = AMPP_FUNCTION(clk, E1L317, D1_data_out);


--E1L598 is beep_cup:inst|cpu_0:the_cpu_0|E_shift_rot_result_nxt[13]~412
E1L598 = AMPP_FUNCTION(E1_E_shift_rot_result[14], E1_E_shift_rot_result[12], E1_R_ctrl_shift_rot_right);


--E1L292 is beep_cup:inst|cpu_0:the_cpu_0|D_ctrl_dst_data_sel_cmp~298
E1L292 = AMPP_FUNCTION(A1L25, A1L24, E1_D_iw[4], E1_D_iw[5]);


--E1L293 is beep_cup:inst|cpu_0:the_cpu_0|D_ctrl_dst_data_sel_cmp~299