📄 beep.map.rpt
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+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity ;
+-------------------------------------------------------------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
; Compilation Hierarchy Node ; LC Combinationals ; LC Registers ; Memory Bits ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; Full Hierarchy Name ; Library Name ;
+-------------------------------------------------------------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
; |beep ; 1169 (1) ; 669 (0) ; 74752 ; 0 ; 0 ; 0 ; 7 ; 0 ; |beep ; ;
; |beep_cup:inst| ; 1086 (1) ; 606 (0) ; 74752 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst ; work ;
; |beep_cup_reset_clk_domain_synch_module:beep_cup_reset_clk_domain_synch| ; 0 (0) ; 2 (2) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|beep_cup_reset_clk_domain_synch_module:beep_cup_reset_clk_domain_synch ; work ;
; |cpu_0:the_cpu_0| ; 838 (599) ; 475 (299) ; 9216 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|cpu_0:the_cpu_0 ; work ;
; |cpu_0_nios2_oci:the_cpu_0_nios2_oci| ; 239 (24) ; 175 (0) ; 8192 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci ; work ;
; |cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper| ; 112 (0) ; 90 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper ; work ;
; |cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1| ; 112 (112) ; 90 (90) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1 ; work ;
; |cpu_0_nios2_avalon_reg:the_cpu_0_nios2_avalon_reg| ; 7 (7) ; 2 (2) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_avalon_reg:the_cpu_0_nios2_avalon_reg ; work ;
; |cpu_0_nios2_oci_break:the_cpu_0_nios2_oci_break| ; 33 (33) ; 32 (32) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_oci_break:the_cpu_0_nios2_oci_break ; work ;
; |cpu_0_nios2_oci_debug:the_cpu_0_nios2_oci_debug| ; 11 (11) ; 7 (7) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_oci_debug:the_cpu_0_nios2_oci_debug ; work ;
; |cpu_0_nios2_ocimem:the_cpu_0_nios2_ocimem| ; 52 (52) ; 44 (44) ; 8192 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_ocimem:the_cpu_0_nios2_ocimem ; work ;
; |cpu_0_ociram_lpm_dram_bdp_component_module:cpu_0_ociram_lpm_dram_bdp_component| ; 0 (0) ; 0 (0) ; 8192 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_ocimem:the_cpu_0_nios2_ocimem|cpu_0_ociram_lpm_dram_bdp_component_module:cpu_0_ociram_lpm_dram_bdp_component ; work ;
; |altsyncram:the_altsyncram| ; 0 (0) ; 0 (0) ; 8192 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_ocimem:the_cpu_0_nios2_ocimem|cpu_0_ociram_lpm_dram_bdp_component_module:cpu_0_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram ; work ;
; |altsyncram_c572:auto_generated| ; 0 (0) ; 0 (0) ; 8192 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_ocimem:the_cpu_0_nios2_ocimem|cpu_0_ociram_lpm_dram_bdp_component_module:cpu_0_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_c572:auto_generated ; work ;
; |cpu_0_rf_module:cpu_0_rf| ; 0 (0) ; 0 (0) ; 1024 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf ; work ;
; |altsyncram:the_altsyncram| ; 0 (0) ; 0 (0) ; 1024 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram ; work ;
; |altsyncram_b322:auto_generated| ; 0 (0) ; 0 (0) ; 1024 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_b322:auto_generated ; work ;
; |cpu_0_test_bench:the_cpu_0_test_bench| ; 0 (0) ; 1 (1) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|cpu_0:the_cpu_0|cpu_0_test_bench:the_cpu_0_test_bench ; work ;
; |cpu_0_data_master_arbitrator:the_cpu_0_data_master| ; 59 (59) ; 1 (1) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|cpu_0_data_master_arbitrator:the_cpu_0_data_master ; work ;
; |cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master ; work ;
; |cpu_0_jtag_debug_module_arbitrator:the_cpu_0_jtag_debug_module| ; 26 (26) ; 4 (4) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|cpu_0_jtag_debug_module_arbitrator:the_cpu_0_jtag_debug_module ; work ;
; |onchip_memory_0:the_onchip_memory_0| ; 1 (1) ; 0 (0) ; 65536 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|onchip_memory_0:the_onchip_memory_0 ; work ;
; |altsyncram:the_altsyncram| ; 0 (0) ; 0 (0) ; 65536 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|onchip_memory_0:the_onchip_memory_0|altsyncram:the_altsyncram ; work ;
; |altsyncram_28a1:auto_generated| ; 0 (0) ; 0 (0) ; 65536 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|onchip_memory_0:the_onchip_memory_0|altsyncram:the_altsyncram|altsyncram_28a1:auto_generated ; work ;
; |onchip_memory_0_s1_arbitrator:the_onchip_memory_0_s1| ; 25 (25) ; 3 (3) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|onchip_memory_0_s1_arbitrator:the_onchip_memory_0_s1 ; work ;
; |pio_beep:the_pio_beep| ; 3 (3) ; 1 (1) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|pio_beep:the_pio_beep ; work ;
; |timer_0:the_timer_0| ; 128 (128) ; 120 (120) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|timer_0:the_timer_0 ; work ;
; |timer_0_s1_arbitrator:the_timer_0_s1| ; 4 (4) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|beep_cup:inst|timer_0_s1_arbitrator:the_timer_0_s1 ; work ;
; |sld_hub:sld_hub_inst| ; 82 (31) ; 63 (7) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|sld_hub:sld_hub_inst ; work ;
; |lpm_decode:instruction_decoder| ; 5 (0) ; 5 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|sld_hub:sld_hub_inst|lpm_decode:instruction_decoder ; work ;
; |decode_aoi:auto_generated| ; 5 (5) ; 5 (5) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_aoi:auto_generated ; work ;
; |lpm_shiftreg:jtag_ir_register| ; 0 (0) ; 10 (10) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register ; work ;
; |sld_dffex:BROADCAST| ; 1 (1) ; 1 (1) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|sld_hub:sld_hub_inst|sld_dffex:BROADCAST ; work ;
; |sld_dffex:IRF_ENA_0| ; 1 (1) ; 1 (1) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0 ; work ;
; |sld_dffex:IRF_ENA| ; 0 (0) ; 1 (1) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|sld_hub:sld_hub_inst|sld_dffex:IRF_ENA ; work ;
; |sld_dffex:IRSR| ; 4 (4) ; 5 (5) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|sld_hub:sld_hub_inst|sld_dffex:IRSR ; work ;
; |sld_dffex:RESET| ; 1 (1) ; 1 (1) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|sld_hub:sld_hub_inst|sld_dffex:RESET ; work ;
; |sld_dffex:\GEN_IRF:1:IRF| ; 0 (0) ; 2 (2) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF ; work ;
; |sld_dffex:\GEN_SHADOW_IRF:1:S_IRF| ; 0 (0) ; 2 (2) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|sld_hub:sld_hub_inst|sld_dffex:\GEN_SHADOW_IRF:1:S_IRF ; work ;
; |sld_jtag_state_machine:jtag_state_machine| ; 19 (19) ; 19 (19) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine ; work ;
; |sld_rom_sr:HUB_INFO_REG| ; 20 (20) ; 9 (9) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |beep|sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG ; work ;
+-------------------------------------------------------------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis RAM Summary ;
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------+----------------+--------------+--------------+--------------+--------------+-------+-----------------------------------+
; Name ; Type ; Mode ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Size ; MIF ;
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------+----------------+--------------+--------------+--------------+--------------+-------+-----------------------------------+
; beep_cup:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_ocimem:the_cpu_0_nios2_ocimem|cpu_0_ociram_lpm_dram_bdp_component_module:cpu_0_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_c572:auto_generated|ALTSYNCRAM ; AUTO ; True Dual Port ; 256 ; 32 ; 256 ; 32 ; 8192 ; cpu_0_ociram_default_contents.mif ;
; beep_cup:inst|cpu_0:the_cpu_0|cpu_0_rf_module:cpu_0_rf|altsyncram:the_altsyncram|altsyncram_b322:auto_generated|ALTSYNCRAM ; AUTO ; True Dual Port ; 32 ; 32 ; 32 ; 32 ; 1024 ; rf_ram.mif ;
; beep_cup:inst|onchip_memory_0:the_onchip_memory_0|altsyncram:the_altsyncram|altsyncram_28a1:auto_generated|ALTSYNCRAM ; M4K ; Single Port ; 2048 ; 32 ; -- ; -- ; 65536 ; onchip_memory_0.hex ;
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------+----------------+--------------+--------------+--------------+--------------+-------+-----------------------------------+
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Registers Protected by Synthesis ;
+-------------------------------------------------------------------------------------------------+------------------------------------------------------------------+--------------------------------------------+
; Register Name ; Protected by Synthesis Attribute or Preserve Register Assignment ; Not to be Touched by Netlist Optimizations ;
+-------------------------------------------------------------------------------------------------+------------------------------------------------------------------+--------------------------------------------+
; beep_cup:inst|beep_cup_reset_clk_domain_synch_module:beep_cup_reset_clk_domain_synch|data_out ; yes ; yes ;
; beep_cup:inst|beep_cup_reset_clk_domain_synch_module:beep_cup_reset_clk_domain_synch|data_in_d1 ; yes ; yes ;
+-------------------------------------------------------------------------------------------------+------------------------------------------------------------------+--------------------------------------------+
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Registers Removed During Synthesis ;
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