arm_inst.def

arm的模拟器

IDEF(orrs_ror_mode3_s_, 0x0FF000F0, 0x01900070, 1)
IDEF(bici_imm_mode1_, 0x0FF00F00, 0x03C00000, 1)
IDEF(bici_rot_mode1_, 0x0FF00000, 0x03C00000, 1)
IDEF(bicis_imm_mode1_s_, 0x0FF00F00, 0x03D00000, 1)
IDEF(bicis_rot_mode1_s_, 0x0FF00000, 0x03D00000, 1)
IDEF(bic_lsl_mode2_, 0x0FF00070, 0x01C00000, 1)
IDEF(bic_zero_mode2_, 0x0FF00FF0, 0x01C00020, 1)
IDEF(bic_lsr_mode2_, 0x0FF00070, 0x01C00020, 1)
IDEF(bic_sign_mode2_, 0x0FF00FF0, 0x01C00040, 1)
IDEF(bic_asr_mode2_, 0x0FF00070, 0x01C00040, 1)
IDEF(bic_rrx_mode2_, 0x0FF00FF0, 0x01C00060, 1)
IDEF(bic_ror_mode2_, 0x0FF00070, 0x01C00060, 1)
IDEF(bic_lsl_mode3_, 0x0FF000F0, 0x01C00010, 1)
IDEF(bic_lsr_mode3_, 0x0FF000F0, 0x01C00030, 1)
IDEF(bic_asr_mode3_, 0x0FF000F0, 0x01C00050, 1)
IDEF(bic_ror_mode3_, 0x0FF000F0, 0x01C00070, 1)
IDEF(bics_lsz_mode2_s_, 0x0FF00FF0, 0x01D00000, 1)
IDEF(bics_lsl_mode2_s_, 0x0FF00070, 0x01D00000, 1)
IDEF(bics_zero_mode2_s_, 0x0FF00FF0, 0x01D00020, 1)
IDEF(bics_lsr_mode2_s_, 0x0FF00070, 0x01D00020, 1)
IDEF(bics_sign_mode2_s_, 0x0FF00FF0, 0x01D00040, 1)
IDEF(bics_asr_mode2_s_, 0x0FF00070, 0x01D00040, 1)
IDEF(bics_rrx_mode2_s_, 0x0FF00FF0, 0x01D00060, 1)
IDEF(bics_ror_mode2_s_, 0x0FF00070, 0x01D00060, 1)
IDEF(bics_lsl_mode3_s_, 0x0FF000F0, 0x01D00010, 1)
IDEF(bics_lsr_mode3_s_, 0x0FF000F0, 0x01D00030, 1)
IDEF(bics_asr_mode3_s_, 0x0FF000F0, 0x01D00050, 1)
IDEF(bics_ror_mode3_s_, 0x0FF000F0, 0x01D00070, 1)
IDEF(cmpi_imm_mode1_, 0x0FF00F00, 0x03500000, 1)
IDEF(cmpi_rot_mode1_, 0x0FF00000, 0x03500000, 1)
IDEF(cmp_lsl_mode2_, 0x0FF00070, 0x01500000, 1)
IDEF(cmp_zero_mode2_, 0x0FF00FF0, 0x01500020, 1)
IDEF(cmp_lsr_mode2_, 0x0FF00070, 0x01500020, 1)
IDEF(cmp_sign_mode2_, 0x0FF00FF0, 0x01500040, 1)
IDEF(cmp_asr_mode2_, 0x0FF00070, 0x01500040, 1)
IDEF(cmp_rrx_mode2_, 0x0FF00FF0, 0x01500060, 1)
IDEF(cmp_ror_mode2_, 0x0FF00070, 0x01500060, 1)
IDEF(cmp_lsl_mode3_, 0x0FF000F0, 0x01500010, 1)
IDEF(cmp_lsr_mode3_, 0x0FF000F0, 0x01500030, 1)
IDEF(cmp_asr_mode3_, 0x0FF000F0, 0x01500050, 1)
IDEF(cmp_ror_mode3_, 0x0FF000F0, 0x01500070, 1)
IDEF(cmni_imm_mode1_, 0x0FF00F00, 0x03700000, 1)
IDEF(cmni_rot_mode1_, 0x0FF00000, 0x03700000, 1)
IDEF(cmn_lsl_mode2_, 0x0FF00070, 0x01700000, 1)
IDEF(cmn_zero_mode2_, 0x0FF00FF0, 0x01700020, 1)
IDEF(cmn_lsr_mode2_, 0x0FF00070, 0x01700020, 1)
IDEF(cmn_sign_mode2_, 0x0FF00FF0, 0x01700040, 1)
IDEF(cmn_asr_mode2_, 0x0FF00070, 0x01700040, 1)
IDEF(cmn_rrx_mode2_, 0x0FF00FF0, 0x01700060, 1)
IDEF(cmn_ror_mode2_, 0x0FF00070, 0x01700060, 1)
IDEF(cmn_lsl_mode3_, 0x0FF000F0, 0x01700010, 1)
IDEF(cmn_lsr_mode3_, 0x0FF000F0, 0x01700030, 1)
IDEF(cmn_asr_mode3_, 0x0FF000F0, 0x01700050, 1)
IDEF(cmn_ror_mode3_, 0x0FF000F0, 0x01700070, 1)
IDEF(tsti_imm_mode1_s_, 0x0FF00F00, 0x03100000, 1)
IDEF(tsti_rot_mode1_s_, 0x0FF00000, 0x03100000, 1)
IDEF(tst_lsz_mode2_s_, 0x0FF00FF0, 0x01100000, 1)
IDEF(tst_lsl_mode2_s_, 0x0FF00070, 0x01100000, 1)
IDEF(tst_zero_mode2_s_, 0x0FF00FF0, 0x01100020, 1)
IDEF(tst_lsr_mode2_s_, 0x0FF00070, 0x01100020, 1)
IDEF(tst_sign_mode2_s_, 0x0FF00FF0, 0x01100040, 1)
IDEF(tst_asr_mode2_s_, 0x0FF00070, 0x01100040, 1)
IDEF(tst_rrx_mode2_s_, 0x0FF00FF0, 0x01100060, 1)
IDEF(tst_ror_mode2_s_, 0x0FF00070, 0x01100060, 1)
IDEF(tst_lsl_mode3_s_, 0x0FF000F0, 0x01100010, 1)
IDEF(tst_lsr_mode3_s_, 0x0FF000F0, 0x01100030, 1)
IDEF(tst_asr_mode3_s_, 0x0FF000F0, 0x01100050, 1)
IDEF(tst_ror_mode3_s_, 0x0FF000F0, 0x01100070, 1)
IDEF(teqi_imm_mode1_s_, 0x0FF00F00, 0x03300000, 1)
IDEF(teqi_rot_mode1_s_, 0x0FF00000, 0x03300000, 1)
IDEF(teq_lsz_mode2_s_, 0x0FF00FF0, 0x01300000, 1)
IDEF(teq_lsl_mode2_s_, 0x0FF00070, 0x01300000, 1)
IDEF(teq_zero_mode2_s_, 0x0FF00FF0, 0x01300020, 1)
IDEF(teq_lsr_mode2_s_, 0x0FF00070, 0x01300020, 1)
IDEF(teq_sign_mode2_s_, 0x0FF00FF0, 0x01300040, 1)
IDEF(teq_asr_mode2_s_, 0x0FF00070, 0x01300040, 1)
IDEF(teq_rrx_mode2_s_, 0x0FF00FF0, 0x01300060, 1)
IDEF(teq_ror_mode2_s_, 0x0FF00070, 0x01300060, 1)
IDEF(teq_lsl_mode3_s_, 0x0FF000F0, 0x01300010, 1)
IDEF(teq_lsr_mode3_s_, 0x0FF000F0, 0x01300030, 1)
IDEF(teq_asr_mode3_s_, 0x0FF000F0, 0x01300050, 1)
IDEF(teq_ror_mode3_s_, 0x0FF000F0, 0x01300070, 1)
IDEF(mla_, 0x0FF000F0, 0x00200090, 1)
IDEF(mla_s_, 0x0FF000F0, 0x00300090, 1)
IDEF(mul_, 0x0FF000F0, 0x00000090, 1)
IDEF(mul_s_, 0x0FF000F0, 0x00100090, 1)
IDEF(smull_, 0x0FF000F0, 0x00C00090, 1)
IDEF(smull_s_, 0x0FF000F0, 0x00D00090, 1)
IDEF(smlal_, 0x0FF000F0, 0x00E00090, 1)
IDEF(smlal_s_, 0x0FF000F0, 0x00F00090, 1)
IDEF(umull_, 0x0FF000F0, 0x00800090, 1)
IDEF(umull_s_, 0x0FF000F0, 0x00900090, 1)
IDEF(umlal_, 0x0FF000F0, 0x00A00090, 1)
IDEF(umlal_s_, 0x0FF000F0, 0x00B00090, 1)
IDEF(ldt_imm_, 0x0F700000, 0x04300000, 1)
IDEF(ldt_imm_b_, 0x0F700000, 0x04700000, 1)
IDEF(ldt_reg_lsl_mode2_, 0x0F700070, 0x06300000, 1)
IDEF(ldt_reg_zero_mode2_, 0x0F700FF0, 0x06300020, 1)
IDEF(ldt_reg_lsr_mode2_, 0x0F700070, 0x06300020, 1)
IDEF(ldt_reg_sign_mode2_, 0x0F700FF0, 0x06300040, 1)
IDEF(ldt_reg_asr_mode2_, 0x0F700070, 0x06300040, 1)
IDEF(ldt_reg_rrx_mode2_, 0x0F700FF0, 0x06300060, 1)
IDEF(ldt_reg_ror_mode2_, 0x0F700070, 0x06300060, 1)
IDEF(ldt_reg_b_lsl_mode2_, 0x0F700070, 0x06700000, 1)
IDEF(ldt_reg_b_zero_mode2_, 0x0F700FF0, 0x06700020, 1)
IDEF(ldt_reg_b_lsr_mode2_, 0x0F700070, 0x06700020, 1)
IDEF(ldt_reg_b_sign_mode2_, 0x0F700FF0, 0x06700040, 1)
IDEF(ldt_reg_b_asr_mode2_, 0x0F700070, 0x06700040, 1)
IDEF(ldt_reg_b_rrx_mode2_, 0x0F700FF0, 0x06700060, 1)
IDEF(ldt_reg_b_ror_mode2_, 0x0F700070, 0x06700060, 1)
IDEF(ld1_imm_, 0x0F700000, 0x04100000, 1)
IDEF(ld1_imm_p_, 0x0F500000, 0x05100000, 1)
IDEF(ld1_imm_b_, 0x0F700000, 0x04500000, 1)
IDEF(ld1_imm_pb_, 0x0F500000, 0x05500000, 1)
IDEF(ld1_reg_lsl_mode2_, 0x0F700070, 0x06100000, 1)
IDEF(ld1_reg_zero_mode2_, 0x0F700FF0, 0x06100020, 1)
IDEF(ld1_reg_lsr_mode2_, 0x0F700070, 0x06100020, 1)
IDEF(ld1_reg_sign_mode2_, 0x0F700FF0, 0x06100040, 1)
IDEF(ld1_reg_asr_mode2_, 0x0F700070, 0x06100040, 1)
IDEF(ld1_reg_rrx_mode2_, 0x0F700FF0, 0x06100060, 1)
IDEF(ld1_reg_ror_mode2_, 0x0F700070, 0x06100060, 1)
IDEF(ld1_reg_p_lsl_mode2_, 0x0F500070, 0x07100000, 1)
IDEF(ld1_reg_p_zero_mode2_, 0x0F500FF0, 0x07100020, 1)
IDEF(ld1_reg_p_lsr_mode2_, 0x0F500070, 0x07100020, 1)
IDEF(ld1_reg_p_sign_mode2_, 0x0F500FF0, 0x07100040, 1)
IDEF(ld1_reg_p_asr_mode2_, 0x0F500070, 0x07100040, 1)
IDEF(ld1_reg_p_rrx_mode2_, 0x0F500FF0, 0x07100060, 1)
IDEF(ld1_reg_p_ror_mode2_, 0x0F500070, 0x07100060, 1)
IDEF(ld1_reg_b_lsl_mode2_, 0x0F700070, 0x06500000, 1)
IDEF(ld1_reg_b_zero_mode2_, 0x0F700FF0, 0x06500020, 1)
IDEF(ld1_reg_b_lsr_mode2_, 0x0F700070, 0x06500020, 1)
IDEF(ld1_reg_b_sign_mode2_, 0x0F700FF0, 0x06500040, 1)
IDEF(ld1_reg_b_asr_mode2_, 0x0F700070, 0x06500040, 1)
IDEF(ld1_reg_b_rrx_mode2_, 0x0F700FF0, 0x06500060, 1)
IDEF(ld1_reg_b_ror_mode2_, 0x0F700070, 0x06500060, 1)
IDEF(ld1_reg_pb_lsl_mode2_, 0x0F500070, 0x07500000, 1)
IDEF(ld1_reg_pb_zero_mode2_, 0x0F500FF0, 0x07500020, 1)
IDEF(ld1_reg_pb_lsr_mode2_, 0x0F500070, 0x07500020, 1)
IDEF(ld1_reg_pb_sign_mode2_, 0x0F500FF0, 0x07500040, 1)
IDEF(ld1_reg_pb_asr_mode2_, 0x0F500070, 0x07500040, 1)
IDEF(ld1_reg_pb_rrx_mode2_, 0x0F500FF0, 0x07500060, 1)
IDEF(ld1_reg_pb_ror_mode2_, 0x0F500070, 0x07500060, 1)
IDEF(ld2_imm_h_, 0x0F5000F0, 0x005000B0, 1)
IDEF(ld2_imm_ph_, 0x0F5000F0, 0x015000B0, 1)
IDEF(ld2_imm_s_, 0x0F5000F0, 0x005000D0, 1)
IDEF(ld2_imm_ps_, 0x0F5000F0, 0x015000D0, 1)
IDEF(ld2_imm_hs_, 0x0F5000F0, 0x005000F0, 1)
IDEF(ld2_imm_phs_, 0x0F5000F0, 0x015000F0, 1)
IDEF(ld2_reg_h_, 0x0F500FF0, 0x001000B0, 1)
IDEF(ld2_reg_ph_, 0x0F500FF0, 0x011000B0, 1)
IDEF(ld2_reg_s_, 0x0F500FF0, 0x001000D0, 1)
IDEF(ld2_reg_ps_, 0x0F500FF0, 0x011000D0, 1)
IDEF(ld2_reg_hs_, 0x0F500FF0, 0x001000F0, 1)
IDEF(ld2_reg_phs_, 0x0F500FF0, 0x011000F0, 1)
IDEF(stt_imm_, 0x0F700000, 0x04200000, 1)
IDEF(stt_imm_b_, 0x0F700000, 0x04600000, 1)
IDEF(stt_reg_lsl_mode2_, 0x0F700070, 0x06200000, 1)
IDEF(stt_reg_zero_mode2_, 0x0F700FF0, 0x06200020, 1)
IDEF(stt_reg_lsr_mode2_, 0x0F700070, 0x06200020, 1)
IDEF(stt_reg_sign_mode2_, 0x0F700FF0, 0x06200040, 1)
IDEF(stt_reg_asr_mode2_, 0x0F700070, 0x06200040, 1)
IDEF(stt_reg_rrx_mode2_, 0x0F700FF0, 0x06200060, 1)
IDEF(stt_reg_ror_mode2_, 0x0F700070, 0x06200060, 1)
IDEF(stt_reg_b_lsl_mode2_, 0x0F700070, 0x06600000, 1)
IDEF(stt_reg_b_zero_mode2_, 0x0F700FF0, 0x06600020, 1)
IDEF(stt_reg_b_lsr_mode2_, 0x0F700070, 0x06600020, 1)
IDEF(stt_reg_b_sign_mode2_, 0x0F700FF0, 0x06600040, 1)
IDEF(stt_reg_b_asr_mode2_, 0x0F700070, 0x06600040, 1)
IDEF(stt_reg_b_rrx_mode2_, 0x0F700FF0, 0x06600060, 1)
IDEF(stt_reg_b_ror_mode2_, 0x0F700070, 0x06600060, 1)
IDEF(st1_imm_, 0x0F700000, 0x04000000, 1)
IDEF(st1_imm_p_, 0x0F500000, 0x05000000, 1)
IDEF(st1_imm_b_, 0x0F700000, 0x04400000, 1)
IDEF(st1_imm_pb_, 0x0F500000, 0x05400000, 1)
IDEF(st1_reg_lsl_mode2_, 0x0F700070, 0x06000000, 1)
IDEF(st1_reg_zero_mode2_, 0x0F700FF0, 0x06000020, 1)
IDEF(st1_reg_lsr_mode2_, 0x0F700070, 0x06000020, 1)
IDEF(st1_reg_sign_mode2_, 0x0F700FF0, 0x06000040, 1)
IDEF(st1_reg_asr_mode2_, 0x0F700070, 0x06000040, 1)
IDEF(st1_reg_rrx_mode2_, 0x0F700FF0, 0x06000060, 1)
IDEF(st1_reg_ror_mode2_, 0x0F700070, 0x06000060, 1)
IDEF(st1_reg_p_lsl_mode2_, 0x0F500070, 0x07000000, 1)
IDEF(st1_reg_p_zero_mode2_, 0x0F500FF0, 0x07000020, 1)
IDEF(st1_reg_p_lsr_mode2_, 0x0F500070, 0x07000020, 1)
IDEF(st1_reg_p_sign_mode2_, 0x0F500FF0, 0x07000040, 1)
IDEF(st1_reg_p_asr_mode2_, 0x0F500070, 0x07000040, 1)
IDEF(st1_reg_p_rrx_mode2_, 0x0F500FF0, 0x07000060, 1)
IDEF(st1_reg_p_ror_mode2_, 0x0F500070, 0x07000060, 1)
IDEF(st1_reg_b_lsl_mode2_, 0x0F700070, 0x06400000, 1)
IDEF(st1_reg_b_zero_mode2_, 0x0F700FF0, 0x06400020, 1)
IDEF(st1_reg_b_lsr_mode2_, 0x0F700070, 0x06400020, 1)
IDEF(st1_reg_b_sign_mode2_, 0x0F700FF0, 0x06400040, 1)
IDEF(st1_reg_b_asr_mode2_, 0x0F700070, 0x06400040, 1)
IDEF(st1_reg_b_rrx_mode2_, 0x0F700FF0, 0x06400060, 1)
IDEF(st1_reg_b_ror_mode2_, 0x0F700070, 0x06400060, 1)
IDEF(st1_reg_pb_lsl_mode2_, 0x0F500070, 0x07400000, 1)
IDEF(st1_reg_pb_zero_mode2_, 0x0F500FF0, 0x07400020, 1)
IDEF(st1_reg_pb_lsr_mode2_, 0x0F500070, 0x07400020, 1)
IDEF(st1_reg_pb_sign_mode2_, 0x0F500FF0, 0x07400040, 1)
IDEF(st1_reg_pb_asr_mode2_, 0x0F500070, 0x07400040, 1)
IDEF(st1_reg_pb_rrx_mode2_, 0x0F500FF0, 0x07400060, 1)
IDEF(st1_reg_pb_ror_mode2_, 0x0F500070, 0x07400060, 1)
IDEF(st2_imm_, 0x0F5000F0, 0x004000B0, 1)
IDEF(st2_imm_p_, 0x0F5000F0, 0x014000B0, 1)
IDEF(st2_reg_, 0x0F500FF0, 0x000000B0, 1)
IDEF(st2_reg_p_, 0x0F500FF0, 0x010000B0, 1)
IDEF(swap_, 0x0FF00FF0, 0x01000090, 1)
IDEF(swap_byte_, 0x0FF00FF0, 0x01400090, 1)
IDEF(ldm1_ldm1_000_, 0x0FF00000, 0x08100000, 1)
IDEF(ldm1_ldm1_001_, 0x0FF00000, 0x08300000, 1)
IDEF(ldm1_ldm1_010_, 0x0FF00000, 0x08900000, 1)
IDEF(ldm1_ldm1_011_, 0x0FF00000, 0x08B00000, 1)
IDEF(ldm1_ldm1_100_, 0x0FF00000, 0x09100000, 1)
IDEF(ldm1_ldm1_101_, 0x0FF00000, 0x09300000, 1)
IDEF(ldm1_ldm1_110_, 0x0FF00000, 0x09900000, 1)
IDEF(ldm1_ldm1_111_, 0x0FF00000, 0x09B00000, 1)
IDEF(ldm2_ldm2_000_, 0x0FF08000, 0x08500000, 1)
IDEF(ldm2_ldm2_010_, 0x0FF08000, 0x08D00000, 1)
IDEF(ldm2_ldm2_100_, 0x0FF08000, 0x09500000, 1)
IDEF(ldm2_ldm2_110_, 0x0FF08000, 0x09D00000, 1)
IDEF(ldm3_ldm3_000_, 0x0FF08000, 0x08508000, 1)
IDEF(ldm3_ldm3_001_, 0x0FF08000, 0x08708000, 1)
IDEF(ldm3_ldm3_010_, 0x0FF08000, 0x08D08000, 1)
IDEF(ldm3_ldm3_011_, 0x0FF08000, 0x08F08000, 1)
IDEF(ldm3_ldm3_100_, 0x0FF08000, 0x09508000, 1)
IDEF(ldm3_ldm3_101_, 0x0FF08000, 0x09708000, 1)
IDEF(ldm3_ldm3_110_, 0x0FF08000, 0x09D08000, 1)
IDEF(ldm3_ldm3_111_, 0x0FF08000, 0x09F08000, 1)
IDEF(stm1_stm1_000_, 0x0FF00000, 0x08000000, 1)
IDEF(stm1_stm1_001_, 0x0FF00000, 0x08200000, 1)
IDEF(stm1_stm1_010_, 0x0FF00000, 0x08800000, 1)
IDEF(stm1_stm1_011_, 0x0FF00000, 0x08A00000, 1)
IDEF(stm1_stm1_100_, 0x0FF00000, 0x09000000, 1)
IDEF(stm1_stm1_101_, 0x0FF00000, 0x09200000, 1)
IDEF(stm1_stm1_110_, 0x0FF00000, 0x09800000, 1)
IDEF(stm1_stm1_111_, 0x0FF00000, 0x09A00000, 1)
IDEF(stm2_stm2_000_, 0x0FF00000, 0x08400000, 1)
IDEF(stm2_stm2_010_, 0x0FF00000, 0x08C00000, 1)
IDEF(stm2_stm2_100_, 0x0FF00000, 0x09400000, 1)
IDEF(stm2_stm2_110_, 0x0FF00000, 0x09C00000, 1)
IDEF(branch_, 0x0F000000, 0x0A000000, 1)
IDEF(branch_exchange_, 0x0FFFFFF0, 0x012FFF10, 1)
IDEF(branch_link_, 0x0F000000, 0x0B000000, 1)
IDEF(mrs_, 0x0FFF0FFF, 0x010F0000, 1)
IDEF(mrs_r_, 0x0FFF0FFF, 0x014F0000, 1)
IDEF(msri_imm_mode1_, 0x0FF0FF00, 0x0320F000, 1)
IDEF(msri_rot_mode1_, 0x0FF0F000, 0x0320F000, 1)
IDEF(msri_r_imm_mode1_, 0x0FF0FF00, 0x0360F000, 1)
IDEF(msri_r_rot_mode1_, 0x0FF0F000, 0x0360F000, 1)
IDEF(msr_, 0x0FF0FFF0, 0x0120F000, 1)
IDEF(msr_r_, 0x0FF0FFF0, 0x0160F000, 1)
IDEF(sc_, 0x0F000000, 0x0F000000, 1)
IDEF(cdp_, 0x0F000010, 0x0E000000, 1)
IDEF(mcr_, 0x0F100010, 0x0E000010, 1)
IDEF(mrc_, 0x0F100010, 0x0E100010, 1)
IDEF(ldc1_ldc1_01_, 0x0FB00000, 0x0C900000, 1)
IDEF(ldc1_ldc1_10_, 0x0FB00000, 0x0D100000, 1)
IDEF(ldc1_ldc1_11_, 0x0FB00000, 0x0D900000, 1)
IDEF(ldc2_ldc2_00_, 0x0FB00000, 0x0C300000, 1)
IDEF(ldc2_ldc2_01_, 0x0FB00000, 0x0CB00000, 1)
IDEF(ldc2_ldc2_10_, 0x0FB00000, 0x0D300000, 1)
IDEF(ldc2_ldc2_11_, 0x0FB00000, 0x0DB00000, 1)
IDEF(stc1_stc1_01_, 0x0FB00000, 0x0C800000, 1)
IDEF(stc1_stc1_10_, 0x0FB00000, 0x0D000000, 1)
IDEF(stc1_stc1_11_, 0x0FB00000, 0x0D800000, 1)
IDEF(stc2_stc2_00_, 0x0FB00000, 0x0C200000, 1)
IDEF(stc2_stc2_01_, 0x0FB00000, 0x0CA00000, 1)
IDEF(stc2_stc2_10_, 0x0FB00000, 0x0D200000, 1)
IDEF(stc2_stc2_11_, 0x0FB00000, 0x0DA00000, 1)
IDEF(mra_, 0x0FF00FFF, 0x0C500000, 1)
IDEF(mar_, 0x0FF00FFF, 0x0C400000, 1)
IDEF(clz_, 0x0FFF0FF0, 0x016F0F10, 1)
IDEF(ldd_imm_, 0x0F5000F0, 0x004000D0, 1)
IDEF(ldd_imm_p_, 0x0F5000F0, 0x014000D0, 1)
IDEF(ldd_reg_, 0x0F500FF0, 0x000000D0, 1)
IDEF(ldd_reg_p_, 0x0F500FF0, 0x010000D0, 1)
IDEF(std_imm_, 0x0F5000F0, 0x004000F0, 1)
IDEF(std_imm_p_, 0x0F5000F0, 0x014000F0, 1)
IDEF(std_reg_, 0x0F500FF0, 0x000000F0, 1)
IDEF(std_reg_p_, 0x0F500FF0, 0x010000F0, 1)
IDEF(smla_xy_, 0x0FF00090, 0x01000080, 1)
IDEF(smlal_xy_, 0x0FF00090, 0x01400080, 1)
IDEF(smlaw_y_, 0x0FF000B0, 0x01200080, 1)
IDEF(smul_xy_, 0x0FF0F090, 0x01600080, 1)
IDEF(smulw_y_, 0x0FF0F0B0, 0x01200080, 1)
IDEF(qadd_, 0x0FF00FF0, 0x01000050, 1)
IDEF(qdadd_, 0x0FF00FF0, 0x01400050, 1)
IDEF(qsub_, 0x0FF00FF0, 0x01200050, 1)
IDEF(qdsub_, 0x0FF00FF0, 0x01600050, 1)