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📄 arm.isa

📁 arm的模拟器
💻 ISA
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    if ($rd$==15)        WRITE_CPSR(SPSR);    else		ASGN_NZCV(rslt32, carry, (val32 ^ tmp32 ^ -1) & (val32 ^ rslt32));	WRITE_REG($rd$, rslt32);"}op adc(----00001010:rn:rd:shifts) {execute="	WRITE_REG($rd$, READ_REG($rn$) + $shifts$ + C_FLAG);"}op adcs(----00001011:rn:rd:shifts) {execute="	tmp32  = $shifts$;	val32  = READ_REG($rn$);	if (C_FLAG) {		rslt32 = tmp32+val32+1;		carry = rslt32 <= val32;	}	else {		rslt32 = tmp32+val32;		carry = rslt32 < val32;	}    if ($rd$==15)        WRITE_CPSR(SPSR);    else		ASGN_NZCV(rslt32, carry, (val32 ^ tmp32 ^ -1) & (val32 ^ rslt32));	WRITE_REG($rd$, rslt32);"}op subi(----00100100:rn:rd:rotate_imm32) {execute="	WRITE_REG($rd$, READ_REG($rn$) - $rotate_imm32$);"}op subis(----00100101:rn:rd:rotate_imm32) {execute="	tmp32  = $rotate_imm32$;	val32  = READ_REG($rn$);	rslt32 = val32 - tmp32;    if ($rd$==15)        WRITE_CPSR(SPSR);    else		ASGN_NZCV(rslt32, val32>=tmp32, (val32 ^ tmp32) & (val32 ^ rslt32));	WRITE_REG($rd$, rslt32);"}op sub(----00000100:rn:rd:shifts) {execute="	WRITE_REG($rd$, READ_REG($rn$) - $shifts$);"}op subs(----00000101:rn:rd:shifts) {execute="	tmp32 = $shifts$;	val32  = READ_REG($rn$);	rslt32 = val32 - tmp32;    if ($rd$==15)        WRITE_CPSR(SPSR);    else		ASGN_NZCV(rslt32, val32>=tmp32, (val32 ^ tmp32) & (val32 ^ rslt32));	WRITE_REG($rd$, rslt32);"}op sbci(----00101100:rn:rd:rotate_imm32) {execute="	WRITE_REG($rd$, READ_REG($rn$) - $rotate_imm32$ - (1-C_FLAG));"}op sbcis(----00101101:rn:rd:rotate_imm32) {execute="	tmp32 = $rotate_imm32$;	val32 = READ_REG($rn$);	if (C_FLAG) {		rslt32 = val32 - tmp32;		carry = val32 >= tmp32;	}	else {		rslt32 = val32 - tmp32 - 1;		carry = val32 > tmp32;	}    if ($rd$==15)        WRITE_CPSR(SPSR);    else		ASGN_NZCV(rslt32, carry, (val32 ^ tmp32) & (val32 ^ rslt32));	WRITE_REG($rd$, rslt32);"}op sbc(----00001100:rn:rd:shifts) {execute="	WRITE_REG($rd$, READ_REG($rn$) - $shifts$ - (1-C_FLAG));"}op sbcs(----00001101:rn:rd:shifts) {execute="	tmp32 = $shifts$;	val32 = READ_REG($rn$);	if (C_FLAG) {		rslt32 = val32 - tmp32;		carry = val32 >= tmp32;	}	else {		rslt32 = val32 - tmp32 - 1;		carry = val32 > tmp32;	}    if ($rd$==15)        WRITE_CPSR(SPSR);    else		ASGN_NZCV(rslt32, carry, (val32 ^ tmp32) & (val32 ^ rslt32));	WRITE_REG($rd$, rslt32);"}op rsbi(----00100110:rn:rd:rotate_imm32) {execute="	WRITE_REG($rd$, $rotate_imm32$ - READ_REG($rn$));"}op rsbis(----00100111:rn:rd:rotate_imm32) {execute="	val32 = $rotate_imm32$;	tmp32 = READ_REG($rn$);	rslt32 = val32 - tmp32;    if ($rd$==15)        WRITE_CPSR(SPSR);    else		ASGN_NZCV(rslt32, val32>=tmp32, (val32 ^ tmp32) & (val32 ^ rslt32));	WRITE_REG($rd$, rslt32);"}op rsb(----00000110:rn:rd:shifts) {execute="	WRITE_REG($rd$, $shifts$ - READ_REG($rn$));"}op rsbs(----00000111:rn:rd:shifts) {execute="	val32 = $shifts$;	tmp32 = READ_REG($rn$);	rslt32 = val32 - tmp32;    if ($rd$==15)        WRITE_CPSR(SPSR);    else		ASGN_NZCV(rslt32, val32>=tmp32, (val32 ^ tmp32) & (val32 ^ rslt32));	WRITE_REG($rd$, rslt32);"}op rsci(----00101110:rn:rd:rotate_imm32) {execute="	WRITE_REG($rd$, $rotate_imm32$ - READ_REG($rn$) - (1-C_FLAG));"}op rscis(----00101111:rn:rd:rotate_imm32) {execute="	val32 = $rotate_imm32$;	tmp32 = READ_REG($rn$);	if (C_FLAG) {		rslt32 = val32 - tmp32;		carry = val32 >= tmp32;	}	else {		rslt32 = val32 - tmp32 - 1;		carry = val32 > tmp32;	}    if ($rd$==15)        WRITE_CPSR(SPSR);    else		ASGN_NZCV(rslt32, carry, (val32 ^ tmp32) & (val32 ^ rslt32));	WRITE_REG($rd$, rslt32);"}op rsc(----00001110:rn:rd:shifts) {execute="	WRITE_REG($rd$, $shifts$ - READ_REG($rn$) - (1-C_FLAG));"}op rscs(----00001111:rn:rd:shifts) {execute="	val32 = $shifts$;	tmp32 = READ_REG($rn$);	if (C_FLAG) {		rslt32 = val32 - tmp32;		carry = val32 >= tmp32;	}	else {		rslt32 = val32 - tmp32 - 1;		carry = val32 > tmp32;	}    if ($rd$==15)        WRITE_CPSR(SPSR);    else		ASGN_NZCV(rslt32, carry, (val32 ^ tmp32) & (val32 ^ rslt32));	WRITE_REG($rd$, rslt32);"}op andi(----00100000:rn:rd:rotate_imm32) {execute="	WRITE_REG($rd$, READ_REG($rn$) & $rotate_imm32$);"}op andis(----00100001:rn:rd:rotate_imm32_s) {execute="	rslt32 = READ_REG($rn$) & $rotate_imm32_s$;    if ($rd$==15)        WRITE_CPSR(SPSR);    else		ASGN_NZC(rslt32, carry);	WRITE_REG($rd$, rslt32);"}op and(----00000000:rn:rd:shifts) {execute="	WRITE_REG($rd$, READ_REG($rn$) & $shifts$);"}op ands(----00000001:rn:rd:shifts_s) {execute="	rslt32 = READ_REG($rn$) & $shifts_s$;    if ($rd$==15)        WRITE_CPSR(SPSR);    else		ASGN_NZC(rslt32, carry);	WRITE_REG($rd$, rslt32);"}op eori(----00100010:rn:rd:rotate_imm32) {execute="	WRITE_REG($rd$, READ_REG($rn$) ^ $rotate_imm32$);"}op eoris(----00100011:rn:rd:rotate_imm32_s) {execute="	rslt32 = READ_REG($rn$) ^ $rotate_imm32_s$;    if ($rd$==15)        WRITE_CPSR(SPSR);    else		ASGN_NZC(rslt32, carry);	WRITE_REG($rd$, rslt32);"}op eor(----00000010:rn:rd:shifts) {execute="	WRITE_REG($rd$, READ_REG($rn$) ^ $shifts$);"}op eors(----00000011:rn:rd:shifts_s) {execute="	rslt32 = READ_REG($rn$) ^ $shifts_s$;    if ($rd$==15)        WRITE_CPSR(SPSR);    else		ASGN_NZC(rslt32, carry);	WRITE_REG($rd$, rslt32);"}op orri(----00111000:rn:rd:rotate_imm32) {execute="	WRITE_REG($rd$, READ_REG($rn$) | $rotate_imm32$);"}op orris(----00111001:rn:rd:rotate_imm32_s) {execute="	rslt32 = READ_REG($rn$) | $rotate_imm32_s$;    if ($rd$==15)        WRITE_CPSR(SPSR);    else		ASGN_NZC(rslt32, carry);	WRITE_REG($rd$, rslt32);"}op orr(----00011000:rn:rd:shifts) {execute="	WRITE_REG($rd$, READ_REG($rn$) | $shifts$);"}op orrs(----00011001:rn:rd:shifts_s) {execute="	rslt32 = READ_REG($rn$) | $shifts_s$;    if ($rd$==15)        WRITE_CPSR(SPSR);    else		ASGN_NZC(rslt32, carry);	WRITE_REG($rd$, rslt32);"}op bici(----00111100:rn:rd:rotate_imm32) {execute="	WRITE_REG($rd$, READ_REG($rn$) & ~$rotate_imm32$);"}op bicis(----00111101:rn:rd:rotate_imm32_s) {execute="	rslt32 = READ_REG($rn$) & ~$rotate_imm32_s$;    if ($rd$==15)        WRITE_CPSR(SPSR);    else		ASGN_NZC(rslt32, carry);	WRITE_REG($rd$, rslt32);"}op bic(----00011100:rn:rd:shifts) {execute="	WRITE_REG($rd$, READ_REG($rn$) & ~$shifts$);"}op bics(----00011101:rn:rd:shifts_s) {execute="	rslt32 = READ_REG($rn$) & ~$shifts_s$;    if ($rd$==15)        WRITE_CPSR(SPSR);    else		ASGN_NZC(rslt32, carry);	WRITE_REG($rd$, rslt32);"}op cmpi(----00110101:rn:----:rotate_imm32) {execute="	tmp32  = $rotate_imm32$;	val32  = READ_REG($rn$);	rslt32 = val32 - tmp32;	ASGN_NZCV(rslt32, val32 >= tmp32, (val32 ^ tmp32) & (val32 ^ rslt32));"}op cmp(----00010101:rn:----:shifts) {execute="	tmp32 = $shifts$;	val32  = READ_REG($rn$);	rslt32 = val32 - tmp32;	ASGN_NZCV(rslt32, val32 >= tmp32, (val32 ^ tmp32) & (val32 ^ rslt32));"}op cmni(----00110111:rn:----:rotate_imm32) {execute="	tmp32 = $rotate_imm32$;	val32  = READ_REG($rn$);	rslt32 = val32 + tmp32;	ASGN_NZCV(rslt32, rslt32<val32, (val32 ^ tmp32 ^ -1) & (val32 ^ rslt32));"}op cmn(----00010111:rn:----:shifts) {execute="	tmp32 = $shifts$;	val32  = READ_REG($rn$);	rslt32 = val32 + tmp32;	ASGN_NZCV(rslt32, rslt32<val32, (val32 ^ tmp32 ^ -1) & (val32 ^ rslt32));"}op tsti(----00110001:rn:----:rotate_imm32_s) {execute="	rslt32 = READ_REG($rn$) & $rotate_imm32_s$;	ASGN_NZC(rslt32, carry);"}op tst(----00010001:rn:----:shifts_s) {execute="	rslt32 = READ_REG($rn$) & $shifts_s$;	ASGN_NZC(rslt32, carry);"}op teqi(----00110011:rn:----:rotate_imm32_s) {execute="	rslt32 = READ_REG($rn$) ^ $rotate_imm32_s$;	ASGN_NZC(rslt32, carry);"}op teq(----00010011:rn:----:shifts_s) {execute="	rslt32 = READ_REG($rn$) ^ $shifts_s$;	ASGN_NZC(rslt32, carry);"}op mla(----00000010:rd:rn:rs:1001:rm) {execute="	WRITE_REG($rd$, (uint32_t)((uint64_t)READ_REG($rm$) * (uint64_t)READ_REG($rs$) + READ_REG($rn$)));"}op mla_s(----00000011:rd:rn:rs:1001:rm) {execute="	rslt32 = (uint32_t)((uint64_t)READ_REG($rm$) * (uint64_t)READ_REG($rs$) + READ_REG($rn$));	ASGN_NZ(rslt32);	WRITE_REG($rd$, rslt32);"}op mul(----00000000:rd:----:rs:1001:rm) {execute="	WRITE_REG($rd$, (uint32_t)((uint64_t)READ_REG($rm$) * (uint64_t)READ_REG($rs$)));"}op mul_s(----00000001:rd:----:rs:1001:rm) {execute="	rslt32 = (uint32_t)((uint64_t)READ_REG($rm$) * (uint64_t)READ_REG($rs$));	ASGN_NZ(rslt32);	WRITE_REG($rd$, rslt32);"}op smull(----00001100:rn:rd:rs:1001:rm) {execute="    rslt64 = (int64_t)READ_REG($rm$) * (int64_t)READ_REG($rs$);    WRITE_REG($rn$, (uint32_t)(rslt64>>32));    WRITE_REG($rd$, (uint32_t)rslt64);"}op smull_s(----00001101:rn:rd:rs:1001:rm) {execute="    rslt64 = (int64_t)READ_REG($rm$) * (int64_t)READ_REG($rs$);	ASGN_NZ((uint32_t)rslt64);    WRITE_REG($rn$, (uint32_t)(rslt64>>32));    WRITE_REG($rd$, (uint32_t)rslt64);"}op smlal(----00001110:rn:rd:rs:1001:rm) {execute="	rslt64 = ((uint64_t)READ_REG($rn$)<<32) + (uint64_t)READ_REG($rd$);    rslt64 = (int64_t)READ_REG($rm$) * (int64_t)READ_REG($rs$)+rslt64;    WRITE_REG($rn$, (uint32_t)(rslt64>>32));    WRITE_REG($rd$, (uint32_t)rslt64);"}op smlal_s(----00001111:rn:rd:rs:1001:rm) {execute="	rslt64 = ((uint64_t)READ_REG($rn$)<<32) + (uint64_t)READ_REG($rd$);    rslt64 = (int64_t)READ_REG($rm$) * (int64_t)READ_REG($rs$)+rslt64;    WRITE_REG($rn$, (uint32_t)(rslt64>>32));    WRITE_REG($rd$, (uint32_t)rslt64);	ASGN_NZ((uint32_t)rslt64);"}op umull(----00001000:rn:rd:rs:1001:rm) {execute="    rslt64 = (uint64_t)READ_REG($rm$) * (uint64_t)READ_REG($rs$);    WRITE_REG($rn$, (uint32_t)(rslt64>>32));    WRITE_REG($rd$, (uint32_t)rslt64);"}op umull_s(----00001001:rn:rd:rs:1001:rm) {execute="    rslt64 = (uint64_t)READ_REG($rm$) * (uint64_t)READ_REG($rs$);    WRITE_REG($rn$, (uint32_t)(rslt64>>32));    WRITE_REG($rd$, (uint32_t)rslt64);	ASGN_NZ((uint32_t)rslt64);"}op umlal(----00001010:rn:rd:rs:1001:rm) {execute="	rslt64 = ((uint64_t)READ_REG($rn$)<<32) + (uint64_t)READ_REG($rd$);    rslt64 = (uint64_t)READ_REG($rm$) * (uint64_t)READ_REG($rs$) + rslt64;    WRITE_REG($rn$, (uint32_t)(rslt64>>32));    WRITE_REG($rd$, (uint32_t)rslt64);"}op umlal_s(----00001011:rn:rd:rs:1001:rm) {execute="	rslt64 = ((uint64_t)READ_REG($rn$)<<32) + (uint64_t)READ_REG($rd$);    rslt64 = (uint64_t)READ_REG($rm$) * (uint64_t)READ_REG($rs$) + rslt64;    WRITE_REG($rn$, (uint32_t)(rslt64>>32));    WRITE_REG($rd$, (uint32_t)rslt64);	ASGN_NZ((uint32_t)rslt64);"}op ldt_imm(----0100:ufld:011:rn:rd:imm12) {execute="	address = READ_REG($rn$);	current_mode = TRANSLATION_MODE(USR_MODE);		MMU_READ_WORD(address,&rslt32);	TRANSLATION_MODE(current_mode);	if (fault){		ABORT( DataAbortV );	}	/*if (address&0x3)		rslt32 = rotate_right(rslt32, (address&0x3)<<3);*/	WRITE_REG($rn$, $ufld$?READ_REG($rn$)+$imm12$:READ_REG($rn$)-$imm12$);	WRITE_REG($rd$, rslt32);"}op ldt_imm_b(----0100:ufld:111:rn:rd:imm12) {execute="	address = READ_REG($rn$);	current_mode = TRANSLATION_MODE(USR_MODE);				MMU_READ_BYTE(address,&rslt8);	TRANSLATION_MODE(current_mode);	if(fault){		ABORT( DataAbortV );	}	WRITE_REG($rn$, $ufld$?READ_REG($rn$)+$imm12$:READ_REG($rn$)-$imm12$);	WRITE_REG($rd$, rslt8);"}op ldt_reg(----0110:ufld:011:rn:rd:imm_shifts) {execute="	offset = $imm_shifts$;	address = READ_REG($rn$);	current_mode = TRANSLATION_MODE(USR_MODE);	MMU_READ_WORD(address,&rslt32);	TRANSLATION_MODE(current_mode);	if (fault){		ABORT( DataAbortV );	}	/*if (address&0x3)		rslt32 = rotate_right(rslt32, (address&0x3)<<3);*/	WRITE_REG($rn$, $ufld$?READ_REG($rn$)+offset:READ_REG($rn$)-offset);	WRITE_REG($rd$, rslt32);"}op ldt_reg_b(----0110:ufld:111:rn:rd:imm_shifts) {execute="	offset = $imm_shifts$;	address = READ_REG($rn$);	current_mode = TRANSLATION_MODE(USR_MODE);		MMU_READ_BYTE(address,&rslt8);	TRANSLATION_MODE(current_mode);	if(fault){		ABORT( DataAbortV );	}	WRITE_REG($rn$, $ufld$?READ_REG($rn$)+offset:READ_REG($rn$)-offset);	WRITE_REG($rd$, rslt8);"}op ld1_imm(----0100:ufld:001:rn:rd:imm12) {execute="	address = READ_REG($rn$);	MMU_READ_WORD(address,&rslt32);	if (fault){		ABORT( DataAbortV );	}	/*if (address&0x3)		rslt32 = rotate_right(rslt32, (address&0x3)<<3);*/	WRITE_REG($rn$, $ufld$?READ_REG($rn$)+$imm12$:READ_REG($rn$)-$imm12$);	WRITE_REG($rd$, rslt32);"}op ld1_imm_p(----0101:ufld:0:wfld:1:rn:rd:imm12) {execute="	address = $ufld$?READ_REG($rn$)+$imm12$:READ_REG($rn$)-$imm12$;	MMU_READ_WORD(address,&rslt32);	if (fault){		ABORT( DataAbortV );	}	/*if (address&0x3)		rslt32 = rotate_right(rslt32, (address&0x3)<<3);*/	if ($wfld$)		WRITE_REG($rn$, address);	WRITE_REG($rd$, rslt32);"}op ld1_imm_b(----0100:ufld:101:rn:rd:imm12) {execute="	address = READ_REG($rn$);	MMU_READ_BYTE(address,&rslt8);	if(fault){		ABORT( DataAbortV );	}	WRITE_REG($rn$, $ufld$?READ_REG($rn$)+$imm12$:READ_REG($rn$)-$imm12$);	WRITE_REG($rd$, rslt8);"}op ld1_imm_pb(----0101:ufld:1:wfld:1:rn:rd:imm12) {execute="	address = $ufld$?READ_REG($rn$)+$imm12$:READ_REG($rn$)-$imm12$;	MMU_READ_BYTE(address,&rslt8);	if(fault){		ABORT( DataAbortV );	}	if($wfld$)		WRITE_REG($rn$, address);	WRITE_REG($rd$, rslt8);"}op ld1_reg(----0110:ufld:001:rn:rd:imm_shifts) {execute="	offset = $imm_shifts$;	address = READ_REG($rn$);	MMU_READ_WORD(address,&rslt32);	if (fault){		ABORT( DataAbortV );	}	/*if (address&0x3)		rslt32 = rotate_right(rslt32, (address&0x3)<<3);*/	WRITE_REG($rn$, $ufld$?READ_REG($rn$)+offset:READ_REG($rn$)-offset);	WRITE_REG($rd$, rslt32);"}op ld1_reg_p(----0111:ufld:0:wfld:1:rn:rd:imm_shifts) {execute="	offset = $imm_shifts$;	address = $ufld$?READ_REG($rn$)+offset:READ_REG($rn$)-offset;	MMU_READ_WORD(address,&rslt32);	if (fault){		ABORT( DataAbortV );	}	/*if (address&0x3)		rslt32 = rotate_right(rslt32, (address&0x3)<<3);*/	if ($wfld$)		WRITE_REG($rn$, address);	WRITE_REG($rd$, rslt32);"}op ld1_reg_b(----0110:ufld:101:rn:rd:imm_shifts) {execute="	offset = $imm_shifts$;	address = READ_REG($rn$);		MMU_READ_BYTE(address,&rslt8);	if(fault){		ABORT( DataAbortV );	}	WRITE_REG($rn$, $ufld$?READ_REG($rn$)+offset:READ_REG($rn$)-offset);	WRITE_REG($rd$, rslt8);"}op ld1_reg_pb(----0111:ufld:1:wfld:1:rn:rd:imm_shifts) {execute="	offset = $imm_shifts$;	address = $ufld$?READ_REG($rn$)+offset:READ_REG($rn$)-offset;	MMU_READ_BYTE(address,&rslt8);	if(fault){		ABORT( DataAbortV );	}	if ($wfld$)		WRITE_REG($rn$, address);	WRITE_REG($rd$, rslt8);"}op ld2_imm_h(----0000:ufld:1:-:1:rn:rd:imm4_1:1011:imm4_2){execute="	offset = ($imm4_1$ << 4) | $imm4_2$;	address = READ_REG($rn$);	MMU_READ_HALF_WORD(address,&rslt16);	if(fault){		ABORT( DataAbortV );	}	WRITE_REG($rn$, $ufld$?READ_REG($rn$)+offset:READ_REG($rn$)-offset);	WRITE_REG($rd$, rslt16);"}op ld2_imm_ph(----0001:ufld:1:wfld:1:rn:rd:imm4_1:1011:imm4_2){execute="	offset = ($imm4_1$ << 4) | $imm4_2$;	address = $ufld$?READ_REG($rn$)+offset:READ_REG($rn$)-offset;	MMU_READ_HALF_WORD(address,&rslt16);	if(fault){		ABORT( DataAbortV );

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