rtl_3c905cx_drv.h

最新rtlinux内核源码

	RxStatus = 0x18,  Timer=0x1A, TxStatus = 0x1B,
	TxFree = 0x1C, /* Remaining free bytes in Tx buffer. */
};
enum Window0 {
	Wn0EepromCmd = 10,		/* Window 0: EEPROM command register. */
	Wn0EepromData = 12,		/* Window 0: EEPROM results register. */
	IntrStatus=0x0E,		/* Valid in all windows. */
};
enum Win0_EEPROM_bits {
	EEPROM_Read = 0x80, EEPROM_WRITE = 0x40, EEPROM_ERASE = 0xC0,
	EEPROM_EWENB = 0x30,		/* Enable erasing/writing for 10 msec. */
	EEPROM_EWDIS = 0x00,		/* Disable EWENB before 10 msec timeout. */
};
/* EEPROM locations. */
enum eeprom_offset {
	PhysAddr01=0, PhysAddr23=1, PhysAddr45=2, ModelID=3,
	EtherLink3ID=7, IFXcvrIO=8, IRQLine=9,
	NodeAddr01=10, NodeAddr23=11, NodeAddr45=12,
	DriverTune=13, Checksum=15};

enum Window2 {			/* Window 2. */
	Wn2_ResetOptions=12,
};
enum Window3 {			/* Window 3: MAC/config bits. */
	Wn3_Config=0, Wn3_MAC_Ctrl=6, Wn3_Options=8,
};

enum Window4 {		/* Window 4: Xcvr/media bits. */
	Wn4_FIFODiag = 4, Wn4_NetDiag = 6, Wn4_PhysicalMgmt=8, Wn4_Media = 10,
};
enum Win4_Media_bits {
	Media_SQE = 0x0008,		/* Enable SQE error counting for AUI. */
	Media_10TP = 0x00C0,	/* Enable link beat and jabber for 10baseT. */
	Media_Lnk = 0x0080,		/* Enable just link beat for 100TX/100FX. */
	Media_LnkBeat = 0x0800,
};

enum Window7 {					/* Window 7: Bus Master control. */
	Wn7_MasterAddr = 0, Wn7_MasterLen = 6, Wn7_MasterStatus = 12,
};
/* Boomerang bus master control registers. */
enum MasterCtrl {
	PktStatus = 0x20, DownListPtr = 0x24, FragAddr = 0x28, FragLen = 0x2c,
	TxFreeThreshold = 0x2f, UpPktStatus = 0x30, UpListPtr = 0x38,
};

/* The Rx and Tx descriptor lists.
   Caution Alpha hackers: these types are 32 bits!  Note also the 8 byte
   alignment contraint on tx_ring[] and rx_ring[]. */
#define LAST_FRAG 	0x80000000			/* Last Addr/Len pair in descriptor. */
#define DN_COMPLETE	0x00010000			/* This packet has been downloaded */

/* Values for the Rx status entry. */
enum rx_desc_status {
	RxDComplete=0x00008000, RxDError=0x4000,
	/* See boomerang_rx() for actual error bits */
	IPChksumErr=1<<25, TCPChksumErr=1<<26, UDPChksumErr=1<<27,
	IPChksumValid=1<<29, TCPChksumValid=1<<30, UDPChksumValid=1<<31,
};

/* Values for the Tx status entry. */
enum tx_desc_status {
	CRCDisable=0x2000, TxDComplete=0x8000,
	AddIPChksum=0x02000000, AddTCPChksum=0x04000000, AddUDPChksum=0x08000000,
	TxIntrUploaded=0x80000000,		/* IRQ when in FIFO, but maybe not sent. */
};

/* The action to take with a media selection timer tick.
   Note that we deviate from the 3Com order by checking 10base2 before AUI.
 */
enum xcvr_types {
	XCVR_10baseT=0, XCVR_AUI, XCVR_10baseTOnly, XCVR_10base2, XCVR_100baseTx,
	XCVR_100baseFx, XCVR_MII=6, XCVR_NWAY=8, XCVR_ExtMII=9, XCVR_Default=10,
};

/* Chip features we care about in vp->capabilities, read from the EEPROM. */
enum ChipCaps { CapBusMaster=0x20, CapPwrMgmt=0x2000 };


/* This table drives the PCI probe routines.  It's mostly boilerplate in all
   of the drivers, and will likely be provided by some future kernel.
*/
enum pci_flags_bit {
	PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4,
	PCI_ADDR0=0x10<<0, PCI_ADDR1=0x10<<1, PCI_ADDR2=0x10<<2, PCI_ADDR3=0x10<<3,
};

enum {	IS_VORTEX=1, IS_BOOMERANG=2, IS_CYCLONE=4, IS_TORNADO=8,
	EEPROM_8BIT=0x10,	/* AKPM: Uses 0x230 as the base bitmaps for EEPROM reads */
	HAS_PWR_CTRL=0x20, HAS_MII=0x40, HAS_NWAY=0x80, HAS_CB_FNS=0x100,
	INVERT_MII_PWR=0x200, INVERT_LED_PWR=0x400, MAX_COLLISION_RESET=0x800,
	EEPROM_OFFSET=0x1000, HAS_HWCKSM=0x2000 };

#define DO_ZEROCOPY 0

struct boom_rx_desc {
	u32 next;					/* Last entry points to 0.   */
	s32 status;
	u32 addr;					/* Up to 63 addr/len pairs possible. */
	s32 length;					/* Set LAST_FRAG to indicate last pair. */
};

struct boom_tx_desc {
  u32 next;					/* Last entry points to 0.   */
  s32 status;					/* bits 0:12 length, others see below.  */
  u32 addr;
  s32 length;
};

struct vortex_private {
  /* The Rx and Tx rings should be quad-word-aligned. */
  struct boom_rx_desc* rx_ring;
  struct boom_tx_desc* tx_ring;
  dma_addr_t rx_ring_dma;
  dma_addr_t tx_ring_dma;
  /* The addresses of transmit- and receive-in-place skbuffs. */
  unsigned char *rx_skbuff[RX_RING_SIZE];
  unsigned char *tx_skbuff[TX_RING_SIZE];
  struct net_device *next_module;		/* NULL if PCI device */
  unsigned int cur_rx, cur_tx;		/* The next free ring entry */
  unsigned int dirty_rx, dirty_tx;	/* The ring entries to be free()ed. */
  struct net_device_stats stats;
  struct sk_buff *tx_skb;				/* Packet being eaten by bus master ctrl.  */
  dma_addr_t tx_skb_dma;				/* Allocated DMA address for bus master ctrl DMA.   */
  /* PCI configuration space information. */
  struct pci_dev *pdev;
  char *cb_fn_base;					/* CardBus function status addr space. */
  
  /* Some values here only for performance evaluation and path-coverage */
  int rx_nocopy, rx_copy, queued_packet, rx_csumhits;
  int card_idx;
  
  int options;						/* User-settable misc. driver options. */
  unsigned int media_override:4, 		/* Passed-in media type. */
    default_media:4,				/* Read from the EEPROM/Wn3_Config. */
    full_duplex:1, 
    force_fd:1, 
    autoselect:1,
    bus_master:1,					/* Vortex can only do a fragment bus-m. */
    full_bus_master_tx:1, full_bus_master_rx:2, /* Boomerang  */
    flow_ctrl:1,					/* Use 802.3x flow control (PAUSE only) */
    partner_flow_ctrl:1,			/* Partner supports flow control */
    has_nway:1,
    enable_wol:1,					/* Wake-on-LAN is enabled */
    pm_state_valid:1,				/* power_state[] has sane contents */
    open:1,
    medialock:1,
    must_free_region:1;				/* Flag: if zero, Cardbus owns the I/O region */
  int drv_flags;
  u16 status_enable;
  u16 intr_enable;
  u16 available_media;				/* From Wn3_Options. */
  u16 capabilities, info1, info2;		/* Various, from EEPROM. */
  u16 advertising;					/* NWay media advertisement */
  unsigned char phys[2];				/* MII device addresses. */
  u16 deferred;						/* Resend these interrupts when we
							 * bale from the ISR */
  u16 io_size;						/* Size of PCI region (for release_region) */
  spinlock_t lock;					/* Serialise access to device & its vortex_private */
  spinlock_t mdio_lock;				/* Serialise access to mdio hardware */
  u32 power_state[16];
  int mtu;
  unsigned char	dev_addr[MAX_ADDR_LEN];	/* hw address	*/
  long ioaddr;
  unsigned long rx_packets;
  unsigned long rx_frames_for_us;
  unsigned char if_port;
  int must_free_irq;
};

static struct vortex_chip_info {
	const char *name;
	int flags;
	int drv_flags;
	int io_size;
} vortex_info = {"3c905C Tornado",
		     PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, };

enum vortex_chips {
	CH_3C590 = 0,
	CH_3C592,
	CH_3C597,
	CH_3C595_1,
	CH_3C595_2,

	CH_3C595_3,
	CH_3C900_1,
	CH_3C900_2,
	CH_3C900_3,
	CH_3C900_4,

	CH_3C900_5,
	CH_3C900B_FL,
	CH_3C905_1,
	CH_3C905_2,
	CH_3C905B_1,

	CH_3C905B_2,
	CH_3C905B_FX,
	CH_3C905C,
	CH_3C980,
	CH_3C9805,

	CH_3CSOHO100_TX,
	CH_3C555,
	CH_3C556,
	CH_3C556B,
	CH_3C575,

	CH_3C575_1,
	CH_3CCFE575,
	CH_3CCFE575CT,
	CH_3CCFE656,
	CH_3CCFEM656,

	CH_3CCFEM656_1,
	CH_3C450,
};

static struct media_table {
	char *name;
	unsigned int media_bits:16,		/* Bits to set in Wn4_Media register. */
		mask:8,				/* The transceiver-present bit in Wn3_Config.*/
		next:8;				/* The media type to try next. */
	int wait;				/* Time before we check media status. */
} media_tbl[] = {
  { "10baseT",   Media_10TP,0x08, XCVR_10base2, (14*HZ)/10},
  { "10Mbs AUI", Media_SQE, 0x20, XCVR_Default, (1*HZ)/10},
  { "undefined", 0,			0x80, XCVR_10baseT, 10000},
  { "10base2",   0,			0x10, XCVR_AUI,		(1*HZ)/10},
  { "100baseTX", Media_Lnk, 0x02, XCVR_100baseFx, (14*HZ)/10},
  { "100baseFX", Media_Lnk, 0x04, XCVR_MII,		(14*HZ)/10},
  { "MII",		 0,			0x41, XCVR_10baseT, 3*HZ },
  { "undefined", 0,			0x01, XCVR_10baseT, 10000},
  { "Autonegotiate", 0,		0x41, XCVR_10baseT, 3*HZ},
  { "MII-External",	 0,		0x41, XCVR_10baseT, 3*HZ },
  { "Default",	 0,			0xFF, XCVR_10baseT, 10000},
};

static char mii_preamble_required;
static const int mtu = 1500;
/* Maximum events (Rx packets, etc.) to handle at each interrupt. */
static int max_interrupt_work = 32;

/* "Knobs" that adjust features and parameters. */
/* Set the copy breakpoint for the copy-only-tiny-frames scheme.
   Setting to > 1512 effectively disables this feature. */
#ifndef __arm__
static const int rx_copybreak = 200;
#else
/* ARM systems perform better by disregarding the bus-master
   transfer capability of these cards. -- rmk */
static const int rx_copybreak = 1513;
#endif

struct pci_dev *rtl_3COM905C_init_device(void);
int rtl_3COM905C_start_up_device(struct pci_dev *dev);
static void rtl_3COM905C_mdio_write(int phy_id, int location, int value);
static int rtl_3COM905C_mdio_read(int phy_id, int location);
static void rtl_3COM905C_mdio_sync(long ioaddr, int bits);
static int vortex_open(struct pci_dev *dev);
static void vortex_up(struct pci_dev *dev);
static void rtl_3COM905C_issue_and_wait(int cmd);
static void rtl_3COM905C_set_rx_mode(void);
static void rtl_3COM905C_acpi_set_WOL(void);
static int boomerang_rx(struct pci_dev *dev);
static void vortex_down(struct pci_dev *dev);
static void vortex_error(struct pci_dev *dev, int status);
static int vortex_close(struct pci_dev *dev);
static void vortex_remove_one (struct pci_dev *pdev);
static int rt_3c905c_send_packet(const char *buffer, size_t size);
void rt_3c905c_send_signal(void);

#define PCI_DEBUG 0
#define EEPROM_CONTENTS_DEBUG 0
#define MAC_ADDRESS_DEBUG 0
#define FUNCTION_CALL_DEBUG 0
#define INITIALIZATION_DEBUG 0
#define RECEIVE_DEBUG 0
#define PACKET_DATA_DEBUG 0
#define INTERRUPT_DEBUG 0
#define TRANSMIT_DEBUG 0
#define ERROR_DEBUG 1

#define SIGALRM2 RTL_SIGUSR1

#define DEBUG(x,y) if(x) printk y

#include <rtl_sync.h>
#include <rtl_core.h>
#include <rtl_printf.h>
#include <time.h>
#include <asm/io.h>
#include <rtl_posixio.h>
#include <sys/mman.h>
#include <errno.h>
#include <unistd.h>
#include <rtl.h>
#include <rtl_malloc.h>
#include <rtl_sema.h>
#include <rtl_sync.h>
#include "memcopy.h"

static int rtl_3COM905C_open (struct rtl_file *filp);
static int rtl_3COM905C_release (struct rtl_file *filp);
static ssize_t rtl_3COM905C_write(struct rtl_file *filp, const char *buf, size_t count, loff_t* ppos);
static int rtl_3COM905C_ioctl(struct rtl_file * filp, unsigned int request, unsigned long other);
static ssize_t rtl_3COM905C_read(struct rtl_file *filp, char *buf, size_t count, loff_t* ppos);