📄 rtl_e100_config.c
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/******************************************************************************* Copyright(c) 1999 - 2003 Intel Corporation. All rights reserved. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. The full GNU General Public License is included in this distribution in the file called LICENSE. Contact Information: Linux NICS <linux.nics@intel.com> Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497*******************************************************************************//*********************************************************************** ** INTEL CORPORATION ** ** This software is supplied under the terms of the license included ** above. All use of this driver must be in accordance with the terms ** of that license. ** ** Module Name: e100_config.c ** ** Abstract: Functions for configuring the network adapter. ** ** Environment: This file is intended to be specific to the Linux ** operating system. ** ** Changelog: June 29,2004: The file is changed by, Deyu Liu, ** to port the e100 adapter to RTLinux-GPL ** ** Computer Science Department, The Florida State University ** <bullleo2003@yahoo.com> ** ***********************************************************************/#include "drivers/rtl_e100_config.h"extern struct e100_private private_data;static void e100_config_long_rx( unsigned char enable);static const u8 def_config[] = { CB_CFIG_BYTE_COUNT, 0x08, 0x00, 0x00, 0x00, 0x00, 0x32, 0x07, 0x01, 0x00, 0x2e, 0x00, 0x60, 0x00, 0xf2, 0xc8, 0x00, 0x40, 0xf2, 0x80, 0x3f, 0x05};/** * e100_config_init_82557 - config the 82557 adapter * @private_data: atapter's private data struct * * This routine will initialize the 82557 configure block. * All other init functions will only set values that are * different from the 82557 default. */static void __devinite100_config_init_82557(void){ /* initialize config block */ memcpy(private_data.config, def_config, sizeof (def_config)); private_data.config[0] = CB_CFIG_BYTE_COUNT; /* just in case */ e100_config_ifs(); /* * Enable extended statistical counters (82558 and up) and TCO counters * (82559 and up) and set the statistical counters' mode in private_data * * stat. mode | TCO stat. bit (2) | Extended stat. bit (5) * ------------------------------------------------------------------ * Basic (557) | 0 | 1 * ------------------------------------------------------------------ * Extended (558) | 0 | 0 * ------------------------------------------------------------------ * TCO (559) | 1 | 1 * ------------------------------------------------------------------ * Reserved | 1 | 0 * ------------------------------------------------------------------ */ private_data.config[6] &= ~CB_CFIG_TCO_STAT; private_data.config[6] |= CB_CFIG_EXT_STAT_DIS; private_data.stat_mode = E100_BASIC_STATS; /* Setup for MII or 503 operation. The CRS+CDT bit should only be set */ /* when operating in 503 mode. */ if (private_data.phy_addr == 32) { private_data.config[8] &= ~CB_CFIG_503_MII; private_data.config[15] |= CB_CFIG_CRS_OR_CDT; } else { private_data.config[8] |= CB_CFIG_503_MII; private_data.config[15] &= ~CB_CFIG_CRS_OR_CDT; } e100_config_fc(); e100_config_force_dplx(); e100_config_promisc( false); e100_config_mulcast_enbl( false);}static void __devinite100_config_init_82558(void){ /* MWI enable. This should be turned on only if the adapter is a 82558/9 * and if the PCI command reg. has enabled the MWI bit. */ private_data.config[3] |= CB_CFIG_MWI_EN; private_data.config[6] &= ~CB_CFIG_EXT_TCB_DIS; if (private_data.rev_id >= D101MA_REV_ID) { /* this is 82559 and up - enable TCO counters */ private_data.config[6] |= CB_CFIG_TCO_STAT; private_data.config[6] |= CB_CFIG_EXT_STAT_DIS; private_data.stat_mode = E100_TCO_STATS; if ((private_data.rev_id < D102_REV_ID) && (private_data.params.b_params & PRM_XSUMRX) && (private_data.pdev->device != 0x1209)) { private_data.flags |= DF_CSUM_OFFLOAD; private_data.config[9] |= 1; } } else { /* this is 82558 */ private_data.config[6] &= ~CB_CFIG_TCO_STAT; private_data.config[6] &= ~CB_CFIG_EXT_STAT_DIS; private_data.stat_mode = E100_EXTENDED_STATS; } e100_config_long_rx( true);}static void __devinite100_config_init_82550(void){ /* The D102 chip allows for 32 config bytes. This value is * supposed to be in Byte 0. Just add the extra bytes to * what was already setup in the block. */ private_data.config[0] += CB_CFIG_D102_BYTE_COUNT; /* now we need to enable the extended RFD. When this is * enabled, the immediated receive data buffer starts at offset * 32 from the RFD base address, instead of at offset 16. */ private_data.config[7] |= CB_CFIG_EXTENDED_RFD; /* put the chip into D102 receive mode. This is necessary * for any parsing and offloading features. */ private_data.config[22] = CB_CFIG_RECEIVE_GAMLA_MODE; /* set the flag if checksum offloading was enabled */ if (private_data.params.b_params & PRM_XSUMRX) { private_data.flags |= DF_CSUM_OFFLOAD; }}/* Initialize the adapter's configure block */void __devinite100_config_init(){ e100_config_init_82557(); if (private_data.flags & IS_BACHELOR) e100_config_init_82558(); if (private_data.rev_id >= D102_REV_ID) e100_config_init_82550();}/** * e100_force_config - force a configure command * @private_data: atapter's private data struct * * This routine will force a configure command to the adapter. * The command will be executed in polled mode as interrupts * are _disabled_ at this time. * * Returns: * true: if the configure command was successfully issued and completed * false: otherwise */unsigned chare100_force_config(){ spin_lock_bh(&(private_data.config_lock)); private_data.config[0] = CB_CFIG_BYTE_COUNT; if (private_data.rev_id >= D102_REV_ID) { /* The D102 chip allows for 32 config bytes. This value is supposed to be in Byte 0. Just add the extra bytes to what was already setup in the block. */ private_data.config[0] += CB_CFIG_D102_BYTE_COUNT; } spin_unlock_bh(&(private_data.config_lock)); // although we call config outside the lock, there is no // race condition because config byte count has maximum value return e100_config();}/** * e100_config - issue a configure command * @private_data: atapter's private data struct * * This routine will issue a configure command to the 82557. * This command will be executed in polled mode as interrupts * are _disabled_ at this time. * * Returns: * true: if the configure command was successfully issued and completed * false: otherwise */unsigned chare100_config(){ cb_header_t *pntcb_hdr; unsigned char res = true; nxmit_cb_entry_t *cmd; if (private_data.config[0] == 0) { goto exit; } if ((cmd = e100_alloc_non_tx_cmd()) == NULL) { res = false; goto exit; } pntcb_hdr = (cb_header_t *) cmd->non_tx_cmd; pntcb_hdr->cb_cmd =0; pntcb_hdr->cb_cmd = __constant_cpu_to_le16(CB_CONFIGURE); spin_lock_bh(&private_data.config_lock); if (private_data.config[0] < CB_CFIG_MIN_PARAMS) { private_data.config[0] = CB_CFIG_MIN_PARAMS; } /* Copy the device's config block to the device's memory */ memcpy(cmd->non_tx_cmd->ntcb.config.cfg_byte, private_data.config, private_data.config[0]); /* reset number of bytes to config next time */ private_data.config[0] = 0; spin_unlock_bh(&private_data.config_lock); res = e100_exec_non_cu_cmd( cmd);exit: /*modified if (netif_running(private_data.device)) netif_wake_queue(private_data.device);*/ return res;}/** * e100_config_fc - config flow-control state * @private_data: adapter's private data struct * * This routine will enable or disable flow control support in the adapter's * config block. Flow control will be enable only if requested using the command * line option, and if the link is flow-contorl capable (both us and the link * partner). But, if link partner is capable of autoneg, but not capable of * flow control, received PAUSE frames are still honored. */voide100_config_fc(){ unsigned char enable = false; /* 82557 doesn't support fc. Don't touch this option */ if (!(private_data.flags & IS_BACHELOR)) return; /* Enable fc if requested and if the link supports it */ if ((private_data.params.b_params & PRM_FC) && (private_data.flags & (DF_LINK_FC_CAP | DF_LINK_FC_TX_ONLY))) { enable = true; } spin_lock_bh(&(private_data.config_lock)); if (enable) { if (private_data.flags & DF_LINK_FC_TX_ONLY) { /* If link partner is capable of autoneg, but */ /* not capable of flow control, Received PAUSE */ /* frames are still honored, i.e., */ /* transmitted frames would be paused by */ /* incoming PAUSE frames */ private_data.config[16] = DFLT_NO_FC_DELAY_LSB; private_data.config[17] = DFLT_NO_FC_DELAY_MSB; private_data.config[19] &= ~(CB_CFIG_FC_RESTOP | CB_CFIG_FC_RESTART); private_data.config[19] |= CB_CFIG_FC_REJECT; private_data.config[19] &= ~CB_CFIG_TX_FC_DIS; } else { private_data.config[16] = DFLT_FC_DELAY_LSB; private_data.config[17] = DFLT_FC_DELAY_MSB; private_data.config[19] |= CB_CFIG_FC_OPTS; private_data.config[19] &= ~CB_CFIG_TX_FC_DIS; } } else { private_data.config[16] = DFLT_NO_FC_DELAY_LSB; private_data.config[17] = DFLT_NO_FC_DELAY_MSB; private_data.config[19] &= ~CB_CFIG_FC_OPTS; private_data.config[19] |= CB_CFIG_TX_FC_DIS; } E100_CONFIG(&private_data, 19); spin_unlock_bh(&(private_data.config_lock)); return;}/**
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