temp.hier_info

完整的4*4键盘程序

|temp
p <= <GND>
reset => yanshi:roll:3:movskipx.reset
reset => yanshi:roll:2:movskipx.reset
reset => yanshi:roll:1:movskipx.reset
reset => yanshi:roll:0:movskipx.reset
reset => outled[0]~reg0.ACLR
reset => outled[1]~reg0.ACLR
reset => outled[2]~reg0.ACLR
reset => outled[3]~reg0.ACLR
reset => outled[4]~reg0.ACLR
reset => outled[5]~reg0.ACLR
reset => outled[6]~reg0.ACLR
reset => bb[1].ACLR
reset => bb[0].ACLR
reset => chuout[3].ENA
reset => chuout[2].ENA
reset => chuout[1].ENA
reset => chuout[0].ENA
inclk => keyclk[17].CLK
inclk => keyclk[16].CLK
inclk => keyclk[15].CLK
inclk => keyclk[14].CLK
inclk => keyclk[13].CLK
inclk => keyclk[12].CLK
inclk => keyclk[11].CLK
inclk => keyclk[10].CLK
inclk => keyclk[9].CLK
inclk => keyclk[8].CLK
inclk => keyclk[7].CLK
inclk => keyclk[6].CLK
inclk => keyclk[5].CLK
inclk => keyclk[4].CLK
inclk => keyclk[3].CLK
inclk => keyclk[2].CLK
inclk => keyclk[1].CLK
inclk => keyclk[0].CLK
inclk => keyclkout.CLK
inkey[0] => yanshi:roll:0:movskipx.clk
inkey[0] => Mux37.IN19
inkey[0] => Mux36.IN19
inkey[0] => Mux35.IN19
inkey[0] => Mux34.IN19
inkey[0] => Mux33.IN19
inkey[0] => Mux32.IN19
inkey[0] => Mux31.IN19
inkey[1] => yanshi:roll:1:movskipx.clk
inkey[1] => Mux37.IN18
inkey[1] => Mux36.IN18
inkey[1] => Mux35.IN18
inkey[1] => Mux34.IN18
inkey[1] => Mux33.IN18
inkey[1] => Mux32.IN18
inkey[1] => Mux31.IN18
inkey[2] => yanshi:roll:2:movskipx.clk
inkey[2] => Mux37.IN17
inkey[2] => Mux36.IN17
inkey[2] => Mux35.IN17
inkey[2] => Mux34.IN17
inkey[2] => Mux33.IN17
inkey[2] => Mux32.IN17
inkey[2] => Mux31.IN17
inkey[3] => yanshi:roll:3:movskipx.clk
inkey[3] => Mux37.IN16
inkey[3] => Mux36.IN16
inkey[3] => Mux35.IN16
inkey[3] => Mux34.IN16
inkey[3] => Mux33.IN16
inkey[3] => Mux32.IN16
inkey[3] => Mux31.IN16
outkey[0] <= chuout[0].DB_MAX_OUTPUT_PORT_TYPE
outkey[1] <= chuout[1].DB_MAX_OUTPUT_PORT_TYPE
outkey[2] <= chuout[2].DB_MAX_OUTPUT_PORT_TYPE
outkey[3] <= chuout[3].DB_MAX_OUTPUT_PORT_TYPE
outled[0] <= outled[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outled[1] <= outled[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outled[2] <= outled[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outled[3] <= outled[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outled[4] <= outled[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outled[5] <= outled[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
outled[6] <= outled[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|temp|yanshi:\roll:0:movskipx
a => Mux2.IN1
a => Mux2.IN2
a => Mux2.IN3
a => Mux1.IN2
a => Mux1.IN3
clk => p_state[1].CLK
clk => p_state[0].CLK
reset => p_state[1].ACLR
reset => p_state[0].ACLR
b <= Mux0.DB_MAX_OUTPUT_PORT_TYPE


|temp|yanshi:\roll:1:movskipx
a => Mux2.IN1
a => Mux2.IN2
a => Mux2.IN3
a => Mux1.IN2
a => Mux1.IN3
clk => p_state[1].CLK
clk => p_state[0].CLK
reset => p_state[1].ACLR
reset => p_state[0].ACLR
b <= Mux0.DB_MAX_OUTPUT_PORT_TYPE


|temp|yanshi:\roll:2:movskipx
a => Mux2.IN1
a => Mux2.IN2
a => Mux2.IN3
a => Mux1.IN2
a => Mux1.IN3
clk => p_state[1].CLK
clk => p_state[0].CLK
reset => p_state[1].ACLR
reset => p_state[0].ACLR
b <= Mux0.DB_MAX_OUTPUT_PORT_TYPE


|temp|yanshi:\roll:3:movskipx
a => Mux2.IN1
a => Mux2.IN2
a => Mux2.IN3
a => Mux1.IN2
a => Mux1.IN3
clk => p_state[1].CLK
clk => p_state[0].CLK
reset => p_state[1].ACLR
reset => p_state[0].ACLR
b <= Mux0.DB_MAX_OUTPUT_PORT_TYPE