serialport.pre

采用PICC18编写的单片机源代码

near bit TMR2IE @ ((unsigned)&PIE1*8)+1;
near bit TMR1IE @ ((unsigned)&PIE1*8)+0;



volatile near bit IBF @ ((unsigned)&TRISE*8)+7;
volatile near bit OBF @ ((unsigned)&TRISE*8)+6;
volatile near bit IBOV @ ((unsigned)&TRISE*8)+5;
volatile near bit PSPMODE @ ((unsigned)&TRISE*8)+4;
volatile near bit TRISE2 @ ((unsigned)&TRISE*8)+2;
volatile near bit TRISE1 @ ((unsigned)&TRISE*8)+1;
volatile near bit TRISE0 @ ((unsigned)&TRISE*8)+0;


volatile near bit TRISD7 @ ((unsigned)&TRISD*8)+7;
volatile near bit TRISD6 @ ((unsigned)&TRISD*8)+6;
volatile near bit TRISD5 @ ((unsigned)&TRISD*8)+5;
volatile near bit TRISD4 @ ((unsigned)&TRISD*8)+4;
volatile near bit TRISD3 @ ((unsigned)&TRISD*8)+3;
volatile near bit TRISD2 @ ((unsigned)&TRISD*8)+2;
volatile near bit TRISD1 @ ((unsigned)&TRISD*8)+1;
volatile near bit TRISD0 @ ((unsigned)&TRISD*8)+0;



volatile near bit TRISC7 @ ((unsigned)&TRISC*8)+7;
volatile near bit TRISC6 @ ((unsigned)&TRISC*8)+6;
volatile near bit TRISC5 @ ((unsigned)&TRISC*8)+5;
volatile near bit TRISC4 @ ((unsigned)&TRISC*8)+4;
volatile near bit TRISC3 @ ((unsigned)&TRISC*8)+3;
volatile near bit TRISC2 @ ((unsigned)&TRISC*8)+2;
volatile near bit TRISC1 @ ((unsigned)&TRISC*8)+1;
volatile near bit TRISC0 @ ((unsigned)&TRISC*8)+0;


volatile near bit TRISB7 @ ((unsigned)&TRISB*8)+7;
volatile near bit TRISB6 @ ((unsigned)&TRISB*8)+6;
volatile near bit TRISB5 @ ((unsigned)&TRISB*8)+5;
volatile near bit TRISB4 @ ((unsigned)&TRISB*8)+4;
volatile near bit TRISB3 @ ((unsigned)&TRISB*8)+3;
volatile near bit TRISB2 @ ((unsigned)&TRISB*8)+2;
volatile near bit TRISB1 @ ((unsigned)&TRISB*8)+1;
volatile near bit TRISB0 @ ((unsigned)&TRISB*8)+0;


volatile near bit TRISA6 @ ((unsigned)&TRISA*8)+6;
volatile near bit TRISA5 @ ((unsigned)&TRISA*8)+5;
volatile near bit TRISA4 @ ((unsigned)&TRISA*8)+4;
volatile near bit TRISA3 @ ((unsigned)&TRISA*8)+3;
volatile near bit TRISA2 @ ((unsigned)&TRISA*8)+2;
volatile near bit TRISA1 @ ((unsigned)&TRISA*8)+1;
volatile near bit TRISA0 @ ((unsigned)&TRISA*8)+0;



volatile near bit LE0 @ ((unsigned)&LATE*8)+0;
volatile near bit LE1 @ ((unsigned)&LATE*8)+1;
volatile near bit LE2 @ ((unsigned)&LATE*8)+2;

volatile near bit LATE0 @ ((unsigned)&LATE*8)+0;
volatile near bit LATE1 @ ((unsigned)&LATE*8)+1;
volatile near bit LATE2 @ ((unsigned)&LATE*8)+2;


volatile near bit LD0 @ ((unsigned)&LATD*8)+0;
volatile near bit LD1 @ ((unsigned)&LATD*8)+1;
volatile near bit LD2 @ ((unsigned)&LATD*8)+2;
volatile near bit LD3 @ ((unsigned)&LATD*8)+3;
volatile near bit LD4 @ ((unsigned)&LATD*8)+4;
volatile near bit LD5 @ ((unsigned)&LATD*8)+5;
volatile near bit LD6 @ ((unsigned)&LATD*8)+6;
volatile near bit LD7 @ ((unsigned)&LATD*8)+7;

volatile near bit LATD0 @ ((unsigned)&LATD*8)+0;
volatile near bit LATD1 @ ((unsigned)&LATD*8)+1;
volatile near bit LATD2 @ ((unsigned)&LATD*8)+2;
volatile near bit LATD3 @ ((unsigned)&LATD*8)+3;
volatile near bit LATD4 @ ((unsigned)&LATD*8)+4;
volatile near bit LATD5 @ ((unsigned)&LATD*8)+5;
volatile near bit LATD6 @ ((unsigned)&LATD*8)+6;
volatile near bit LATD7 @ ((unsigned)&LATD*8)+7;



volatile near bit LC0 @ ((unsigned)&LATC*8)+0;
volatile near bit LC1 @ ((unsigned)&LATC*8)+1;
volatile near bit LC2 @ ((unsigned)&LATC*8)+2;
volatile near bit LC3 @ ((unsigned)&LATC*8)+3;
volatile near bit LC4 @ ((unsigned)&LATC*8)+4;
volatile near bit LC5 @ ((unsigned)&LATC*8)+5;
volatile near bit LC6 @ ((unsigned)&LATC*8)+6;
volatile near bit LC7 @ ((unsigned)&LATC*8)+7;

volatile near bit LATC0 @ ((unsigned)&LATC*8)+0;
volatile near bit LATC1 @ ((unsigned)&LATC*8)+1;
volatile near bit LATC2 @ ((unsigned)&LATC*8)+2;
volatile near bit LATC3 @ ((unsigned)&LATC*8)+3;
volatile near bit LATC4 @ ((unsigned)&LATC*8)+4;
volatile near bit LATC5 @ ((unsigned)&LATC*8)+5;
volatile near bit LATC6 @ ((unsigned)&LATC*8)+6;
volatile near bit LATC7 @ ((unsigned)&LATC*8)+7;


volatile near bit LB0 @ ((unsigned)&LATB*8)+0;
volatile near bit LB1 @ ((unsigned)&LATB*8)+1;
volatile near bit LB2 @ ((unsigned)&LATB*8)+2;
volatile near bit LB3 @ ((unsigned)&LATB*8)+3;
volatile near bit LB4 @ ((unsigned)&LATB*8)+4;
volatile near bit LB5 @ ((unsigned)&LATB*8)+5;
volatile near bit LB6 @ ((unsigned)&LATB*8)+6;
volatile near bit LB7 @ ((unsigned)&LATB*8)+7;

volatile near bit LATB0 @ ((unsigned)&LATB*8)+0;
volatile near bit LATB1 @ ((unsigned)&LATB*8)+1;
volatile near bit LATB2 @ ((unsigned)&LATB*8)+2;
volatile near bit LATB3 @ ((unsigned)&LATB*8)+3;
volatile near bit LATB4 @ ((unsigned)&LATB*8)+4;
volatile near bit LATB5 @ ((unsigned)&LATB*8)+5;
volatile near bit LATB6 @ ((unsigned)&LATB*8)+6;
volatile near bit LATB7 @ ((unsigned)&LATB*8)+7;


volatile near bit LA0 @ ((unsigned)&LATA*8)+0;
volatile near bit LA1 @ ((unsigned)&LATA*8)+1;
volatile near bit LA2 @ ((unsigned)&LATA*8)+2;
volatile near bit LA3 @ ((unsigned)&LATA*8)+3;
volatile near bit LA4 @ ((unsigned)&LATA*8)+4;
volatile near bit LA5 @ ((unsigned)&LATA*8)+5;
volatile near bit LA6 @ ((unsigned)&LATA*8)+6;

volatile near bit LATA0 @ ((unsigned)&LATA*8)+0;
volatile near bit LATA1 @ ((unsigned)&LATA*8)+1;
volatile near bit LATA2 @ ((unsigned)&LATA*8)+2;
volatile near bit LATA3 @ ((unsigned)&LATA*8)+3;
volatile near bit LATA4 @ ((unsigned)&LATA*8)+4;
volatile near bit LATA5 @ ((unsigned)&LATA*8)+5;
volatile near bit LATA6 @ ((unsigned)&LATA*8)+6;



volatile near bit RE0 @ ((unsigned)&PORTE*8)+0;
volatile near bit RE1 @ ((unsigned)&PORTE*8)+1;
volatile near bit RE2 @ ((unsigned)&PORTE*8)+2;


volatile near bit RD0 @ ((unsigned)&PORTD*8)+0;
volatile near bit RD1 @ ((unsigned)&PORTD*8)+1;
volatile near bit RD2 @ ((unsigned)&PORTD*8)+2;
volatile near bit RD3 @ ((unsigned)&PORTD*8)+3;
volatile near bit RD4 @ ((unsigned)&PORTD*8)+4;
volatile near bit RD5 @ ((unsigned)&PORTD*8)+5;
volatile near bit RD6 @ ((unsigned)&PORTD*8)+6;
volatile near bit RD7 @ ((unsigned)&PORTD*8)+7;



volatile near bit RC0 @ ((unsigned)&PORTC*8)+0;
volatile near bit RC1 @ ((unsigned)&PORTC*8)+1;
volatile near bit RC2 @ ((unsigned)&PORTC*8)+2;
volatile near bit RC3 @ ((unsigned)&PORTC*8)+3;
volatile near bit RC4 @ ((unsigned)&PORTC*8)+4;
volatile near bit RC5 @ ((unsigned)&PORTC*8)+5;
volatile near bit RC6 @ ((unsigned)&PORTC*8)+6;
volatile near bit RC7 @ ((unsigned)&PORTC*8)+7;


volatile near bit RB0 @ ((unsigned)&PORTB*8)+0;
volatile near bit RB1 @ ((unsigned)&PORTB*8)+1;
volatile near bit RB2 @ ((unsigned)&PORTB*8)+2;
volatile near bit RB3 @ ((unsigned)&PORTB*8)+3;
volatile near bit RB4 @ ((unsigned)&PORTB*8)+4;
volatile near bit RB5 @ ((unsigned)&PORTB*8)+5;
volatile near bit RB6 @ ((unsigned)&PORTB*8)+6;
volatile near bit RB7 @ ((unsigned)&PORTB*8)+7;


volatile near bit RA0 @ ((unsigned)&PORTA*8)+0;
volatile near bit RA1 @ ((unsigned)&PORTA*8)+1;
volatile near bit RA2 @ ((unsigned)&PORTA*8)+2;
volatile near bit RA3 @ ((unsigned)&PORTA*8)+3;
volatile near bit RA4 @ ((unsigned)&PORTA*8)+4;
volatile near bit RA5 @ ((unsigned)&PORTA*8)+5;
volatile near bit RA6 @ ((unsigned)&PORTA*8)+6;

# 293 "E:\workall\LAMP2\PICC18\Reconv\pic18.h"
extern unsigned char eeprom_read(unsigned int address);
extern void eeprom_write(unsigned int address,unsigned char data);



extern unsigned char flash_read(unsigned long addr);



extern void flash_write(const unsigned char *,unsigned int,far unsigned char *);


extern void flash_erase(unsigned long addr);

# 323
extern unsigned int config_read(unsigned char reg_no);
extern void config_write(unsigned char reg_no, unsigned int dataword);


extern unsigned int device_id_read(void);


extern unsigned char idloc_read(unsigned char reg_no);
extern void idloc_write(unsigned char reg_no,unsigned char data);


extern void initiate_write(void);

# 353
extern unsigned char checksum8(unsigned long startAddr, unsigned long length);
extern unsigned int checksum16(unsigned long startAddr, unsigned long length);
extern unsigned long checksum32(unsigned long startAddr, unsigned long length);

# 13 "E:\workall\LAMP2\PICC18\Reconv\main.h"
unsigned char dispBuf[5];
unsigned char taskNo;
unsigned char FaceReg;
unsigned char FaceChnNo;
unsigned char FaceEmerNo;
unsigned char Intpart[3],Decm[2];
static bit flag_1Sec;

# 40 "E:\workall\LAMP2\PICC18\Reconv\serialPort.h"
unsigned char selfAddr;
unsigned char recBuf[3];
unsigned char sendBuf[4][21];
unsigned char NumRecData;
unsigned char flagRecEnd;
void serialPort_Initial(void);
void DoInstru(void);
void SetSelfAddr(unsigned char setMode);
void ChkRecEnd(void);

# 8 "E:\workall\LAMP2\PICC18\Reconv\serialPort.c"
void serialPort_Initial(void)
{
unsigned char tmpCtr,tmpCtr2;
TXSTA=0x04;
RCSTA=0x80;
TRISC=TRISC|0x80;
TRISC=TRISC&0xBF;
SPBRG=16000000/16/9600-1;
CREN=1;
TXEN=1;

for(tmpCtr=0;tmpCtr<3;tmpCtr++)
{
recBuf[tmpCtr]=0;
}

for(tmpCtr=0;tmpCtr<4;tmpCtr++)
{
for(tmpCtr2=0;tmpCtr2<21;tmpCtr2++)
{
sendBuf[tmpCtr][tmpCtr2]=0;
}
}
NumRecData=0;
flagRecEnd=0x00;
selfAddr=eeprom_read(0x04+4+16+84);
}

# 40
void sendByte(unsigned char Data)
{
TXREG=Data;
while(1)
{
if(TXIF==1) break;
}
}

# 53
void sendChnEmerTime(unsigned char ChnNo)
{
unsigned char tmpCtr;
for(tmpCtr=0;tmpCtr<21;tmpCtr++)
{
sendByte(sendBuf[ChnNo][tmpCtr]);
}
}

# 66
void DoInstru(void)
{
unsigned char tmpCtr;
unsigned char ChkSum;

if(flagRecEnd==0xFF)
{
flagRecEnd=0x00;
if(recBuf[0]==selfAddr)
{

ChkSum=0;
for(tmpCtr=0;tmpCtr<3-1;tmpCtr++)
{
ChkSum+=recBuf[tmpCtr];
}
if(ChkSum==recBuf[3-1])
{
if(recBuf[1]==0)
{
sendChnEmerTime(0);
}
else if(recBuf[1]==1)
{
sendChnEmerTime(1);
}
else if(recBuf[1]==2)
{
sendChnEmerTime(2);
}
else if(recBuf[1]==3)
{
sendChnEmerTime(3);
}
}
else
{
return;
}
}
}
}

# 114
void SetSelfAddr(unsigned char setMode)
{
if(setMode==1)
{
selfAddr=selfAddr+100;
}
else if(setMode==2)
{
selfAddr=selfAddr+10;
}
else if(setMode==3)
{
selfAddr=selfAddr+1;
}
if(selfAddr>127)
{
selfAddr=1;
}
eeprom_write(0x04+4+16+84,selfAddr);
}

# 140
void ChkRecEnd(void)
{
if(NumRecData==3)
{
NumRecData=0;
flagRecEnd=0xFF;
}
else
{
flagRecEnd=0x00;
}
}