📄 autoring02.rpt
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- 3 - C 23 OR2 s 0 3 0 3 |CLOCKRUN:1|~610~1
- 6 - C 05 OR2 0 4 0 1 |CLOCKRUN:1|:726
- 8 - C 05 OR2 0 4 0 1 |CLOCKRUN:1|:732
- 1 - C 05 OR2 0 4 0 1 |CLOCKRUN:1|:738
- 8 - C 11 OR2 0 4 0 1 |CLOCKRUN:1|:884
- 5 - C 11 OR2 0 4 0 1 |CLOCKRUN:1|:890
- 4 - C 23 OR2 s 0 4 0 1 |CLOCKRUN:1|~926~1
- 5 - C 23 OR2 s 0 4 0 1 |CLOCKRUN:1|~932~1
- 1 - C 08 AND2 s ! 0 2 0 5 |CLOCKRUN:1|~938~1
- 3 - C 35 OR2 s 0 4 0 1 |CLOCKRUN:1|~944~1
- 8 - C 25 OR2 s 0 4 0 1 |CLOCKRUN:1|~950~1
- 7 - C 35 OR2 s 0 4 0 1 |CLOCKRUN:1|~956~1
- 8 - C 23 AND2 s ! 0 3 0 7 |CLOCKRUN:1|~962~1
- 6 - C 24 OR2 s 0 4 0 1 |CLOCKRUN:1|~968~1
- 1 - D 27 AND2 1 0 1 0 |RINGUP:3|:1012
- 4 - E 23 DFFE + 0 1 1 0 |SEGDIS01:72|:4
- 3 - E 23 DFFE + 0 2 1 0 |SEGDIS01:72|:6
- 1 - E 23 DFFE + 0 2 1 0 |SEGDIS01:72|:8
- 6 - E 23 DFFE + 0 2 1 0 |SEGDIS01:72|:10
- 5 - E 23 DFFE + 0 1 1 0 |SEGDIS01:72|:12
- 2 - A 16 DFFE + 0 0 1 0 |SEGDIS01:72|:14
- 7 - E 23 DFFE + 0 2 1 0 |SEGDIS01:72|:16
- 8 - C 35 AND2 0 2 0 1 |SEGDIS01:72|:101
- 8 - C 22 DFFE + 0 2 1 0 |SEGDIS02:73|:4
- 7 - C 22 DFFE + 0 3 1 0 |SEGDIS02:73|:6
- 1 - C 36 DFFE + 0 2 1 0 |SEGDIS02:73|:8
- 3 - C 22 DFFE + 0 3 1 0 |SEGDIS02:73|:10
- 5 - C 22 DFFE + 0 3 1 0 |SEGDIS02:73|:12
- 6 - C 22 DFFE + 0 3 1 0 |SEGDIS02:73|:14
- 2 - C 22 DFFE + 0 3 1 0 |SEGDIS02:73|:16
- 2 - C 23 AND2 s ! 0 2 0 4 |SEGDIS02:73|~208~1
- 2 - C 12 DFFE + 0 2 1 0 |SEGDIS02:74|:4
- 6 - C 11 DFFE + 0 3 1 0 |SEGDIS02:74|:6
- 8 - C 12 DFFE + 0 2 1 0 |SEGDIS02:74|:8
- 3 - C 12 DFFE + 0 3 1 0 |SEGDIS02:74|:10
- 3 - C 11 DFFE + 0 3 1 0 |SEGDIS02:74|:12
- 7 - C 11 DFFE + 0 3 1 0 |SEGDIS02:74|:14
- 6 - C 12 DFFE + 0 3 1 0 |SEGDIS02:74|:16
- 2 - C 32 DFFE + 0 4 1 0 |SEGDIS:15|:4
- 4 - C 32 DFFE + 0 4 1 0 |SEGDIS:15|:6
- 3 - C 32 DFFE + 0 4 1 0 |SEGDIS:15|:8
- 8 - C 32 DFFE + 0 4 1 0 |SEGDIS:15|:10
- 6 - C 32 DFFE + 0 4 1 0 |SEGDIS:15|:12
- 7 - C 32 DFFE + 0 4 1 0 |SEGDIS:15|:14
- 1 - C 32 DFFE + 0 4 1 0 |SEGDIS:15|:16
- 5 - C 35 AND2 0 4 0 1 |SEGDIS:15|:291
- 5 - C 32 OR2 ! 0 4 0 1 |SEGDIS:15|:339
- 5 - C 03 DFFE + 0 4 1 0 |SEGDIS:17|:4
- 2 - C 03 DFFE + 0 4 1 0 |SEGDIS:17|:6
- 1 - C 03 DFFE + 0 4 1 0 |SEGDIS:17|:8
- 6 - C 03 DFFE + 0 4 1 0 |SEGDIS:17|:10
- 4 - C 03 DFFE + 0 4 1 0 |SEGDIS:17|:12
- 3 - C 03 DFFE + 0 4 1 0 |SEGDIS:17|:14
- 7 - C 03 DFFE + 0 4 1 0 |SEGDIS:17|:16
- 4 - C 09 DFFE + 0 4 1 0 |SEGDIS:19|:4
- 8 - C 09 DFFE + 0 4 1 0 |SEGDIS:19|:6
- 5 - C 09 DFFE + 0 4 1 0 |SEGDIS:19|:8
- 2 - C 09 DFFE + 0 4 1 0 |SEGDIS:19|:10
- 6 - C 09 DFFE + 0 4 1 0 |SEGDIS:19|:12
- 3 - C 09 DFFE + 0 4 1 0 |SEGDIS:19|:14
- 7 - C 09 DFFE + 0 4 1 0 |SEGDIS:19|:16
- 1 - C 04 DFFE + 0 0 0 1 |TIMESET:4|adjsta~1
- 2 - C 10 DFFE + 0 1 0 3 |TIMESET:4|adjsta~2
- 5 - C 21 DFFE + 0 1 0 6 |TIMESET:4|adjsta~3
- 7 - C 21 DFFE + 0 1 0 2 |TIMESET:4|adjsta~4
- 3 - C 21 DFFE + 0 1 0 2 |TIMESET:4|adjsta~5
- 4 - C 21 DFFE + 0 1 0 6 |TIMESET:4|adjsta~6
- 6 - C 21 AND2 s 0 4 0 5 |TIMESET:4|adjsta~7~2
- 1 - C 10 DFFE + 0 2 0 8 |TIMESET:4|adjsta~7
- 3 - C 25 AND2 0 2 0 2 |TIMESET:4|LPM_ADD_SUB:247|addcore:adder|:59
- 6 - C 10 AND2 0 2 0 1 |TIMESET:4|LPM_ADD_SUB:353|addcore:adder|:59
- 1 - C 14 DFFE + 0 0 0 20 |TIMESET:4|setmark (|TIMESET:4|:26)
- 2 - C 24 DFFE + 0 2 0 1 |TIMESET:4|hourhigh1 (|TIMESET:4|:27)
- 1 - C 24 DFFE + 0 1 0 2 |TIMESET:4|hourhigh0 (|TIMESET:4|:28)
- 2 - C 25 DFFE + 0 3 0 1 |TIMESET:4|hourlow3 (|TIMESET:4|:29)
- 6 - C 25 DFFE + 0 3 0 2 |TIMESET:4|hourlow2 (|TIMESET:4|:30)
- 1 - C 21 DFFE + 0 3 0 2 |TIMESET:4|hourlow1 (|TIMESET:4|:31)
- 2 - C 21 DFFE + 0 2 0 3 |TIMESET:4|hourlow0 (|TIMESET:4|:32)
- 7 - C 08 DFFE + 0 3 0 2 |TIMESET:4|sechigh2 (|TIMESET:4|:40)
- 4 - C 08 DFFE + 0 3 0 3 |TIMESET:4|sechigh1 (|TIMESET:4|:41)
- 5 - C 08 DFFE + 0 2 0 4 |TIMESET:4|sechigh0 (|TIMESET:4|:42)
- 5 - C 10 DFFE + 0 3 0 2 |TIMESET:4|seclow3 (|TIMESET:4|:43)
- 7 - C 10 DFFE + 0 3 0 3 |TIMESET:4|seclow2 (|TIMESET:4|:44)
- 3 - C 10 DFFE + 0 2 0 4 |TIMESET:4|seclow1 (|TIMESET:4|:45)
- 4 - C 10 DFFE + 0 3 0 5 |TIMESET:4|seclow0 (|TIMESET:4|:46)
- 8 - C 10 AND2 s ! 0 3 0 3 |TIMESET:4|~453~1
- 3 - C 08 AND2 s ! 0 2 0 1 |TIMESET:4|~516~1
- 5 - C 25 AND2 s ! 0 2 0 1 |TIMESET:4|~747~1
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
^ = Increased input delay
* = PCI I/O is enabled
p = Packed register
Device-Specific Information: f:\autoring\autoring02.rpt
autoring02
** FASTTRACK INTERCONNECT UTILIZATION **
Row FastTrack Interconnect:
Global Left Half- Right Half-
FastTrack FastTrack FastTrack
Row Interconnect Interconnect Interconnect Input Pins Output Pins Bidir Pins
A: 0/144( 0%) 1/ 72( 1%) 0/ 72( 0%) 0/16( 0%) 2/16( 12%) 0/16( 0%)
B: 0/144( 0%) 1/ 72( 1%) 1/ 72( 1%) 0/16( 0%) 2/16( 12%) 0/16( 0%)
C: 41/144( 28%) 10/ 72( 13%) 7/ 72( 9%) 0/16( 0%) 8/16( 50%) 0/16( 0%)
D: 0/144( 0%) 0/ 72( 0%) 1/ 72( 1%) 0/16( 0%) 1/16( 6%) 0/16( 0%)
E: 0/144( 0%) 0/ 72( 0%) 8/ 72( 11%) 0/16( 0%) 6/16( 37%) 0/16( 0%)
F: 2/144( 1%) 1/ 72( 1%) 0/ 72( 0%) 0/16( 0%) 4/16( 25%) 0/16( 0%)
Column FastTrack Interconnect:
FastTrack
Column Interconnect Input Pins Output Pins Bidir Pins
01: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
02: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
03: 4/24( 16%) 0/4( 0%) 2/4( 50%) 0/4( 0%)
04: 3/24( 12%) 0/4( 0%) 3/4( 75%) 0/4( 0%)
05: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
06: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
07: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
08: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
09: 3/24( 12%) 0/4( 0%) 3/4( 75%) 0/4( 0%)
10: 2/24( 8%) 0/4( 0%) 2/4( 50%) 0/4( 0%)
11: 3/24( 12%) 0/4( 0%) 2/4( 50%) 0/4( 0%)
12: 3/24( 12%) 0/4( 0%) 2/4( 50%) 0/4( 0%)
13: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
14: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
15: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
16: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
17: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
18: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
19: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
20: 0/24( 0%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
21: 3/24( 12%) 0/4( 0%) 2/4( 50%) 0/4( 0%)
22: 2/24( 8%) 0/4( 0%) 2/4( 50%) 0/4( 0%)
23: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
24: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
25: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
26: 0/24( 0%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
27: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
28: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
29: 0/24( 0%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
30: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
31: 2/24( 8%) 0/4( 0%) 2/4( 50%) 0/4( 0%)
32: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
33: 0/24( 0%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
34: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
35: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
36: 2/24( 8%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
EA: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
Device-Specific Information: f:\autoring\autoring02.rpt
autoring02
** CLOCK SIGNALS **
Type Fan-out Name
INPUT 42 sclk
INPUT 20 clk
INPUT 13 keyup
INPUT 7 enter
INPUT 1 begend
Device-Specific Information: f:\autoring\autoring02.rpt
autoring02
** CLEAR SIGNALS **
Type Fan-out Name
INPUT 22 reset
Device-Specific Information: f:\autoring\autoring02.rpt
autoring02
** EQUATIONS **
begend : INPUT;
clk : INPUT;
enter : INPUT;
keyup : INPUT;
reset : INPUT;
sclk : INPUT;
-- Node name is 'alarm'
-- Equation name is 'alarm', type is output
alarm = _LC1_D27;
-- Node name is 'hh0'
-- Equation name is 'hh0', type is output
hh0 = _LC7_E23;
-- Node name is 'hh1'
-- Equation name is 'hh1', type is output
hh1 = _LC2_A16;
-- Node name is 'hh2'
-- Equation name is 'hh2', type is output
hh2 = _LC5_E23;
-- Node name is 'hh3'
-- Equation name is 'hh3', type is output
hh3 = _LC6_E23;
-- Node name is 'hh4'
-- Equation name is 'hh4', type is output
hh4 = _LC1_E23;
-- Node name is 'hh5'
-- Equation name is 'hh5', type is output
hh5 = _LC3_E23;
-- Node name is 'hh6'
-- Equation name is 'hh6', type is output
hh6 = _LC4_E23;
-- Node name is 'hh7'
-- Equation name is 'hh7', type is output
hh7 = GND;
-- Node name is 'hl0'
-- Equation name is 'hl0', type is output
hl0 = _LC1_C32;
-- Node name is 'hl1'
-- Equation name is 'hl1', type is output
hl1 = _LC7_C32;
-- Node name is 'hl2'
-- Equation name is 'hl2', type is output
hl2 = _LC6_C32;
-- Node name is 'hl3'
-- Equation name is 'hl3', type is output
hl3 = _LC8_C32;
-- Node name is 'hl4'
-- Equation name is 'hl4', type is output
hl4 = _LC3_C32;
-- Node name is 'hl5'
-- Equation name is 'hl5', type is output
hl5 = _LC4_C32;
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