ctr.qsf

pwm控制模块 使用过很多次

# Copyright (C) 1991-2007 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		ctr_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name DEVICE EP2C5T144C6
set_global_assignment -name TOP_LEVEL_ENTITY ctr
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "7.2 SP1"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "15:45:11  JULY 20, 2008"
set_global_assignment -name LAST_QUARTUS_VERSION "7.2 SP1"
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_palace
set_global_assignment -name SIMULATION_MODE FUNCTIONAL
set_location_assignment PIN_17 -to clk
set_location_assignment PIN_59 -to B_PWM1
set_location_assignment PIN_58 -to B_PWM2
set_location_assignment PIN_57 -to B_PWM3
set_location_assignment PIN_55 -to B_PWM4
set_location_assignment PIN_60 -to B_PWM5
set_location_assignment PIN_64 -to B_PWM6
set_location_assignment PIN_65 -to B_PWM7
set_location_assignment PIN_67 -to B_PWM8
set_location_assignment PIN_42 -to B_PWM9
set_location_assignment PIN_43 -to B_PWM10
set_location_assignment PIN_44 -to B_PWM11
set_location_assignment PIN_45 -to B_PWM12
set_location_assignment PIN_53 -to B_PWM13
set_location_assignment PIN_52 -to B_PWM14
set_location_assignment PIN_48 -to B_PWM15
set_location_assignment PIN_47 -to B_PWM16
set_location_assignment PIN_113 -to R_PWM1
set_location_assignment PIN_114 -to R_PWM2
set_location_assignment PIN_115 -to R_PWM3
set_location_assignment PIN_118 -to R_PWM4
set_location_assignment PIN_125 -to R_PWM5
set_location_assignment PIN_122 -to R_PWM6
set_location_assignment PIN_121 -to R_PWM7
set_location_assignment PIN_119 -to R_PWM8
set_location_assignment PIN_137 -to R_PWM9
set_location_assignment PIN_136 -to R_PWM10
set_location_assignment PIN_135 -to R_PWM11
set_location_assignment PIN_134 -to R_PWM12
set_location_assignment PIN_139 -to R_PWM13
set_location_assignment PIN_141 -to R_PWM14
set_location_assignment PIN_143 -to R_PWM15
set_location_assignment PIN_144 -to R_PWM16
set_location_assignment PIN_73 -to G_PWM1
set_location_assignment PIN_74 -to G_PWM2
set_location_assignment PIN_69 -to G_PWM3
set_location_assignment PIN_80 -to G_PWM4
set_location_assignment PIN_94 -to G_PWM5
set_location_assignment PIN_93 -to G_PWM6
set_location_assignment PIN_92 -to G_PWM7
set_location_assignment PIN_87 -to G_PWM8
set_location_assignment PIN_101 -to G_PWM9
set_location_assignment PIN_100 -to G_PWM10
set_location_assignment PIN_97 -to G_PWM11
set_location_assignment PIN_96 -to G_PWM12
set_location_assignment PIN_81 -to G_PWM13
set_location_assignment PIN_86 -to G_PWM14
set_location_assignment PIN_126 -to G_PWM15
set_location_assignment PIN_129 -to G_PWM16
set_location_assignment PIN_4 -to key1
set_location_assignment PIN_24 -to key2
set_location_assignment PIN_9 -to key3
set_global_assignment -name INCREMENTAL_VECTOR_INPUT_SOURCE ctr.vwf
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_COLOR 2147039 -section_id Top
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_instance_assignment -name PARTITION_HIERARCHY no_file_for_top_partition -to | -section_id Top
set_global_assignment -name VHDL_FILE ctr1.vhd
set_global_assignment -name VHDL_FILE div.vhd
set_global_assignment -name VHDL_FILE key.vhd
set_global_assignment -name VHDL_FILE fenpin.vhd
set_global_assignment -name VHDL_FILE slect.vhd
set_global_assignment -name VHDL_FILE rr.vhd
set_global_assignment -name VHDL_FILE rslect.vhd
set_global_assignment -name VHDL_FILE gslect.vhd
set_global_assignment -name VHDL_FILE bslect.vhd
set_global_assignment -name BDF_FILE ctr.bdf
set_global_assignment -name VHDL_FILE rselect.vhd
set_global_assignment -name VHDL_FILE rrselect.vhd
set_global_assignment -name VHDL_FILE colour.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE ctr.vwf
set_global_assignment -name VHDL_FILE dd.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE dd.vwf
set_global_assignment -name ZIP_VECTOR_WAVEFORM_FILE ctr.sim.cvwf
set_global_assignment -name VECTOR_WAVEFORM_FILE da.vwf
set_global_assignment -name VHDL_FILE test.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE test.vwf
set_global_assignment -name SOURCE_FILE test.sim
set_global_assignment -name VECTOR_WAVEFORM_FILE key.vwf
set_global_assignment -name VHDL_FILE tt.vhd