infback.asm

zlib dll in wince 5.0 parfrom

	sub	r22=r25, r27;;				    //286 	cc:10
	st4	[r21]=r22				    //286 	cc:11
	cmp4.ne.unc p14,p15=r0, r0			    //286 	cc:11
 }
 {   .mmb  //R-Addr: 0X0420 
	nop.m	 0
	nop.m	 0
  (p14)	br.cond.dptk.many $LN338@inflateBac@2#;;	    //286 	cc:11
 }

// 287  :                 state->mode = DONE;
// 288  :                 break;

 {   .mib  //R-Addr: 0X0430 
	adds	r20=state$, sp				    //287 	cc:0
	mov	r18=26					    //287 	cc:0
	nop.b	 0;;
 }
 {   .mmi  //R-Addr: 0X0440 
	ld8	r19=[r20];;				    //287 	cc:1
	st4	[r19]=r18				    //287 	cc:2
	nop.i	 0;;
 }
 {   .mmb  //R-Addr: 0X0450 
	nop.m	 0
	nop.m	 0
	br.cond.sptk.few $LN341@inflateBac@2#;;		    //288 	cc:0
 }
$LN332@inflateBac@2:

// 289  :             }
// 290  :             NEEDBITS(3);

 {   .mmi  //R-Addr: 0X0460 
	adds	r17=bits$, sp;;				    //290 	cc:0
	ld4	r16=[r17]				    //290 	cc:1
	nop.i	 0;;
 }
 {   .mmb  //R-Addr: 0X0470 
	cmp4.leu.unc p14,p15=3, r16			    //290 	cc:2
	nop.m	 0
  (p14)	br.cond.dptk.few $LN334@inflateBac@2#;;		    //290 	cc:2
 }
$LN327@inflateBac@2:

// 290  :             NEEDBITS(3);

 {   .mmi  //R-Addr: 0X0480 
	adds	r15=have$, sp;;				    //290 	cc:0
	ld4	r11=[r15]				    //290 	cc:1
	nop.i	 0;;
 }
 {   .mmb  //R-Addr: 0X0490 
	cmp4.ne.unc p14,p15=r0, r11			    //290 	cc:2
	nop.m	 0
  (p14)	br.cond.dptk.few $LN326@inflateBac@2#;;		    //290 	cc:2
 }

// 290  :             NEEDBITS(3);

 {   .mmi  //R-Addr: 0X04a0 
	adds	r9=in$, sp				    //290 	cc:3
	adds	r10=in_desc$, sp			    //290 	cc:3
	adds	r41=next$, sp;;				    //290 	cc:3
 }
 {   .mmb  //R-Addr: 0X04b0 
	ld8	r8=[r9]					    //290 	cc:4
	ld8	r40=[r10]				    //290 	cc:4
	nop.b	 0;;
 }
 {   .mmi  //R-Addr: 0X04c0 
	ld8	r31=[r8], 8;;				    //290 	cc:6
	ld8	gp=[r8]					    //290 	cc:7
	mov	b7=r31					    //290 	cc:7
 }
 {   .mmb  //R-Addr: 0X04d0 
	nop.m	 0
	nop.m	 0
	br.call.dptk.many b0=b7;;			    //290 	cc:7
 }
 {   .mmi  //R-Addr: 0X04e0 
	adds	r30=$T79365, sp				    //290 	cc:18
	adds	r29=$T79365, sp				    //290 	cc:18
	adds	r27=have$, sp				    //290 	cc:18
 }
 {   .mib  //R-Addr: 0X04f0 
	adds	r26=have$, sp				    //290 	cc:18
	mov	gp=r39					    //290 	cc:18
	nop.b	 0;;
 }
 {   .mmb  //R-Addr: 0X0500 
	st4	[r30]=r8				    //290 	cc:19
	ld4	r28=[r29]				    //290 	cc:19
	nop.b	 0;;
 }
 {   .mmb  //R-Addr: 0X0510 
	st4	[r27]=r28				    //290 	cc:20
	ld4	r25=[r26]				    //290 	cc:20
	nop.b	 0;;
 }
 {   .mmb  //R-Addr: 0X0520 
	cmp4.ne.unc p14,p15=r0, r25			    //290 	cc:21
	nop.m	 0
  (p14)	br.cond.dptk.few $LN326@inflateBac@2#;;		    //290 	cc:21
 }

// 290  :             NEEDBITS(3);

 {   .mmi  //R-Addr: 0X0530 
	adds	r22=next$, sp				    //290 	cc:22
	mov	r21=-5					    //290 	cc:22
	adds	r20=ret$, sp;;				    //290 	cc:22
 }
 {   .mmb  //R-Addr: 0X0540 
	st8	[r22]=r0				    //290 	cc:23
	st4	[r20]=r21				    //290 	cc:23
	br.cond.sptk.few $inf_leave$78875#;;		    //290 	cc:23
 }
$LN326@inflateBac@2:

// 290  :             NEEDBITS(3);

 {   .mmb  //R-Addr: 0X0550 
	cmp4.ne.unc p14,p15=r0, r0			    //290 	cc:0
	nop.m	 0
  (p14)	br.cond.dptk.few $LN327@inflateBac@2#;;		    //290 	cc:0
 }

// 290  :             NEEDBITS(3);

 {   .mmi  //R-Addr: 0X0560 
	adds	r19=have$, sp				    //290 	cc:1
	adds	r16=have$, sp				    //290 	cc:1
	adds	r15=next$, sp				    //290 	cc:1
 }
 {   .mmi  //R-Addr: 0X0570 
	adds	r9=bits$, sp				    //290 	cc:1
	adds	r30=hold$, sp				    //290 	cc:1
	adds	r27=hold$, sp;;				    //290 	cc:1
 }
 {   .mmi  //R-Addr: 0X0580 
	ld4	r18=[r19]				    //290 	cc:2
	adds	r26=next$, sp				    //290 	cc:2
	adds	r21=next$, sp				    //290 	cc:2
 }
 {   .mmi  //R-Addr: 0X0590 
	adds	r20=bits$, sp;;				    //290 	cc:2
	adds	r17=-1, r18				    //290 	cc:3
	nop.i	 0;;
 }
 {   .mmi  //R-Addr: 0X05a0 
	st4	[r16]=r17				    //290 	cc:4
	ld8	r11=[r15]				    //290 	cc:4
	adds	r17=bits$, sp				    //290 	cc:4
 }
 {   .mmi  //R-Addr: 0X05b0 
	ld4	r8=[r9];;				    //290 	cc:4
	ld4	r29=[r30]				    //290 	cc:5
	nop.i	 0;;
 }
 {   .mmi  //R-Addr: 0X05c0 
	ld1	r10=[r11];;				    //290 	cc:6
	nop.m	 0
	shl	r31=r10, r8;;				    //290 	cc:8
 }
 {   .mmi  //R-Addr: 0X05d0 
	add	r28=r29, r31;;				    //290 	cc:11
	st4	[r27]=r28				    //290 	cc:12
	nop.i	 0
 }
 {   .mmi  //R-Addr: 0X05e0 
	ld8	r25=[r26];;				    //290 	cc:12
	adds	r22=1, r25				    //290 	cc:13
	nop.i	 0;;
 }
 {   .mmb  //R-Addr: 0X05f0 
	st8	[r21]=r22				    //290 	cc:14
	ld4	r19=[r20]				    //290 	cc:14
	nop.b	 0;;
 }
 {   .mmi  //R-Addr: 0X0600 
	adds	r18=8, r19;;				    //290 	cc:15
	st4	[r17]=r18				    //290 	cc:16
	cmp4.ne.unc p14,p15=r0, r0			    //290 	cc:16
 }
 {   .mbb  //R-Addr: 0X0610 
	nop.m	 0
  (p14)	br.cond.dptk.few $LN327@inflateBac@2#		    //290 	cc:16
	br.cond.sptk.few $LN332@inflateBac@2#;;		    //290 	cc:16
 }
$LN334@inflateBac@2:

// 290  :             NEEDBITS(3);

 {   .mmb  //R-Addr: 0X0620 
	cmp4.ne.unc p14,p15=r0, r0			    //290 	cc:0
	nop.m	 0
  (p14)	br.cond.dptk.few $LN332@inflateBac@2#;;		    //290 	cc:0
 }

// 291  :             state->last = BITS(1);

 {   .mib  //R-Addr: 0X0630 
	adds	r16=hold$, sp				    //291 	cc:0
	adds	r10=state$, sp				    //291 	cc:0
	nop.b	 0;;
 }
 {   .mmb  //R-Addr: 0X0640 
	ld4	r15=[r16]				    //291 	cc:1
	ld8	r9=[r10]				    //291 	cc:1
	nop.b	 0;;
 }
 {   .mib  //R-Addr: 0X0650 
	and	r11=1, r15				    //291 	cc:2
	adds	r8=4, r9				    //291 	cc:2
	nop.b	 0;;
 }
 {   .mmb  //R-Addr: 0X0660 
	st4	[r8]=r11				    //291 	cc:3
	nop.m	 0
	nop.b	 0;;
 }
$LN322@inflateBac@2:

// 292  :             DROPBITS(1);

 {   .mmi  //R-Addr: 0X0670 
	adds	r31=hold$, sp				    //292 	cc:0
	adds	r28=hold$, sp				    //292 	cc:0
	adds	r27=bits$, sp				    //292 	cc:0
 }
 {   .mmi  //R-Addr: 0X0680 
	adds	r22=bits$, sp;;				    //292 	cc:0
	ld4	r30=[r31]				    //292 	cc:1
	nop.i	 0;;
 }
 {   .mib  //R-Addr: 0X0690 
	nop.m	 0
	extr.u	r29=r30, 1, 31				    //292 	cc:2
	nop.b	 0;;
 }
 {   .mmb  //R-Addr: 0X06a0 
	st4	[r28]=r29				    //292 	cc:3
	ld4	r26=[r27]				    //292 	cc:3
	nop.b	 0;;
 }
 {   .mmi  //R-Addr: 0X06b0 
	adds	r25=-1, r26;;				    //292 	cc:4
	st4	[r22]=r25				    //292 	cc:5
	cmp4.ne.unc p14,p15=r0, r0			    //292 	cc:5
 }
 {   .mmb  //R-Addr: 0X06c0 
	nop.m	 0
	nop.m	 0
  (p14)	br.cond.dptk.many $LN322@inflateBac@2#;;	    //292 	cc:5
 }

// 293  :             switch (BITS(2)) {

 {   .mmi  //R-Addr: 0X06d0 
	adds	r21=hold$, sp				    //293 	cc:0
	adds	r18=$T79390, sp				    //293 	cc:0
	adds	r17=$T79390, sp;;			    //293 	cc:0
 }
 {   .mmi  //R-Addr: 0X06e0 
	ld4	r20=[r21];;				    //293 	cc:1
	and	r19=3, r20				    //293 	cc:2
	nop.i	 0;;
 }
 {   .mmb  //R-Addr: 0X06f0 
	st4	[r18]=r19				    //293 	cc:3
	ld4	r16=[r17]				    //293 	cc:3
	nop.b	 0;;
 }
 {   .mmb  //R-Addr: 0X0700 
	cmp4.ltu.unc p14,p15=3, r16			    //293 	cc:4
	nop.m	 0
  (p14)	br.cond.dptk.few $LN313@inflateBac@2#;;		    //293 	cc:4
 }

// 293  :             switch (BITS(2)) {

 {   .mmi  //R-Addr: 0X0710 
	adds	r15=$T79390, sp;;			    //293 	cc:5
	ld4	r11=[r15]				    //293 	cc:6
	nop.i	 0;;
 }
$LN354@inflateBac@2:

// 293  :             switch (BITS(2)) {

 {   .mii  //R-Addr: 0X0720 
	cmp4.eq	p6,p0=0, r11				    //293 	cc:8
	cmp4.eq	p7,p0=1, r11				    //293 	cc:8
	cmp4.eq	p8,p9=2, r11				    //293 	cc:8
 }
 {   .bbb  //R-Addr: 0X0730 
  (p6)	br.cond.sptk.few $LN317@inflateBac@2#		    //293 	cc:8
  (p7)	br.cond.sptk.few $LN316@inflateBac@2#		    //293 	cc:8
  (p8)	br.cond.sptk.few $LN315@inflateBac@2#;;		    //293 	cc:8
 }

// 293  :             switch (BITS(2)) {

 {   .mmb  //R-Addr: 0X0740 
	cmp4.eq	p10,p11=3, r11				    //293 	cc:0
	nop.m	 0
  (p10)	br.cond.sptk.many $LN314@inflateBac@2#;;	    //293 	cc:0
 }
$LN317@inflateBac@2:

// 294  :             case 0:                             /* stored block */
// 295  :                 Tracev((stderr, "inflate:     stored block%s\n",
// 296  :                         state->last ? " (last)" : ""));
// 297  :                 state->mode = STORED;
// 298  :                 break;

 {   .mib  //R-Addr: 0X0750 
	adds	r10=state$, sp				    //297 	cc:0
	mov	r8=13					    //297 	cc:0
	nop.b	 0;;
 }
 {   .mmi  //R-Addr: 0X0760 
	ld8	r9=[r10];;				    //297 	cc:1
	st4	[r9]=r8					    //297 	cc:2
	nop.i	 0;;
 }
 {   .mmb  //R-Addr: 0X0770 
	nop.m	 0
	nop.m	 0
	br.cond.sptk.few $LN313@inflateBac@2#;;		    //298 	cc:0
 }
$LN316@inflateBac@2:

// 299  :             case 1:                             /* fixed block */
// 300  :                 fixedtables(state);
// 301  :                 Tracev((stderr, "inflate:     fixed codes block%s\n",
// 302  :                         state->last ? " (last)" : ""));
// 303  :                 state->mode = LEN;              /* decode codes */
// 304  :                 break;

 {   .mmi  //R-Addr: 0X0780 
	adds	r31=state$, sp;;			    //300 	cc:0
	ld8	r40=[r31]				    //300 	cc:1
	nop.i	 0
 }
 {   .mmb  //R-Addr: 0X0790 
	nop.m	 0
	nop.m	 0
	br.call.sptk.few b0=fixedtables#;;		    //300 	cc:1
 }
 {   .mib  //R-Addr: 0X07a0 
	adds	r30=state$, sp				    //303 	cc:0
	mov	r28=18					    //303 	cc:0
	nop.b	 0;;
 }
 {   .mmi  //R-Addr: 0X07b0 
	ld8	r29=[r30];;				    //303 	cc:1
	st4	[r29]=r28				    //303 	cc:2
	nop.i	 0;;
 }
 {   .mmb  //R-Addr: 0X07c0 
	nop.m	 0
	nop.m	 0
	br.cond.sptk.few $LN313@inflateBac@2#;;		    //304 	cc:0
 }
$LN315@inflateBac@2:

// 305  :             case 2:                             /* dynamic block */
// 306  :                 Tracev((stderr, "inflate:     dynamic codes block%s\n",
// 307  :                         state->last ? " (last)" : ""));
// 308  :                 state->mode = TABLE;
// 309  :                 break;

 {   .mib  //R-Addr: 0X07d0 
	adds	r27=state$, sp				    //308 	cc:0
	mov	r25=15					    //308 	cc:0
	nop.b	 0;;
 }
 {   .mmi  //R-Addr: 0X07e0 
	ld8	r26=[r27];;				    //308 	cc:1
	st4	[r26]=r25				    //308 	cc:2
	nop.i	 0;;
 }
 {   .mmb  //R-Addr: 0X07f0 
	nop.m	 0
	nop.m	 0
	br.cond.sptk.few $LN313@inflateBac@2#;;		    //309 	cc:0
 }
$LN314@inflateBac@2:

// 310  :             case 3:
// 311  :                 strm->msg = (char *)"invalid block type";
// 312  :                 state->mode = BAD;

 {   .mib  //R-Addr: 0X0800 
	adds	r22=strm$, sp				    //311 	cc:0
	addl	r19=@ltoff($SG78892#),gp		    //311 	cc:0
	nop.b	 0;;
 }
 {   .mmb  //R-Addr: 0X0810 
	ld8	r21=[r22]				    //311 	cc:1
	ld8	r18=[r19]				    //311 	cc:1
	nop.b	 0;;
 }
 {   .mmi  //R-Addr: 0X0820 
	adds	r20=32, r21;;				    //311 	cc:2
	st8	[r20]=r18				    //311 	cc:3
	nop.i	 0;;
 }
 {   .mib  //R-Addr: 0X0830 
	adds	r17=state$, sp				    //312 	cc:0
	mov	r15=27					    //312 	cc:0
	nop.b	 0;;
 }
 {   .mmi  //R-Addr: 0X0840 
	ld8	r16=[r17];;				    //312 	cc:1
	st4	[r16]=r15				    //312 	cc:2
	nop.i	 0;;
 }
$LN313@inflateBac@2:

// 313  :             }
// 314  :             DROPBITS(2);

 {   .mmi  //R-Addr: 0X0850 
	adds	r11=hold$, sp				    //314 	cc:0
	adds	r8=hold$, sp				    //314 	cc:0
	adds	r31=bits$, sp				    //314 	cc:0
 }
 {   .mmi  //R-Addr: 0X0860 
	adds	r28=bits$, sp;;				    //314 	cc:0
	ld4	r10=[r11]				    //314 	cc:1
	nop.i	 0;;
 }
 {   .mib  //R-Addr: 0X0870 
	nop.m	 0
	extr.u	r9=r10, 2, 30				    //314 	cc:2
	nop.b	 0;;
 }
 {   .mmb  //R-Addr: 0X0880 
	st4	[r8]=r9					    //314 	cc:3
	ld4	r30=[r31]				    //314 	cc:3
	nop.b	 0;;
 }
 {   .mmi  //R-Addr: 0X0890 
	adds	r29=-2, r30;;				    //314 	cc:4
	st4	[r28]=r29				    //314 	cc:5
	cmp4.ne.unc p14,p15=r0, r0			    //314 	cc:5
 }
 {   .mmb  //R-Addr: 0X08a0 
	nop.m	 0
	nop.m	 0
  (p14)	br.cond.dptk.few $LN313@inflateBac@2#;;		    //314 	cc:5
 }

// 315  :             break;

 {   .mmb  //R-Addr: 0X08b0 
	nop.m	 0
	nop.m	 0
	br.cond.sptk.few $LN341@inflateBac@2#;;		    //315 	cc:0
 }
$LN309@inflateBac@2:

// 316  : 
// 317  :         case STORED:
// 318  :             /* get and verify stored block length */
// 319  :             BYTEBITS();                         /* go to byte boundary */

 {   .mmi  //R-Addr: 0X08c0 
	adds	r27=bits$, sp				    //319 	cc:0
	adds	r22=hold$, sp				    //319 	cc:0
	adds	r19=hold$, sp				    //319 	cc:0
 }
 {   .mmi  //R-Addr: 0X08d0 
	adds	r18=bits$, sp				    //319 	cc:0
	adds	r15=bits$, sp				    //319 	cc:0
	adds	r9=bits$, sp;;				    //319 	cc:0
 }
 {   .mmb  //R-Addr: 0X08e0 
	ld4	r26=[r27]				    //319 	cc:1
	ld4	r21=[r22]				    //319 	cc:1
	nop.b	 0;;
 }
 {   .mmi  //R-Addr: 0X08f0 
	and	r25=7, r26;;				    //319 	cc:2
	nop.m	 0
	shr.u	r20=r21, r25;;				    //319 	cc:5
 }
 {   .mmb  //R-Addr: 0X0900 
	st4	[r19]=r20				    //319 	cc:8
	ld4	r17=[r18]				    //319 	cc:8
	nop.b	 0
 }
 {   .mmi  //R-Addr: 0X0910 
	ld4	r11=[r15];;				    //319 	cc:8
	and	r16=7, r17				    //319 	cc:9
	nop.i	 0;;
 }
 {   .mmi  //R-Addr: 0X0920 
	sub	r10=r11, r16;;				    //319 	cc:10
	st4	[r9]=r10				    //319 	cc:11
	cmp4.ne.unc p14,p15=r0, r0			    //319 	cc:11
 }
 {   .mmb  //R-Addr: 0X0930 
	nop.m	 0
	nop.m	 0
  (p14)	br.cond.dptk.many $LN309@inflateBac@2#;;	    //319 	cc:11
 }
$LN303@inflateBac@2:

// 320  :             NEEDBITS(32);

 {   .mmi  //R-Addr: 0X0940 
	adds	r8=bits$, sp;;				    //320 	cc:0
	ld4	r31=[r8]				    //320 	cc:1
	nop.i	 0;;
 }
 {   .mmb  //R-Addr: 0X0950 
	cmp4.leu.unc p14,p15=32, r31			    //320 	cc:2
	nop.m	 0
  (p14)	br.cond.dptk.few $LN305@inflateBac@2#;;		    //320 	cc:2
 }
$LN298@inflateBac@2:

// 320  :             NEEDBITS(32);

 {   .mmi  //R-Addr: 0X0960 
	adds	r30=have$, sp;;				    //320 	cc:0
	ld4	r29=[r30]				    //320 	cc:1
	nop.i	 0;;
 }
 {   .mmb  //R-Addr: 0X0970 
	cmp4.ne.unc p14,p15=r0, r29			    //320 	cc:2
	nop.m	 0
  (p14)	br.cond.dptk.few $LN297@inflateBac@2#;;		    //320 	cc:2
 }

// 320  :             NEEDBITS(32);

 {   .mmi  //R-Addr: 0X0980 
	adds	r27=in$, sp				    //320 	cc:3
	adds	r28=in_desc$, sp			    //320 	cc:3
	adds	r41=next$, sp;;				    //320 	cc:3
 }
 {   .mmb  //R-Addr: 0X0990 
	ld8	r26=[r27]				    //320 	cc:4
	ld8	r40=[r28]				    //320 	cc:4
	nop.b	 0;;
 }
 {   .mmi  //R-Addr: 0X09a0 
	ld8	r25=[r26], 8;;				    //320 	cc:6
	ld8	gp=[r26]				    //320 	cc:7
	mov	b6=r25					    //320 	cc:7
 }
 {   .mmb  //R-Addr: 0X09b0 
	nop.m	 0
	nop.m	 0
	br.call.dptk.many b0=b6;;			    //320 	cc:7
 }
 {   .mmi  //R-Addr: 0X09c0 
	adds	r22=$T79366, sp				    //320 	cc:18
	adds	r21=$T79366, sp				    //320 	cc:18
	adds	r19=have$, sp				    //320 	cc:18
 }
 {   .mib  //R-Addr: 0X09d0 
	adds	r18=have$, sp				    //320 	cc:18
	mov	gp=r39					    //320 	cc:18
	nop.b	 0;;
 }
 {   .mmb  //R-Addr: 0X09e0 
	st4	[r22]=r8				    //320 	cc:19
	ld4	r20=[r21]				    //320 	cc:19
	nop.b	 0;;
 }
 {   .mmb  //R-Addr: 0X09f0 
	st4	[r19]=r20				    //320 	cc:20
	ld4	r17=[r18]				    //320 	cc:20
	nop.b	 0;;
 }
 {   .mmb  //R-Addr: 0X0a00 
	cmp4.ne.unc p14,p15=r0, r17			    //320 	cc:21
	nop.m	 0
  (p14)	br.cond.dptk.few $LN297@inflateBac@2#;;		    //320 	cc:21
 }

// 320  :             NEEDBITS(32);

 {   .mmi  //R-Addr: 0X0a10 
	adds	r16=next$, sp				    //320 	cc:22
	mov	r15=-5					    //320 	cc:22
	adds	r11=ret$, sp;;				    //320 	cc:22
 }
 {   .mmb  //R-Addr: 0X0a20 
	st8	[r16]=r0				    //320 	cc:23
	st4	[r11]=r15				    //320 	cc:23
	br.cond.sptk.few $inf_leave$78875#;;		    //320 	cc:23
 }
$LN297@inflateBac@2:

// 320  :             NEEDBITS(32);

 {   .mmb  //R-Addr: 0X0a30 
	cmp4.ne.unc p14,p15=r0, r0			    //320 	cc:0
	nop.m	 0
  (p14)	br.cond.dptk.few $LN298@inflateBac@2#;;		    //320 	cc:0
 }

// 320  :             NEEDBITS(32);

 {   .mmi  //R-Addr: 0X0a40 
	adds	r10=have$, sp				    //320 	cc:1
	adds	r31=have$, sp				    //320 	cc:1
	adds	r30=next$, sp				    //320 	cc:1
 }
 {   .mmi  //R-Addr: 0X0a50 
	adds	r27=bits$, sp				    //320 	cc:1
	adds	r22=hold$, sp				    //320 	cc:1
	adds	r19=hold$, sp;;				    //320 	cc:1
 }
 {   .mmi  //R-Addr: 0X0a60 
	ld4	r9=[r10]				    //320 	cc:2
	adds	r18=next$, sp				    //320 	cc:2
	adds	r15=next$, sp				    //320 	cc:2
 }
 {   .mmi  //R-Addr: 0X0a70 
	adds	r11=bits$, sp;;				    //320 	cc:2
	adds	r8=-1, r9				    //320 	cc:3
	nop.i	 0;;
 }
 {   .mmi  //R-Addr: 0X0a80 
	st4	[r31]=r8				    //320 	cc:4
	ld8	r29=[r30]				    //320 	cc:4
	adds	r8=bits$, sp				    //320 	cc:4
 }
 {   .mmi  //R-Addr: 0X0a90 
	ld4	r26=[r27];;				    //320 	cc:4
	ld4	r21=[r22]				    //320 	cc:5
	nop.i	 0;;
 }
 {   .mmi  //R-Addr: 0X0aa0 
	ld1	r28=[r29];;				    //320 	cc:6
	nop.m	 0
	shl	r25=r28, r26;;				    //320 	cc:8
 }
 {   .mmi  //R-Addr: 0X0ab0 
	add	r20=r21, r25;;				    //320 	cc:11
	st4	[r19]=r20				    //320 	cc:12
	nop.i	 0
 }
 {   .mmi  //R-Addr: 0X0ac0 
	ld8	r17=[r18];;				    //320 	cc:12
	adds	r16=1, r17				    //320 	cc:13
	nop.i	 0;;
 }
 {   .mmb  //R-Addr: 0X0ad0 
	st8	[r15]=r16				    //320 	cc:14
	ld4	r10=[r11]				    //320 	cc:14
	nop.b	 0;;
 }
 {   .mmi  //R-Addr: 0X0ae0 
	adds	r9=8, r10;;				    //320 	cc:15
	st4	[r8]=r9					    //320 	cc:16
	cmp4.ne.unc p14,p15=r0, r0			    //320 	cc:16
 }
 {   .mbb  //R-Addr: 0X0af0 
	nop.m	 0
  (p14)	br.cond.dptk.few $LN298@inflateBac@2#		    //320 	cc:16
	br.cond.sptk.few $LN303@inflateBac@2#;;		    //320 	cc:16
 }
$LN305@inflateBac@2:

// 320  :             NEEDBITS(32);

 {   .mmb  //R-Addr: 0X0b00 
	cmp4.n