📄 hw_timer.h
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/*
* The above copyright holder, limited to cases in which one satisfies
* conditions (1) ~ (4) below, or the conditions described in Version 2
* of of the GNU Public License officially announced by the Free Software
* Foundation, consents to the use, reproduction, alteration, and
* redistribution (hereafter called utilization) of this software (this
* software includes alterations, likewise below) without compensation.
*
* (1) When this software is utilized in the form of source code, the
* above copyright declaration, these conditions of utilization, and the
* following stipulation of no guarantee shall be included in unchanged
* form inside the source code.
* (2) When this software is redistributed in a form in which it can be
* used in the development of other software, library form, etc., the above
* copyright display, these terms of utilization, and the following
* stipulation of no guarantee shall be inserted in documentation accompanying
* redistribution (user's manual, etc.).
* (3) When this software is redistributed in a form in which it cannot be used
* in the development of other software, embedded in devices, etc., one of the
* following conditions shall be satisfied.
* (a) The above copyright display, these terms of utilization, and the
* following stipulation of no guarantee shall be inserted in documentation
* accompanying redistribution (user's manual, etc.).
* (b) The TOPPERS Project shall be notified owing to a method in which the
* form of distribution is decided otherwise.
* (4) The above copyright holder and the TOPPERS Project shall be exempt
* from responsibility for whatever damages occur either directly or indirectly
* through the utilization of this software.
*
* This software is something that is provided with no guarantee. The above copyright
* holder and the TOPPERS Project make no guarantee whatsoever in regard to this
* software, including the possibility of its application. In addition, the above
* copyright holder and the TOPPERS Project shall also not bear responsibility for
* whatever damages occur either directly or indirectly through the utilization of
* this software.
*
* @(#) $Id: hw_timer.h,v 1.3 2006/08/10 08:11:38 0684248 Exp $
*/
/*
* CPU dependence timer module(for Integrator)
* TIMER1 (24Mhz fixation) is used.
*/
#ifndef _HW_TIMER_H_
#define _HW_TIMER_H_
#include <s_services.h>
#include <toya2.h>
/*
* Interruption number of timer interruption
*/
#define INHNO_TIMER IRQ_GPT1_BIT
#ifndef _MACRO_ONLY
/*
* Type of internal expression of timer value
*/
typedef UW CLOCK;
/*
* Internal expression of timer value and conversion to millisecond and micro second
* Set TIMER_CLOCK of each target board.
*/
#define TOYA2_TMR_CLK 16*1024*1024 /* Timer clock (16MHz) */
#define TOYA2_TMR_1MS_CNT (TOYA2_TMR_CLK/1000) /* Timer counter value for 1ms */
#define TO_CLOCK(nume, deno) (TIMER_CLOCK * (nume) / (deno))
#define TO_USEC(clock) ((clock) * 1000 / TIMER_CLOCK)
/*
* The maximum timer cycle that can be set(The unit is internal expressed. )
*/
#define MAX_CLOCK ((CLOCK) 0xffffffff)
/*
* Judgment whether the current value or the value of timer before interrupt all generat interrupt
*/
#define GET_TOLERANCE 100
#define BEFORE_IREQ(clock) \
((clock) >= TO_CLOCK(TIC_NUME, TIC_DENO) - GET_TOLERANCE)
/*
* Process the start of timer
*
* The timer is initialized, and a periodic timer interruption request is generated.
*/
Inline void
hw_timer_initialize()
{
/* Timer1 initialization */
sil_wrw_mem((VP)(DMX21_REG_TCTL_BASE+DMX21_REG_GPT1_OFFSET),0x00000212);
/* GPTimer1-3 Clock Enable */
rlMX21_PCCR1 |= 0x0E000000 ;
/*16MHz * 1msec */
sil_wrw_mem((VP)(DMX21_REG_TCMP_BASE+DMX21_REG_GPT1_OFFSET),0x00003E80);
ena_int(INHNO_TIMER);
/* Timer Enable Bit On */
*(unsigned int*)((VP)(DMX21_REG_TCTL_BASE + DMX21_REG_GPT1_OFFSET)) |= 1;
}
/*
* Clear the timer interrupt request
*/
Inline void
hw_timer_int_clear()
{
/* Clear Compare interrupt */
sil_wrw_mem((VP)(DMX21_REG_TSTAT_BASE + DMX21_REG_GPT1_OFFSET),0x00000003);
}
/*
* Process stop of timer
*/
Inline void
hw_timer_terminate()
{
UW TClear;
/* Timer Enable Bit Off */
dis_int(INHNO_TIMER);
/* Compare Interrupt disable */
TClear = sil_rew_mem((VP)(DMX21_REG_TCTL_BASE+DMX21_REG_GPT1_OFFSET));
TClear &= ~0x00000010;
sil_wrw_mem((VP)(DMX21_REG_TCTL_BASE+DMX21_REG_GPT1_OFFSET),TClear);
/* Timer disable */
*(unsigned int*)(DMX21_REG_TCTL_BASE + DMX21_REG_GPT1_OFFSET) &= ~1;
/* OS Interval Timer Disable */
sil_wrw_mem((VP)(DMX21_REG_TCTL_BASE + DMX21_REG_GPT1_OFFSET),0x00008000);
}
/*
* Read the current value of timer
*
* Call it in the period that the interrupt is disabled.
*/
Inline CLOCK
hw_timer_get_current(void)
{
// return(TO_CLOCK(TIC_NUME, TIC_DENO) - sil_rew_mem((VP)TM1_VAL));
return( TOYA2_TMR_CLK - sil_rew_mem((VP)DMX21_REG_TCN_BASE));
}
Inline BOOL
hw_timer_fetch_interrupt(void)
{
// return(sil_rew_mem((VP)IRQ0_STATUS) & IRQ_TM1);
return(rlMX21_INTSRCL & IRQ_GPT1);
}
#endif /* _MACRO_ONLY */
#endif /* _HW_TIMER_H_ */
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