toya2.c

epson usb2.0 控制芯片 S1R72V05 固件程序。

/*
 *	The above copyright holder, limited to cases in which one satisfies
 *	conditions (1) ~ (4) below, or the conditions described in Version 2
 *	of of the GNU Public License officially announced by the Free Software
 *	Foundation, consents to the use, reproduction, alteration, and
 *	redistribution (hereafter called utilization) of this software (this
 *	software includes alterations, likewise below) without compensation.
 *
 *	(1) When this software is utilized in the form of source code, the
 *	above copyright declaration, these conditions of utilization, and the
 *	following stipulation of no guarantee shall be included in unchanged
 *	form inside the source code.
 *	(2) When this software is redistributed in a form in which it can be
 *	used in the development of other software, library form, etc., the above
 *	copyright display, these terms of utilization, and the following
 *	stipulation of no guarantee shall be inserted in documentation accompanying
 *	redistribution (user's manual, etc.).
 *	(3) When this software is redistributed in a form in which it cannot be used
 *	in the development of other software, embedded in devices, etc., one of the
 *	following conditions shall be satisfied.
 *		(a) The above copyright display, these terms of utilization, and the
 *		following stipulation of no guarantee shall be inserted in documentation
 *		accompanying redistribution (user's manual, etc.).
 *		(b) The TOPPERS Project shall be notified owing to a method in which the
 *		form of distribution is decided otherwise.
 *		(4) The above copyright holder and the TOPPERS Project shall be exempt
 *		from responsibility for whatever damages occur either directly or indirectly
 *		through the utilization of this software.
 *
 *	This software is something that is provided with no guarantee. The above copyright
 *	holder and the TOPPERS Project make no guarantee whatsoever in regard to this
 *	software, including the possibility of its application. In addition, the above
 *	copyright holder and the TOPPERS Project shall also not bear responsibility for
 *	whatever damages occur either directly or indirectly through the utilization of
 *	this software.
 *
 *	@(#) $Id: toya2.c,v 1.3 2006/08/10 08:11:38 0684248 Exp $
 *
 */

/*
 * Driver for internal function of Integrator
 */
#include <s_services.h>
#include <toya2.h>


/*
 * Serial I/O port initialization block
 */
#if 0
const SIOPINIB siopinib_table[TNUM_SIOP] = {
	{(VP)UART1_DR,(VP)UART1_CR,(VP)UART1_LCRL,
	 (VP)UART1_LCRM,(VP)UART1_LCRH,(VP)UART1_IIR,
	 (VP)UART1_FR,IRQ_UART1
	}
#if TNUM_SIOP >= 2
	,
	{(VP)UART0_DR,(VP)UART0_CR,(VP)UART0_LCRL,
	 (VP)UART0_LCRM,(VP)UART0_LCRH,(VP)UART0_IIR,
	 (VP)UART0_FR,IRQ_UART0
	}

#endif /* TNUM_SIOP >= 2 */
};
#endif


/*
 * Area in serial I/O port management block
 */
SIOPCB	siopcb_table[TNUM_SIOP];


/*
 * Macro to take out management block from serial I/O port ID
 */
#define INDEX_SIOP(siopid)	((UINT)((siopid) - 1))
#define get_siopcb(siopid)	(&(siopcb_table[INDEX_SIOP(siopid)]))


/*
 * Was the character received?
 */
Inline BOOL
uart_getready(SIOPCB *siopcb)
{
//	return(((sil_rew_mem((VP)(siopcb->siopinib->flag_register)) & UFR_RXFE)==0));
	return TRUE;
}

/*
 * Can the character be transmitted?
 */
Inline BOOL
uart_putready(SIOPCB *siopcb)
{
//	return((sil_rew_mem((VP)(siopcb->siopinib->flag_register)) & UFR_TXFF)==0);
	return TRUE;
}

/*
 * Taking out of the received character
 */
Inline UB
uart_getchar(SIOPCB *siopcb)
{
//	return(sil_rew_mem((VP)(siopcb->siopinib->uart_data)));
	return 0;
}

/*
  * Writing of transmitted character
 */
Inline void
uart_putchar(SIOPCB *siopcb, UB c)
{
//	sil_wrw_mem((VP)(siopcb->siopinib->uart_data),c);
}

/*
 * Enable the transmission interrupt
 */
Inline void
uart_enable_send(SIOPCB *siopcb)
{
//	sil_wrw_mem((VP)(siopcb->siopinib->uart_control),
//			(sil_rew_mem((VP)(siopcb->siopinib->uart_control)) | UCR_TIE));
}

/*
 * Disable the transmission interrupt
 */
Inline void
uart_disable_send(SIOPCB *siopcb)
{
//	sil_wrw_mem((VP)(siopcb->siopinib->uart_control),
//		(sil_rew_mem((VP)(siopcb->siopinib->uart_control)) & ~UCR_TIE));
}


/*
 * Enable the reception interrupt
 */
Inline void
uart_enable_rcv(SIOPCB *siopcb)
{
//	sil_wrw_mem((VP)(siopcb->siopinib->uart_control),
//		(sil_rew_mem((VP)(siopcb->siopinib->uart_control)) | UCR_RIE));
}

/*
 * Disable the reception interrupt
 */
Inline void
uart_disable_rcv(SIOPCB *siopcb)
{
//	sil_wrw_mem((VP)(siopcb->siopinib->uart_control),
//		(sil_rew_mem((VP)(siopcb->siopinib->uart_control)) & ~UCR_RIE));
}

/*
 * Initialization for log output when kernel starts
 */
void
init_uart(void){
#if 0
	/* Disable Interrupt */
	sil_wrw_mem((VP)UART1_CR, 0);
	/* 115200bps */
	sil_wrw_mem((VP)UART1_LCRL, ULCRL_115200);
	sil_wrw_mem((VP)UART1_LCRM, ULCRM_115200);
	/* 8Data, 1Stop, No Parity */
	sil_wrw_mem((VP)UART1_LCRH, ULCRH_WLEN_8BIT);
	/* Clear Error Flag */
	sil_wrw_mem((VP)UART1_ECR,(URSR_OVERRUN|URSR_BREAK|URSR_PARITY|URSR_FRAMING));
	/* Enabel UART0 */
	sil_wrw_mem((VP)UART1_CR, UCR_UARTEN|UCR_RIE);
#endif
}

/*
 * Polling output from on chip UART
 */
void
uart_putc(char c)
{
#if 0
	int i;

	while((sil_rew_mem((VP)(UART1_FR)) & UFR_TXFF));

	sil_wrw_mem((VP)UART1_DR,(VW)c);
#endif
}


/*
 *	Initialization routine of SIO driver
 *	It is not so important because there is only one port.
 */
void
uart_initialize()
{
#if 0
	SIOPCB	*siopcb;
	UINT	i;

	/*
	 * Initialization of serial I/O port management block
	 */
	for (siopcb = siopcb_table, i = 0; i < TNUM_SIOP; siopcb++, i++) {
		siopcb->siopinib = &(siopinib_table[i]);
		siopcb->openflag = FALSE;
		siopcb->sendflag = FALSE;
	}
#endif
}

/*
 * Is there a port that has been opened?
 */
BOOL
uart_openflag(void)
{
//	return(siopcb_table[0].openflag);
	return 0;
}

/*
  * Open the serial I/O port
 */
SIOPCB *
uart_opn_por(ID siopid, VP_INT exinf)
{
#if 0
	int i;

	SIOPCB		*siopcb;
	const SIOPINIB	*siopinib;

	siopcb = get_siopcb(siopid);
	siopinib = siopcb->siopinib;

	/* Disable Interrupt */
	sil_wrw_mem((VP)siopinib->uart_control, 0);
	/* 115200bps */
	sil_wrw_mem((VP)siopinib->linectrl_lo, ULCRL_115200);
	sil_wrw_mem((VP)siopinib->linectrl_mid, ULCRM_115200);

	/* 8Data, 1Stop, No Parity */
//	  sil_wrw_mem((VP)siopinib->linectrl_hi, ULCRH_WLEN_8BIT|ULCRH_FEN);
	sil_wrw_mem((VP)siopinib->linectrl_hi, ULCRH_WLEN_8BIT);

	/*
	 * If Wait is not input,the bps right after it becomes strange
	 */
	for(i = 0; i < 1000; i++);

	/*
	 * Setting related to interruption
	 */
	sil_wrw_mem((VP)siopinib->uart_control, UCR_UARTEN|UCR_RIE); /* Enable Interrupt */
	sil_wrw_mem((VP)IRQ0_ENABLESET,siopinib->irq_bit);/*Enable interrupt register*/

	siopcb->exinf = exinf;
	siopcb->getready = siopcb->putready = FALSE;
	siopcb->openflag = TRUE;

	return(siopcb);
#endif
	return ((SIOPCB *)0);

}



/*
 * Close serial I/O port
 */
void
uart_cls_por(SIOPCB *siopcb)
{
#if 0
	sil_wrw_mem((VP)(siopcb->siopinib->uart_control),
		(sil_rew_mem((VP)(siopcb->siopinib->uart_control))&~UCR_UARTEN)); /* Disable Interrupt */

	siopcb->openflag = FALSE;
#endif
}

/*
 * Charcater transmission to the serial I/O port
 */
BOOL
uart_snd_chr(SIOPCB *siopcb, char c)
{
#if 0
	if (uart_putready(siopcb)){
		uart_putchar(siopcb, c);
		return(TRUE);
	}
#endif
	return(FALSE);
}

/*
 * Character reception from serial I/O port
 */
INT
uart_rcv_chr(SIOPCB *siopcb)
{
#if 0
	if (uart_getready(siopcb)) {
		return((INT)(UB) uart_getchar(siopcb));
	}
#endif
	return(-1);
}

/*
 * Enable the callback from the serial I/O prot
 */
void
uart_ena_cbr(SIOPCB *siopcb, UINT cbrtn)
{
#if 0
	switch (cbrtn) {
		case SIO_ERDY_SND:
			uart_enable_send(siopcb);
			break;
		case SIO_ERDY_RCV:
			uart_enable_rcv(siopcb);
			break;
	}
#endif
}


/*
 * Disable the callback from the serial I/O prot
 */
void
uart_dis_cbr(SIOPCB *siopcb, UINT cbrtn)
{
#if 0
	switch (cbrtn) {
		case SIO_ERDY_SND:
			uart_disable_send(siopcb);
			break;
		case SIO_ERDY_RCV:
			uart_disable_rcv(siopcb);
			break;
	}
#endif
}



/*
 * Interrupt processing to serial I/O port
 */
#if 0
static void
uart_isr_siop(SIOPCB *siopcb)
{
	if (uart_getready(siopcb)) {
		/*
		 * Call the reception notification callback routine
		 */
		uart_ierdy_rcv(siopcb->exinf);
	}
	if (uart_putready(siopcb)) {
		/*
		 * CAll the callback routine of transmission possible
		 */
		uart_ierdy_snd(siopcb->exinf);
	}
}
#endif



/*
 * Interrupt service routine of SIO
 */
void
uart_isr0()
{
//	uart_isr_siop(&(siopcb_table[0]));
}

#if TNUM_SIOP >= 2
void
uart_isr1()
{
//	uart_isr_siop(&(siopcb_table[1]));
}
#endif