isr_traps.s

来自「该文件包含30F的电机控制程序」· S 代码 · 共 141 行

;START_HEADER
;
; dsPIC30F6014 Demo Source File
; (c) Copyright 2005 Microchip Technology, All rights reserved
;
; --------------------------------------------------------------------------
; File Revision History:
; --------------------------------------------------------------------------
;
; $Log: isr_traps.s,v $
; Revision 1.3  2005/04/04 23:43:47  VasukiH
; Updates to comments in file header
;
; Revision 1.2  2005/04/04 23:15:15  VasukiH
; Updates for MPLAB C30 v1.30 compatiblity
;
; Revision 1.1.1.1  2003/08/23 00:38:32  VasukiH
; First import of demo source into CVS Repository
;
;
;
; --------------------------------------------------------------------------
;
; Software and Development Tools Info:
; --------------------------------------------------------------------------
; Tool                          Version
; --------------------------------------------------------------------------
; MPLAB IDE                     7.0
; MPLAB C30 Toolsuite           1.30
; dsPICDEM(TM) Processor Board  1.10
; --------------------------------------------------------------------------
;
; File Notes:
; 1. Simple Trap Handler Sequences that keep the processor within the trap
;    service routine and provide visual guidance by lighting up combinations
;    of LEDs.
;    LED Code: All Off for the first trap handler - Reserved Trap 0
;    LED Code: All On for the last trap handler - Reserved Trap 7
;END_HEADER


.include "p30fxxxx.inc"

.global __ReservedTrap0, __OscillatorFail, __AddressError, __StackError
.global __MathError, __ReservedTrap5, __ReservedTrap6, __ReservedTrap7

.section .text

__ReservedTrap0:
        clr     T2CON
        clr     TRISD
        bset    PORTD, #RD0
        bset    PORTD, #RD1
        bset    PORTD, #RD2
        bset    PORTD, #RD3
stay0:  nop
        bra     stay0

        retfie

__OscillatorFail:
        clr     T2CON
        clr     TRISD
        bset    PORTD, #RD0
        bset    PORTD, #RD1
        bset    PORTD, #RD2
        bclr    PORTD, #RD3
stay1:  nop
        bra     stay1
        retfie

__AddressError:
        clr     T2CON
        clr     TRISD
        bset    PORTD, #RD0
        bset    PORTD, #RD1
        bclr    PORTD, #RD2
        bset    PORTD, #RD3
stay2:  nop
        bra     stay2
        retfie

__StackError:
        clr     T2CON
        clr     TRISD
        bset    PORTD, #RD0
        bset    PORTD, #RD1
        bclr    PORTD, #RD2
        bclr    PORTD, #RD3
stay3:  nop
        bra     stay3
        retfie

__MathError:
        clr     T2CON
        clr     TRISD
        bset    PORTD, #RD0
        bclr    PORTD, #RD1
        bset    PORTD, #RD2
        bset    PORTD, #RD3
stay4:  nop
        bra     stay4
        retfie

__ReservedTrap5:
        clr     T2CON
        clr     TRISD
        bset    PORTD, #RD0
        bclr    PORTD, #RD1
        bset    PORTD, #RD2
        bclr    PORTD, #RD3
stay5:  nop
        bra     stay5
        retfie

__ReservedTrap6:
        clr     T2CON
        clr     TRISD
        bset    PORTD, #RD0
        bclr    PORTD, #RD1
        bclr    PORTD, #RD2
        bset    PORTD, #RD3
stay6:  nop
        bra     stay6
        retfie

__ReservedTrap7:
        clr     T2CON
        clr     TRISD
        bset    PORTD, #RD0
        bclr    PORTD, #RD1
        bclr    PORTD, #RD2
        bclr    PORTD, #RD3
stay7:  nop
        bra     stay7
        retfie



.end