main.c

适用于ti公司dm642芯片的拉普拉斯算子例程很好的资料

/*==========================================================================*/
/*            Copyright (C) 2001 Texas Instruments, Incorporated            */
/*                          All Rights Reserved.                            */
/*==========================================================================*/

#include <stdio.h>

#pragma DATA_SECTION(newbuf,"H263VCBUF");
unsigned char newbuf[512*512];

#pragma DATA_SECTION(tempbuf,"H263VCBUF");
unsigned char tempbuf[512*512];

#define DLP_Q0064 0x80100004



#define PCR1 	*(volatile unsigned int  *)0x01900024
volatile unsigned int *ptr = (unsigned int *)0x80100004;
void initEMIF(void)
{


    #define EVMDM642_EMIFA_GCTL       0x01800000
	#define EVMDM642_EMIFA_CE1        0x01800004
	#define EVMDM642_EMIFA_CE0        0x01800008
	#define EVMDM642_EMIFA_CE2        0x01800010
	#define EVMDM642_EMIFA_CE3        0x01800014
	#define EVMDM642_EMIFA_SDRAMCTL   0x01800018
	#define EVMDM642_EMIFA_SDRAMTIM   0x0000081b  /* SDRAM timing (refresh)        */
	#define EVMDM642_EMIFA_SDRAMEXT   0x01800020
	#define EVMDM642_EMIFA_CE1SECCTL  0x01800044
	#define EVMDM642_EMIFA_CE0SECCTL  0x01800048
	#define EVMDM642_EMIFA_CE2SECCTL  0x01800050
	#define EVMDM642_EMIFA_CE3SECCTL  0x01800054
	
	*(int *)EVMDM642_EMIFA_GCTL     = 0x00052078;
	*(int *)EVMDM642_EMIFA_CE0      = 0xffffffd3;  /* CE0 SDRAM                     */
	*(int *)EVMDM642_EMIFA_CE1      = 0x73a28e01;  /* CE1 Flash + CPLD              */
	*(int *)EVMDM642_EMIFA_CE2      = 0xffffffc3;  /* CE2 Daughtercard 32-bit async */
	*(int *)EVMDM642_EMIFA_CE3      = 0x22a28a42;  /* CE3 Daughtercard 32-bit sync  */
	*(int *)EVMDM642_EMIFA_SDRAMCTL = 0x57116000;  /* SDRAM control                 */
	*(int *)EVMDM642_EMIFA_SDRAMTIM = 0x0000081b;  /* SDRAM timing (refresh)        */
	*(int *)EVMDM642_EMIFA_SDRAMEXT = 0x001faf4d;  /* SDRAM extended control        */
	*(int *)EVMDM642_EMIFA_CE0SECCTL= 0x00000002;  /* CE0 Secondary Control Reg.    */
	*(int *)EVMDM642_EMIFA_CE1SECCTL= 0x00000002;  /* CE1 Secondary Control Reg.    */
	*(int *)EVMDM642_EMIFA_CE2SECCTL= 0x00000002;  /* CE2 Secondary Control Reg.    */
	*(int *)EVMDM642_EMIFA_CE3SECCTL= 0x00000073;  /* CE3 Secondary Control Reg.    */

}

void main()
{       
	unsigned int i;
	
	initEMIF();
	for(i=0;i<512*512;i++)
	{
		((unsigned char *)tempbuf)[i] = 0x80;
		((unsigned char *)newbuf)[i] = 0x00;
	}
	LaplacSharp((unsigned char *)ptr,512,512,(unsigned char *)newbuf);
	asm("\tnop");
	asm("\tnop");
	asm("\tnop");
	asm("\tnop");
	asm("\tnop");

}