📄 hal_uart.s51
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// 281 */
// 282
// 283 #if HAL_UART_DMA
// 284 static void pollDMA( uartCfg_t *cfg );
// 285 #endif
// 286 #if HAL_UART_ISR
// 287 static void pollISR( uartCfg_t *cfg );
// 288 #endif
// 289
// 290 #if HAL_UART_DMA
// 291 /******************************************************************************
// 292 * @fn pollDMA
// 293 *
// 294 * @brief Poll a USART module implemented by DMA.
// 295 *
// 296 * @param cfg - USART configuration structure.
// 297 *
// 298 * @return none
// 299 *****************************************************************************/
// 300 static void pollDMA( uartCfg_t *cfg )
// 301 {
// 302 const uint8 cnt = cfg->rxHead;
// 303 uint8 *pad = cfg->rxBuf+(cfg->rxHead*2);
// 304
// 305 // Pack the received bytes to the front of the queue.
// 306 while ( (*pad == DMA_PAD) && (cfg->rxHead < cfg->rxMax) )
// 307 {
// 308 cfg->rxBuf[cfg->rxHead++] = *(pad+1);
// 309 pad += 2;
// 310 }
// 311
// 312 if ( !(cfg->flag & UART_CFG_RXF) )
// 313 {
// 314 /* It is necessary to stop Rx flow and wait for H/W-enqueued bytes still
// 315 * incoming to stop before resetting the DMA Rx engine. If DMA Rx is
// 316 * aborted during incoming data, a byte may be lost inside the engine
// 317 * during the 2-step transfer process of read/write.
// 318 */
// 319 if ( cfg->rxHead >= (cfg->rxMax - SAFE_RX_MIN) )
// 320 {
// 321 RX_STOP_FLOW( cfg );
// 322 }
// 323 // If anything received, reset the Rx idle timer.
// 324 else if ( cfg->rxHead != cnt )
// 325 {
// 326 cfg->rxTick = HAL_UART_RX_IDLE;
// 327 }
// 328 }
// 329 else if ( !cfg->rxTick && (cfg->rxHead == cfg->rxTail) )
// 330 {
// 331 HAL_DMA_ABORT_CH( HAL_DMA_CH_RX );
// 332 cfg->rxHead = cfg->rxTail = 0;
// 333 osal_memset( cfg->rxBuf, ~DMA_PAD, cfg->rxMax*2 );
// 334 DMA_RX( cfg );
// 335 RX_STRT_FLOW( cfg );
// 336 }
// 337
// 338 if ( HAL_DMA_CHECK_IRQ( HAL_DMA_CH_TX ) )
// 339 {
// 340 HAL_DMA_CLEAR_IRQ( HAL_DMA_CH_TX );
// 341 cfg->flag &= ~UART_CFG_TXF;
// 342 cfg->txTick = DMA_TX_DLY;
// 343
// 344 if ( (cfg->txMax - cfg->txCnt) < cfg->txTail )
// 345 {
// 346 cfg->txTail = 0; // DMA can only run to the end of the Tx buffer.
// 347 }
// 348 else
// 349 {
// 350 cfg->txTail += cfg->txCnt;
// 351 }
// 352 }
// 353 else if ( !(cfg->flag & UART_CFG_TXF) && !cfg->txTick )
// 354 {
// 355 if ( cfg->txTail != cfg->txHead )
// 356 {
// 357 if ( cfg->txTail < cfg->txHead )
// 358 {
// 359 cfg->txCnt = cfg->txHead - cfg->txTail;
// 360 }
// 361 else // Can only run DMA engine up to max, then restart at zero.
// 362 {
// 363 cfg->txCnt = cfg->txMax - cfg->txTail + 1;
// 364 }
// 365
// 366 cfg->flag |= UART_CFG_TXF;
// 367 DMA_TX( cfg );
// 368 }
// 369 }
// 370 }
// 371 #endif
// 372
// 373 #if HAL_UART_ISR
// 374 /******************************************************************************
// 375 * @fn pollISR
// 376 *
// 377 * @brief Poll a USART module implemented by ISR.
// 378 *
// 379 * @param cfg - USART configuration structure.
// 380 *
// 381 * @return none
// 382 *****************************************************************************/
RSEG BANKED_CODE:CODE:NOROOT(0)
// 383 static void pollISR( uartCfg_t *cfg )
??pollISR:
CFI Block cfiBlock0 Using cfiCommon0
CFI Function ??pollISR
// 384 {
MOV A,#-0x9
LCALL ?BANKED_ENTER_XDATA
CFI DPH0 load(1, XDATA, add(CFA_XSP16, literal(-1)))
CFI DPL0 load(1, XDATA, add(CFA_XSP16, literal(-2)))
CFI ?BRET_EXT load(1, XDATA, add(CFA_XSP16, literal(-3)))
CFI ?RET_HIGH load(1, XDATA, add(CFA_XSP16, literal(-4)))
CFI ?RET_LOW load(1, XDATA, add(CFA_XSP16, literal(-5)))
CFI R7 load(1, XDATA, add(CFA_XSP16, literal(-6)))
CFI V0 load(1, XDATA, add(CFA_XSP16, literal(-7)))
CFI VB load(1, XDATA, add(CFA_XSP16, literal(-8)))
CFI R6 load(1, XDATA, add(CFA_XSP16, literal(-9)))
CFI CFA_SP SP+0
CFI CFA_XSP16 add(XSP16, 9)
; Saved register size: 9
; Auto size: 0
// 385 uint8 cnt = UART_RX_AVAIL( cfg );
MOV DPL,R2
MOV DPH,R3
INC DPTR
INC DPTR
MOVX A,@DPTR
PUSH A
CFI CFA_SP SP+-1
MOV DPL,R2
MOV DPH,R3
INC DPTR
INC DPTR
INC DPTR
MOVX A,@DPTR
MOV R4,A
POP A
CFI CFA_SP SP+0
CLR C
SUBB A,R4
MOV DPL,R2
MOV DPH,R3
INC DPTR
INC DPTR
JC ??pollISR_1
MOVX A,@DPTR
CLR C
SUBB A,R4
SJMP ??pollISR_2
??pollISR_1:
PUSH DPL
CFI CFA_SP SP+-1
PUSH DPH
CFI CFA_SP SP+-2
MOV DPL,R2
MOV DPH,R3
INC DPTR
INC DPTR
INC DPTR
INC DPTR
MOVX A,@DPTR
CLR C
SUBB A,R4
POP DPH
CFI CFA_SP SP+-1
POP DPL
CFI CFA_SP SP+0
MOV R4,A
MOVX A,@DPTR
ADD A,R4
INC A
??pollISR_2:
MOV R4,A
// 386
// 387 if ( !(cfg->flag & UART_CFG_RXF) )
LCALL ?Subroutine6 & 0xFFFF
??CrossCallReturnLabel_14:
MOV C,0xE0 /* A */.1
JC ??pollISR_3
// 388 {
// 389 // If anything received, reset the Rx idle timer.
// 390 if ( cfg->rxCnt != cnt )
MOV DPL,R2
MOV DPH,R3
INC DPTR
INC DPTR
INC DPTR
INC DPTR
INC DPTR
MOVX A,@DPTR
XRL A,R4
JZ ??pollISR_4
// 391 {
// 392 cfg->rxTick = HAL_UART_RX_IDLE;
MOV A,#-0x3a
MOV DPL,R2
MOV DPH,R3
INC DPTR
INC DPTR
INC DPTR
INC DPTR
INC DPTR
INC DPTR
MOVX @DPTR,A
// 393 cfg->rxCnt = cnt;
MOV A,R4
MOV DPL,R2
MOV DPH,R3
INC DPTR
INC DPTR
INC DPTR
INC DPTR
INC DPTR
MOVX @DPTR,A
// 394 }
// 395
// 396 /* It is necessary to stop Rx flow in advance of a full Rx buffer because
// 397 * bytes can keep coming while sending H/W fifo flushes.
// 398 */
// 399 if ( cfg->rxCnt >= (cfg->rxMax - SAFE_RX_MIN) )
??pollISR_4:
MOV DPL,R2
MOV DPH,R3
INC DPTR
INC DPTR
INC DPTR
INC DPTR
INC DPTR
MOVX A,@DPTR
MOV R4,A
MOV DPL,R2
MOV DPH,R3
LCALL ?Subroutine1 & 0xFFFF
??CrossCallReturnLabel_2:
MOV A,R4
LCALL ?Subroutine12 & 0xFFFF
??CrossCallReturnLabel_35:
JC ??pollISR_3
// 400 {
// 401 RX_STOP_FLOW( cfg );
LCALL ?Subroutine6 & 0xFFFF
??CrossCallReturnLabel_15:
MOV C,0xE0 /* A */.7
JC ??pollISR_5
SETB 0x80.5
SJMP ??pollISR_6
??pollISR_5:
SETB 0x90.5
??pollISR_6:
MOV C,0xE0 /* A */.6
JNC ??pollISR_7
MOV A,#-0x74
MOV DPL,R2
MOV DPH,R3
INC DPTR
INC DPTR
INC DPTR
INC DPTR
INC DPTR
INC DPTR
MOVX @DPTR,A
??pollISR_7:
LCALL ?Subroutine6 & 0xFFFF
??CrossCallReturnLabel_16:
SETB 0xE0 /* A */.1
MOVX @DPTR,A
// 402 }
// 403 }
// 404 }
??pollISR_3:
MOV R7,#0x1
LJMP ?BANKED_LEAVE_XDATA
CFI EndBlock cfiBlock0
RSEG BANKED_CODE:CODE:NOROOT(0)
?Subroutine6:
CFI Block cfiCond1 Using cfiCommon0
CFI NoFunction
CFI Conditional ??CrossCallReturnLabel_14
CFI R6 load(1, XDATA, add(CFA_XSP16, literal(-9)))
CFI VB load(1, XDATA, add(CFA_XSP16, literal(-8)))
CFI V0 load(1, XDATA, add(CFA_XSP16, literal(-7)))
CFI R7 load(1, XDATA, add(CFA_XSP16, literal(-6)))
CFI ?RET_LOW load(1, XDATA, add(CFA_XSP16, literal(-5)))
CFI ?RET_HIGH load(1, XDATA, add(CFA_XSP16, literal(-4)))
CFI ?BRET_EXT load(1, XDATA, add(CFA_XSP16, literal(-3)))
CFI DPL0 load(1, XDATA, add(CFA_XSP16, literal(-2)))
CFI DPH0 load(1, XDATA, add(CFA_XSP16, literal(-1)))
CFI CFA_SP SP+0
CFI CFA_XSP16 add(XSP16, 9)
CFI Block cfiCond2 Using cfiCommon0
CFI (cfiCond2) NoFunction
CFI (cfiCond2) Conditional ??CrossCallReturnLabel_16
CFI (cfiCond2) R6 load(1, XDATA, add(CFA_XSP16, literal(-9)))
CFI (cfiCond2) VB load(1, XDATA, add(CFA_XSP16, literal(-8)))
CFI (cfiCond2) V0 load(1, XDATA, add(CFA_XSP16, literal(-7)))
CFI (cfiCond2) R7 load(1, XDATA, add(CFA_XSP16, literal(-6)))
CFI (cfiCond2) ?RET_LOW load(1, XDATA, add(CFA_XSP16, literal(-5)))
CFI (cfiCond2) ?RET_HIGH load(1, XDATA, add(CFA_XSP16, literal(-4)))
CFI (cfiCond2) ?BRET_EXT load(1, XDATA, add(CFA_XSP16, literal(-3)))
CFI (cfiCond2) DPL0 load(1, XDATA, add(CFA_XSP16, literal(-2)))
CFI (cfiCond2) DPH0 load(1, XDATA, add(CFA_XSP16, literal(-1)))
CFI (cfiCond2) CFA_SP SP+0
CFI (cfiCond2) CFA_XSP16 add(XSP16, 9)
CFI Block cfiCond3 Using cfiCommon0
CFI (cfiCond3) NoFunction
CFI (cfiCond3) Conditional ??CrossCallReturnLabel_15
CFI (cfiCond3) R6 load(1, XDATA, add(CFA_XSP16, literal(-9)))
CFI (cfiCond3) VB load(1, XDATA, add(CFA_XSP16, literal(-8)))
CFI (cfiCond3) V0 load(1, XDATA, add(CFA_XSP16, literal(-7)))
CFI (cfiCond3) R7 load(1, XDATA, add(CFA_XSP16, literal(-6)))
CFI (cfiCond3) ?RET_LOW load(1, XDATA, add(CFA_XSP16, literal(-5)))
CFI (cfiCond3) ?RET_HIGH load(1, XDATA, add(CFA_XSP16, literal(-4)))
CFI (cfiCond3) ?BRET_EXT load(1, XDATA, add(CFA_XSP16, literal(-3)))
CFI (cfiCond3) DPL0 load(1, XDATA, add(CFA_XSP16, literal(-2)))
CFI (cfiCond3) DPH0 load(1, XDATA, add(CFA_XSP16, literal(-1)))
CFI (cfiCond3) CFA_SP SP+0
CFI (cfiCond3) CFA_XSP16 add(XSP16, 9)
CFI Block cfiPicker4 Using cfiCommon1
CFI (cfiPicker4) NoFunction
CFI (cfiPicker4) Picker
MOV A,R2
ADD A,#0xf
MOV DPL,A
MOV A,R3
LCALL ?Subroutine15 & 0xFFFF
??CrossCallReturnLabel_43:
RET
CFI EndBlock cfiCond1
CFI EndBlock cfiCond2
CFI EndBlock cfiCond3
CFI EndBlock cfiPicker4
// 405 #endif
// 406
// 407 /******************************************************************************
// 408 * @fn HalUARTInit
// 409 *
// 410 * @brief Initialize the UART
// 411 *
// 412 * @param none
// 413 *
// 414 * @return none
// 415 *****************************************************************************/
RSEG BANKED_CODE:CODE:NOROOT(0)
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