📄 hal_key.s51
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// 578 if (HAL_KEY_SW_5_PXIFG & HAL_KEY_SW_5_BIT) /* Interrupt Flag has been set */
// 579 {
// 580 HAL_KEY_SW_5_PXIFG = ~(HAL_KEY_SW_5_BIT); /* Clear Interrupt Flag */
// 581 valid = TRUE;
// 582 }
// 583 #endif
// 584
// 585 if (valid)
// 586 {
// 587 osal_start_timerEx (Hal_TaskID, HAL_KEY_EVENT, HAL_KEY_DEBOUNCE_VALUE);
// 588 }
// 589 #endif /* HAL_KEY */
// 590 }
LJMP ?BRET
CFI EndBlock cfiBlock4
// 591
// 592 /**************************************************************************************************
// 593 * @fn HalKeyEnterSleep
// 594 *
// 595 * @brief - Get called to enter sleep mode
// 596 *
// 597 * @param
// 598 *
// 599 * @return
// 600 **************************************************************************************************/
RSEG BANKED_CODE:CODE:NOROOT(0)
// 601 void HalKeyEnterSleep ( void )
HalKeyEnterSleep:
CFI Block cfiBlock5 Using cfiCommon0
CFI Function HalKeyEnterSleep
// 602 {
; Saved register size: 0
; Auto size: 0
// 603 /* Sleep!!! */
// 604 }
LJMP ?BRET
CFI EndBlock cfiBlock5
// 605
// 606 /**************************************************************************************************
// 607 * @fn HalKeyExitSleep
// 608 *
// 609 * @brief - Get called when sleep is over
// 610 *
// 611 * @param
// 612 *
// 613 * @return - return saved keys
// 614 **************************************************************************************************/
RSEG BANKED_CODE:CODE:NOROOT(0)
// 615 uint8 HalKeyExitSleep ( void )
HalKeyExitSleep:
CFI Block cfiBlock6 Using cfiCommon0
CFI Function HalKeyExitSleep
// 616 {
; Saved register size: 0
; Auto size: 0
// 617 /* Wake up and read keys */
// 618 return ( HalKeyRead () );
SJMP ?Subroutine0
CFI EndBlock cfiBlock6
// 619 }
// 620
// 621 /***************************************************************************************************
// 622 * INTERRUPT SERVICE ROUTINE
// 623 ***************************************************************************************************/
// 624
// 625 /**************************************************************************************************
// 626 * @fn halKeyPort0Isr
// 627 *
// 628 * @brief Port0 ISR
// 629 *
// 630 * @param
// 631 *
// 632 * @return
// 633 **************************************************************************************************/
RSEG NEAR_CODE:CODE:NOROOT(0)
// 634 HAL_ISR_FUNCTION( halKeyPort0Isr, P0INT_VECTOR )
halKeyPort0Isr:
CFI Block cfiBlock7 Using cfiCommon1
CFI Function halKeyPort0Isr
// 635 {
PUSH A
CFI A Frame(CFA_SP, 3)
CFI CFA_SP SP+-3
PUSH PSW
CFI PSW Frame(CFA_SP, 4)
CFI CFA_SP SP+-4
PUSH DPL
CFI DPL0 Frame(CFA_SP, 5)
CFI CFA_SP SP+-5
PUSH DPH
CFI DPH0 Frame(CFA_SP, 6)
CFI CFA_SP SP+-6
; Saved register size: 4
; Auto size: 0
// 636 /* P0IF is cleared by HW for CHVER < REV_E */
// 637
// 638 halProcessKeyInterrupt();
// 639
// 640 if( CHVER >= REV_E )
MOV DPTR,#-0x20a0
MOVX A,@DPTR
CLR C
SUBB A,#0x4
JC ??halKeyPort0Isr_0
// 641 {
// 642 /* Make sure that we clear all enabled, but unused P0IFG bits.
// 643 * For P0 we can only enable or disable high or low nibble, not bit by
// 644 * bit. For P1 and P2 enabling of single bits are possible, therefore
// 645 * will not any unused pins generate interrupts on P1 or P2.
// 646 * We could have checked for low and high nibble in P0, but this
// 647 * isn't necessary as long as we only clear unused pin interrupts.
// 648 */
// 649 P0IFG = (HAL_KEY_P0INT_LOW_USED | HAL_KEY_POINT_HIGH_USED);
MOV 0x89,#0x2
// 650 P0IF = 0;
CLR 0xc0.5
CFI EndBlock cfiBlock7
// 651 CLEAR_SLEEP_MODE();
// 652 }
// 653 }
??halKeyPort0Isr_0:
REQUIRE ?Subroutine1
; // Fall through to label ?Subroutine1
RSEG NEAR_CODE:CODE:NOROOT(0)
?Subroutine1:
CFI Block cfiBlock8 Using cfiCommon1
CFI NoFunction
CFI CFA_SP SP+-6
CFI A Frame(CFA_SP, 3)
CFI PSW Frame(CFA_SP, 4)
CFI DPL0 Frame(CFA_SP, 5)
CFI DPH0 Frame(CFA_SP, 6)
POP DPH
CFI CFA_SP SP+-5
CFI DPH0 SameValue
POP DPL
CFI CFA_SP SP+-4
CFI DPL0 SameValue
POP PSW
CFI CFA_SP SP+-3
CFI PSW SameValue
POP A
CFI CFA_SP SP+-2
CFI A SameValue
RETI
CFI EndBlock cfiBlock8
// 654
// 655 /**************************************************************************************************
// 656 * @fn halKeyPort1Isr
// 657 *
// 658 * @brief Port1 ISR
// 659 *
// 660 * @param
// 661 *
// 662 * @return
// 663 **************************************************************************************************/
RSEG NEAR_CODE:CODE:NOROOT(0)
// 664 HAL_ISR_FUNCTION( halKeyPort1Isr, P1INT_VECTOR )
halKeyPort1Isr:
CFI Block cfiBlock9 Using cfiCommon1
CFI Function halKeyPort1Isr
// 665 {
PUSH A
CFI A Frame(CFA_SP, 3)
CFI CFA_SP SP+-3
PUSH PSW
CFI PSW Frame(CFA_SP, 4)
CFI CFA_SP SP+-4
PUSH DPL
CFI DPL0 Frame(CFA_SP, 5)
CFI CFA_SP SP+-5
PUSH DPH
CFI DPH0 Frame(CFA_SP, 6)
CFI CFA_SP SP+-6
; Saved register size: 4
; Auto size: 0
// 666 if( CHVER <= REV_D )
MOV DPTR,#-0x20a0
MOVX A,@DPTR
CLR C
SUBB A,#0x4
JNC ??halKeyPort1Isr_0
// 667 {
// 668 P1IF = 0;
CLR 0xe8.3
// 669 }
// 670
// 671 halProcessKeyInterrupt();
// 672
// 673 if( CHVER >= REV_E )
??halKeyPort1Isr_0:
MOVX A,@DPTR
CLR C
SUBB A,#0x4
JC ??halKeyPort1Isr_1
// 674 {
// 675 P1IF = 0;
CLR 0xe8.3
// 676 CLEAR_SLEEP_MODE();
// 677 }
// 678 }
??halKeyPort1Isr_1:
SJMP ?Subroutine1
CFI EndBlock cfiBlock9
// 679
// 680 /**************************************************************************************************
// 681 * @fn halKeyPort2Isr
// 682 *
// 683 * @brief Port2 ISR
// 684 *
// 685 * @param
// 686 *
// 687 * @return
// 688 **************************************************************************************************/
RSEG NEAR_CODE:CODE:NOROOT(0)
// 689 HAL_ISR_FUNCTION( halKeyPort2Isr, P2INT_VECTOR )
halKeyPort2Isr:
CFI Block cfiBlock10 Using cfiCommon1
CFI Function halKeyPort2Isr
// 690 {
PUSH A
CFI A Frame(CFA_SP, 3)
CFI CFA_SP SP+-3
PUSH PSW
CFI PSW Frame(CFA_SP, 4)
CFI CFA_SP SP+-4
PUSH DPL
CFI DPL0 Frame(CFA_SP, 5)
CFI CFA_SP SP+-5
PUSH DPH
CFI DPH0 Frame(CFA_SP, 6)
CFI CFA_SP SP+-6
; Saved register size: 4
; Auto size: 0
// 691 if( CHVER <= REV_D )
MOV DPTR,#-0x20a0
MOVX A,@DPTR
CLR C
SUBB A,#0x4
JNC ??halKeyPort2Isr_0
// 692 {
// 693 P2IF = 0;
CLR 0xe8.0
// 694 }
// 695
// 696 halProcessKeyInterrupt();
// 697
// 698 if( CHVER >= REV_E )
??halKeyPort2Isr_0:
MOVX A,@DPTR
CLR C
SUBB A,#0x4
JC ??halKeyPort2Isr_1
// 699 {
// 700 P2IF = 0;
CLR 0xe8.0
// 701 CLEAR_SLEEP_MODE();
// 702 }
// 703 }
??halKeyPort2Isr_1:
SJMP ?Subroutine1
CFI EndBlock cfiBlock10
COMMON INTVEC:CODE:ROOT(0)
ORG 51
`halKeyPort2Isr??INTVEC 51`:
LJMP (halKeyPort2Isr)
COMMON INTVEC:CODE:ROOT(0)
ORG 107
`halKeyPort0Isr??INTVEC 107`:
LJMP (halKeyPort0Isr)
COMMON INTVEC:CODE:ROOT(0)
ORG 123
`halKeyPort1Isr??INTVEC 123`:
LJMP (halKeyPort1Isr)
ASEGN SFR_AN:DATA:NOROOT,0c0H
// union <unnamed> volatile __sfr _A_IRCON
_A_IRCON:
DS 1
ASEGN SFR_AN:DATA:NOROOT,0e8H
// union <unnamed> volatile __sfr _A_IRCON2
_A_IRCON2:
DS 1
END
// 704
// 705 /**************************************************************************************************
// 706 **************************************************************************************************/
// 707
// 708
// 709
//
// 22 bytes in segment BANKED_CODE
// 9 bytes in segment INTVEC
// 89 bytes in segment NEAR_CODE
// 3 bytes in segment SFR_AN
// 2 bytes in segment XDATA_Z
//
// 111 bytes of CODE memory (+ 9 bytes shared)
// 0 bytes of DATA memory (+ 3 bytes shared)
// 2 bytes of XDATA memory
//
//Errors: none
//Warnings: 3
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