📄 hal_key.s51
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// 10 Copyright (c) 2006 by Texas Instruments, Inc.
// 11 All Rights Reserved. Permission to use, reproduce, copy, prepare
// 12 derivative works, modify, distribute, perform, display or sell this
// 13 software and/or its documentation for any purpose is prohibited
// 14 without the express written consent of Texas Instruments, Inc.
// 15 **************************************************************************************************/
// 16 /*********************************************************************
// 17 NOTE: If polling is used, the hal_driver task schedules the KeyRead()
// 18 to occur every 100ms. This should be long enough to naturally
// 19 debounce the keys. The KeyRead() function remembers the key
// 20 state of the previous poll and will only return a non-zero
// 21 value if the key state changes.
// 22
// 23 NOTE: If interrupts are used, the KeyRead() function is scheduled
// 24 25ms after the interrupt occurs by the ISR. This delay is used
// 25 for key debouncing. The ISR disables any further Key interrupt
// 26 until KeyRead() is executed. KeyRead() will re-enable Key
// 27 interrupts after executing. Unlike polling, when interrupts
// 28 are enabled, the previous key state is not remembered. This
// 29 means that KeyRead() will return the current state of the keys
// 30 (not a change in state of the keys).
// 31
// 32 NOTE: If interrupts are used, the KeyRead() fucntion is scheduled by
// 33 the ISR. Therefore, the joystick movements will only be detected
// 34 during a pushbutton interrupt caused by S1 or the center joystick
// 35 pushbutton.
// 36
// 37 NOTE: When a switch like S1 is pushed, the S1 signal goes from a normally
// 38 high state to a low state. This transition is typically clean. The
// 39 duration of the low state is around 200ms. When the signal returns
// 40 to the high state, there is a high likelihood of signal bounce, which
// 41 causes a unwanted interrupts. Normally, we would set the interrupt
// 42 edge to falling edge to generate an interrupt when S1 is pushed, but
// 43 because of the signal bounce, it is better to set the edge to rising
// 44 edge to generate an interrupt when S1 is released. The debounce logic
// 45 can then filter out the signal bounce. The result is that we typically
// 46 get only 1 interrupt per button push. This mechanism is not totally
// 47 foolproof because occasionally, signal bound occurs during the falling
// 48 edge as well. A similar mechanism is used to handle the joystick
// 49 pushbutton on the DB. For the EB, we do not have independent control
// 50 of the interrupt edge for the S1 and center joystick pushbutton. As
// 51 a result, only one or the other pushbuttons work reasonably well with
// 52 interrupts. The default is the make the S1 switch on the EB work more
// 53 reliably.
// 54
// 55 *********************************************************************/
// 56
// 57 /**************************************************************************************************
// 58 * INCLUDES
// 59 **************************************************************************************************/
// 60 #include "hal_mcu.h"
ASEGN SFR_AN:DATA:NOROOT,089H
// unsigned char volatile __sfr P0IFG
P0IFG:
DS 1
// 61 #include "hal_defs.h"
// 62 #include "hal_types.h"
// 63 #include "hal_drivers.h"
// 64 #include "hal_adc.h"
// 65 #include "hal_key.h"
// 66 #include "osal.h"
// 67
// 68 /**************************************************************************************************
// 69 * MACROS
// 70 **************************************************************************************************/
// 71
// 72 /**************************************************************************************************
// 73 * CONSTANTS
// 74 **************************************************************************************************/
// 75 #define HAL_KEY_BIT0 0x01
// 76 #define HAL_KEY_BIT1 0x02
// 77 #define HAL_KEY_BIT2 0x04
// 78 #define HAL_KEY_BIT3 0x08
// 79 #define HAL_KEY_BIT4 0x10
// 80 #define HAL_KEY_BIT5 0x20
// 81 #define HAL_KEY_BIT6 0x40
// 82 #define HAL_KEY_BIT7 0x80
// 83
// 84 #define HAL_KEY_RISING_EDGE 0
// 85 #define HAL_KEY_FALLING_EDGE 1
// 86
// 87 #define HAL_KEY_PDUP2 0x80
// 88 #define HAL_KEY_PDUP1 0x40
// 89 #define HAL_KEY_PDUP0 0x20
// 90
// 91 #define HAL_KEY_DEBOUNCE_VALUE 25
// 92 #define HAL_KEY_POLLING_VALUE 100
// 93
// 94
// 95 #if defined (HAL_BOARD_CC2430DB)
// 96 #define HAL_KEY_SW_6_ENABLE
// 97 #define HAL_KEY_SW_6_PORT P0 /* Port location of SW1 */
// 98 #define HAL_KEY_SW_6_BIT HAL_KEY_BIT1 /* Bit location of SW1 */
// 99 #define HAL_KEY_SW_6_SEL P0SEL /* Port Select Register for SW1 */
// 100 #define HAL_KEY_SW_6_DIR P0DIR /* Port Direction Register for SW1 */
// 101 #define HAL_KEY_SW_6_IEN IEN1 /* Interrupt Enable Register for SW1 */
// 102 #define HAL_KEY_SW_6_IENBIT HAL_KEY_BIT5 /* Interrupt Enable bit for SW1 */
// 103 #define HAL_KEY_SW_6_EDGE HAL_KEY_RISING_EDGE /* Type of interrupt for SW1 */
// 104 #define HAL_KEY_SW_6_EDGEBIT HAL_KEY_BIT0 /* EdgeType enable bit SW1 */
// 105 #define HAL_KEY_SW_6_ICTL PICTL /* Port Interrupt Control for SW1 */
// 106 #define HAL_KEY_SW_6_ICTLBIT HAL_KEY_BIT3 /* Interrupt enable bit for SW1 */
// 107 #define HAL_KEY_SW_6_PXIFG P0IFG /* Port Interrupt Flag for SW1 */
// 108
// 109 #define HAL_KEY_JOYSTICK_ENABLE
// 110 #define HAL_KEY_JOY_CHN HAL_ADC_CHANNEL_6
// 111
// 112 #define HAL_KEY_SW_5_ENABLE /* 2430DB - SW5 is enabled based on key interrupt enable or not - see config */
// 113 #define HAL_KEY_SW_5_PORT P2 /* Port location of SW5 */
// 114 #define HAL_KEY_SW_5_BIT HAL_KEY_BIT0 /* Bit location of SW5 */
// 115 #define HAL_KEY_SW_5_SEL P2SEL /* Port Select Register for SW5 */
// 116 #define HAL_KEY_SW_5_DIR P2DIR /* Port Direction Register for SW5 */
// 117 #define HAL_KEY_SW_5_INP P2INP /* Port Input Mode Register for SW5 */
// 118 #define HAL_KEY_SW_5_IEN IEN2 /* Interrupt Enable Register for SW5 */
// 119 #define HAL_KEY_SW_5_IENBIT HAL_KEY_BIT1 /* Interrupt Enable bit for SW5 */
// 120 #define HAL_KEY_SW_5_EDGE HAL_KEY_FALLING_EDGE /* Type of interrupt for SW5 */
// 121 #define HAL_KEY_SW_5_EDGEBIT HAL_KEY_BIT2 /* EdgeType enable bit SW5 */
// 122 #define HAL_KEY_SW_5_ICTL PICTL /* Port Interrupt Control for SW5 */
// 123 #define HAL_KEY_SW_5_ICTLBIT HAL_KEY_BIT5 /* Interrupt enable bit for SW5 */
// 124 #define HAL_KEY_SW_5_PXIFG P2IFG /* Port Interrupt Flag for SW5 */
// 125
// 126 #define HAL_KEY_P0INT_LOW_USED HAL_KEY_SW_6_BIT /* P0 can only be enabled/disabled as group of high or low nibble */
// 127 #define HAL_KEY_POINT_HIGH_USED 0 /* P0 can only be enabled/disabled as group of high or low nibble */
// 128 #endif
// 129
// 130 #if defined (HAL_BOARD_CC2430EB) || defined (HAL_BOARD_CC2430BB)
// 131 #define HAL_KEY_SW_6_ENABLE
// 132 #define HAL_KEY_SW_6_PORT P0 /* Port location of SW1 */
// 133 #define HAL_KEY_SW_6_BIT HAL_KEY_BIT1 /* Bit location of SW1 */
// 134 #define HAL_KEY_SW_6_SEL P0SEL /* Port Select Register for SW1 */
// 135 #define HAL_KEY_SW_6_DIR P0DIR /* Port Direction Register for SW1 */
// 136 #define HAL_KEY_SW_6_IEN IEN1 /* Interrupt Enable Register for SW1 */
// 137 #define HAL_KEY_SW_6_IENBIT HAL_KEY_BIT5 /* Interrupt Enable bit for SW1 */
// 138 #define HAL_KEY_SW_6_EDGE HAL_KEY_RISING_EDGE /* Type of interrupt for SW1 */
// 139 #define HAL_KEY_SW_6_EDGEBIT HAL_KEY_BIT0 /* EdgeType enable bit SW1 */
// 140 #define HAL_KEY_SW_6_ICTL PICTL /* Port Interrupt Control for SW1 */
// 141 #define HAL_KEY_SW_6_ICTLBIT HAL_KEY_BIT3 /* Interrupt enable bit for SW1 */
// 142 #define HAL_KEY_SW_6_PXIFG P0IFG /* Port Interrupt Flag for SW1 */
// 143
// 144 #define HAL_KEY_P0INT_LOW_USED HAL_KEY_SW_6_BIT /* P0 can only be enabled/disabled as group of high or low nibble */
// 145 #endif
// 146
// 147 #if defined (HAL_BOARD_CC2430BB)
// 148 #define HAL_KEY_POINT_HIGH_USED 0
// 149 #endif
// 150
// 151 #if defined (HAL_BOARD_CC2430EB)
// 152 #define HAL_KEY_JOYSTICK_ENABLE
// 153 #define HAL_KEY_JOY_CHN HAL_ADC_CHANNEL_6
// 154
// 155 #define HAL_KEY_SW_5_ENABLE
// 156 #define HAL_KEY_SW_5_PORT P0 /* Port location of SW5 */
// 157 #define HAL_KEY_SW_5_BIT HAL_KEY_BIT5 /* Bit location of SW5 */
// 158 #define HAL_KEY_SW_5_SEL P0SEL /* Port Select Register for SW5 */
// 159 #define HAL_KEY_SW_5_DIR P0DIR /* Port Direction Register for SW5 */
// 160 #define HAL_KEY_SW_5_INP P0INP /* Port Input Mode Register for SW5 */
// 161 #define HAL_KEY_SW_5_IEN IEN1 /* Interrupt Enable Register for SW5 */
// 162 #define HAL_KEY_SW_5_IENBIT HAL_KEY_BIT5 /* Interrupt Enable bit for SW5 */
// 163 #define HAL_KEY_SW_5_EDGE HAL_KEY_RISING_EDGE /* Type of interrupt for SW5 */
// 164 #define HAL_KEY_SW_5_EDGEBIT HAL_KEY_BIT2 /* EdgeType enable bit SW5 */
// 165 #define HAL_KEY_SW_5_ICTL PICTL /* Port Interrupt Control for SW5 */
// 166 #define HAL_KEY_SW_5_ICTLBIT HAL_KEY_BIT4 /* Interrupt enable bit for SW5 */
// 167 #define HAL_KEY_SW_5_PXIFG P0IFG /* Port Interrupt Flag for SW5 */
// 168
// 169 #define HAL_KEY_POINT_HIGH_USED HAL_KEY_SW_5_BIT /* P0 can only be enabled/disabled as group of high or low nibble */
// 170 #endif
// 171
// 172 /**************************************************************************************************
// 173 * TYPEDEFS
// 174 **************************************************************************************************/
// 175
// 176
// 177 /**************************************************************************************************
// 178 * GLOBAL VARIABLES
// 179 **************************************************************************************************/
// 180 static uint8 halKeySavedKeys; /* used to store previous key state in polling mode */
// 181 static halKeyCBack_t pHalKeyProcessFunction;
RSEG XDATA_Z:XDATA:NOROOT(0)
REQUIRE __INIT_XDATA_Z
// 182 bool Hal_KeyIntEnable; /* interrupt enable/disable flag */
Hal_KeyIntEnable:
DS 1
RSEG XDATA_Z:XDATA:NOROOT(0)
REQUIRE __INIT_XDATA_Z
// 183 uint8 halSaveIntKey; /* used by ISR to save state of interrupt-driven keys */
halSaveIntKey:
DS 1
// 184
// 185 static uint8 HalKeyConfigured;
// 186
// 187 /**************************************************************************************************
// 188 * FUNCTIONS - Local
// 189 **************************************************************************************************/
// 190 void halProcessKeyInterrupt (void);
// 191
// 192
// 193 /**************************************************************************************************
// 194 * FUNCTIONS - API
// 195 **************************************************************************************************/
// 196 /**************************************************************************************************
// 197 * @fn HalKeyInit
// 198 *
// 199 * @brief Initilize Key Service
// 200 *
// 201 * @param none
// 202 *
// 203 * @return None
// 204 **************************************************************************************************/
RSEG BANKED_CODE:CODE:NOROOT(0)
// 205 void HalKeyInit( void )
HalKeyInit:
CFI Block cfiBlock0 Using cfiCommon0
CFI Function HalKeyInit
// 206 {
; Saved register size: 0
; Auto size: 0
// 207 #if (HAL_KEY == TRUE)
// 208 /* Initialize previous key to 0 */
// 209 halKeySavedKeys = 0;
// 210
// 211 #if defined (HAL_KEY_SW_6_ENABLE)
// 212 HAL_KEY_SW_6_SEL &= ~(HAL_KEY_SW_6_BIT); /* Set pin function to GPIO */
// 213 HAL_KEY_SW_6_DIR &= ~(HAL_KEY_SW_6_BIT); /* Set pin direction to Input */
// 214 #endif
// 215
// 216 #if defined (HAL_KEY_SW_5_ENABLE)
// 217 HAL_KEY_SW_5_SEL &= ~(HAL_KEY_SW_5_BIT); /* Set pin function to GPIO */
// 218 HAL_KEY_SW_5_DIR &= ~(HAL_KEY_SW_5_BIT); /* Set pin direction to Input */
// 219 HAL_KEY_SW_5_INP |= HAL_KEY_SW_5_BIT; /* Set pin input mode to tri-state */
// 220 #endif
// 221
// 222 /* Initialize callback function */
// 223 pHalKeyProcessFunction = NULL;
// 224
// 225 /* Start with key is not configured */
// 226 HalKeyConfigured = FALSE;
// 227 #endif /* HAL_KEY */
// 228 }
LJMP ?BRET
CFI EndBlock cfiBlock0
// 229
// 230 /**************************************************************************************************
// 231 * @fn HalKeyConfig
// 232 *
// 233 * @brief Configure the Key serivce
// 234 *
// 235 * @param interruptEnable - TRUE/FALSE, enable/disable interrupt
// 236 * cback - pointer to the CallBack function
// 237 *
// 238 * @return None
// 239 **************************************************************************************************/
RSEG BANKED_CODE:CODE:NOROOT(0)
// 240 void HalKeyConfig (bool interruptEnable, halKeyCBack_t cback)
HalKeyConfig:
CFI Block cfiBlock1 Using cfiCommon0
CFI Function HalKeyConfig
// 241 {
; Saved register size: 0
; Auto size: 0
// 242 #if (HAL_KEY == TRUE)
// 243 /* Enable/Disable Interrupt or */
// 244 Hal_KeyIntEnable = interruptEnable;
// 245
// 246 /* Register the callback fucntion */
// 247 pHalKeyProcessFunction = cback;
// 248
// 249 /* Determine if interrupt is enable or not */
// 250 if (Hal_KeyIntEnable)
// 251 {
// 252
// 253 /*
// 254 Work around for CC2430DB when interrupt is enabled and SW5 (center joystick)
// 255 is used. This SW5 uses P2 which also has debug lines connected to it. This
// 256 causes contant interruption on P2INT_VECTOR. Disable the usage of P2 interrupt
// 257 will stop this problem.
// 258 */
// 259 #if defined (HAL_BOARD_CC2430DB)
// 260 #undef HAL_KEY_SW_5_ENABLE /* Dis-allow SW5 when key interrupt is enable */
// 261 #endif
// 262
// 263 #if defined (HAL_KEY_SW_5_ENABLE)
// 264 PICTL &= ~(HAL_KEY_SW_5_EDGEBIT); /* Set rising or falling edge */
// 265 #if (HAL_KEY_SW_5_EDGE == HAL_KEY_FALLING_EDGE)
// 266 PICTL |= HAL_KEY_SW_5_EDGEBIT;
// 267 #endif
// 268 HAL_KEY_SW_5_ICTL |= HAL_KEY_SW_5_ICTLBIT; /* Set interrupt enable bit */
// 269 HAL_KEY_SW_5_IEN |= HAL_KEY_SW_5_IENBIT;
// 270 HAL_KEY_SW_5_PXIFG = ~(HAL_KEY_SW_5_BIT); /* Clear any pending interrupts */
// 271 #endif
// 272
// 273 #if defined (HAL_KEY_SW_6_ENABLE)
// 274 PICTL &= ~(HAL_KEY_SW_6_EDGEBIT); /* Set rising or falling edge */
// 275 #if (HAL_KEY_SW_6_EDGE == HAL_KEY_FALLING_EDGE)
// 276 PICTL |= HAL_KEY_SW_6_EDGEBIT;
// 277 #endif
// 278 HAL_KEY_SW_6_ICTL |= HAL_KEY_SW_6_ICTLBIT; /* Set interrupt enable bit */
// 279 HAL_KEY_SW_6_IEN |= HAL_KEY_SW_6_IENBIT;
// 280 HAL_KEY_SW_6_PXIFG = ~(HAL_KEY_SW_6_BIT); /* Clear any pending interrupts */
// 281 #endif
// 282
// 283 /* Do this only after the hal_key is configured - to work with sleep stuff */
// 284 if (HalKeyConfigured == TRUE)
// 285 {
// 286 osal_stop_timerEx( Hal_TaskID, HAL_KEY_EVENT); /* Cancel polling if active */
// 287 }
// 288 }
// 289 else /* Interrupts NOT enabled */
// 290 {
// 291
// 292 /*
// 293 Work around for CC2430DB when interrupt is enabled and SW5 (center joystick)
// 294 is used. This SW5 uses P2 which also has debug lines connected to it. This
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