📄 mac_mcu.lst
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\ 000000 DS 1
33
34 /* low-level specific */
35 #include "mac_rx.h"
36 #include "mac_tx.h"
37 #include "mac_backoff_timer.h"
38 #include "mac_csp_tx.h"
39 #include "mac_rx_onoff.h"
40
41 /* target specific */
42 #include "mac_mcu.h"
43 #include "mac_radio_defs.h"
44
45 /* debug */
46 #include "mac_assert.h"
47
48
49 /* ------------------------------------------------------------------------------------------------
50 * Defines
51 * ------------------------------------------------------------------------------------------------
52 */
53 #define T2CNF_BASE_VALUE (RUN | SYNC)
54
55 /* for optimized indexing of uint32's */
56 #if HAL_MCU_LITTLE_ENDIAN()
57 #define UINT32_NDX0 0
58 #define UINT32_NDX1 1
59 #define UINT32_NDX2 2
60 #define UINT32_NDX3 3
61 #else
62 #define UINT32_NDX0 3
63 #define UINT32_NDX1 2
64 #define UINT32_NDX2 1
65 #define UINT32_NDX3 0
66 #endif
67
68 /* 32 kHz clock source select in CLKCON */
69 #if !defined (OSC32K_CRYSTAL_INSTALLED) || (defined (OSC32K_CRYSTAL_INSTALLED) && (OSC32K_CRYSTAL_INSTALLED == TRUE))
70 #define OSC_32KHZ 0x00 /* external 32 KHz xosc */
71 #else
72 #define OSC_32KHZ 0x80 /* internal 32 KHz rcosc */
73 #endif
74
75
76 /* ------------------------------------------------------------------------------------------------
77 * Local Variables
78 * ------------------------------------------------------------------------------------------------
79 */
\ In segment XDATA_Z, align 1, keep-with-next
\ 000000 REQUIRE __INIT_XDATA_Z
80 static int8 maxRssi;
\ ??maxRssi:
\ 000000 DS 1
81
82 /*
83 * A shadow variable is required for the lower four bits of T2PEROF2. These bits have different
84 * functionality for read versus write. This would fine except the upper bits of T2PEROF2 are
85 * used to enable and disable interrupts and must be set independently of the lower four bits.
86 * Since the original value of the lower four bits is lost (it reads as something else) these
87 * bits must be stored in a shadow variable. This shadow variable is declared here and is
88 * used where needed in this module.
89 */
\ In segment XDATA_Z, align 1, keep-with-next
\ 000000 REQUIRE __INIT_XDATA_Z
90 static uint8 shadowPerof2;
\ ??shadowPerof2:
\ 000000 DS 1
91
92
93 /* ------------------------------------------------------------------------------------------------
94 * Local Prototypes
95 * ------------------------------------------------------------------------------------------------
96 */
97 static void mcuRecordMaxRssiIsr(void);
98
99
100 /**************************************************************************************************
101 * @fn macMcuInit
102 *
103 * @brief Initialize the MCU.
104 *
105 * @param none
106 *
107 * @return none
108 **************************************************************************************************
109 */
\ In segment BANKED_CODE, align 1, keep-with-next
110 void macMcuInit(void)
\ macMcuInit:
111 {
\ 000000 C082 PUSH DPL
\ 000002 C083 PUSH DPH
\ 000004 ; Saved register size: 2
\ 000004 ; Auto size: 0
112 uint16 i;
113
114 MAC_ASSERT(CHVER != 0x00); /* chip version A is obsolete */
\ 000004 90DF60 MOV DPTR,#-0x20a0
\ 000007 E0 MOVX A,@DPTR
\ 000008 7008 JNZ ??macMcuInit_0
\ 00000A ; Setup parameters for call to function halAssertHandler
\ 00000A 90.... MOV DPTR,#(halAssertHandler & 0xffff)
\ 00000D 74.. MOV A,#((halAssertHandler >> 16) & 0xff)
\ 00000F 12.... LCALL ?BCALL ; Banked call to: DPTR()
115 ///////////////////////////////////////////////////////////////////////////////////
116 // REV_B_WORKAROUND : replace with line below when Rev B is obsoleted
117 #ifndef _REMOVE_REV_B_WORKAROUNDS
118 #else
119 //vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
120 // keep this code, delete the rest
121 MAC_ASSERT(CHVER != 0x01); /* chip version B is obsolete */
122 //^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
123 #endif
124 ///////////////////////////////////////////////////////////////////////////////////
125 MAC_ASSERT(CHVER != 0x02); /* chip version C is obsolete */
\ ??macMcuInit_0:
\ 000012 90DF60 MOV DPTR,#-0x20a0
\ 000015 E0 MOVX A,@DPTR
\ 000016 6402 XRL A,#0x2
\ 000018 7008 JNZ ??macMcuInit_1
\ 00001A ; Setup parameters for call to function halAssertHandler
\ 00001A 90.... MOV DPTR,#(halAssertHandler & 0xffff)
\ 00001D 74.. MOV A,#((halAssertHandler >> 16) & 0xff)
\ 00001F 12.... LCALL ?BCALL ; Banked call to: DPTR()
126
127 ///////////////////////////////////////////////////////////////////////////////////
128 // REV_B_WORKAROUND : workaround for chip bug #51, remove when fixed
129 #ifndef _REMOVE_REV_B_WORKAROUNDS
130 FSCTRLH = 0x41;
\ ??macMcuInit_1:
\ 000022 7441 MOV A,#0x41
\ 000024 90DF10 MOV DPTR,#-0x20f0
\ 000027 F0 MOVX @DPTR,A
131 FSTST1L = 0x32;
\ 000028 7432 MOV A,#0x32
\ 00002A 90DF31 MOV DPTR,#-0x20cf
\ 00002D F0 MOVX @DPTR,A
132 FSTST2H = 0x20;
\ 00002E 7420 MOV A,#0x20
\ 000030 90DF32 MOV DPTR,#-0x20ce
\ 000033 F0 MOVX @DPTR,A
133 #endif
134 ///////////////////////////////////////////////////////////////////////////////////
135
136 ///////////////////////////////////////////////////////////////////////////////////
137 // REV_B_WORKAROUND : workaround for chip bug #267, remove when fixed
138 #ifndef _REMOVE_REV_B_WORKAROUNDS
139 MDMCTRL0L |= AUTOACK; /* enable autoack */
\ 000034 90DF03 MOV DPTR,#-0x20fd
\ 000037 E0 MOVX A,@DPTR
\ 000038 D2E4 SETB 0xE0 /* A */.4
\ 00003A F0 MOVX @DPTR,A
140 #endif
141 ///////////////////////////////////////////////////////////////////////////////////
142
143 /* tuning adjustments for optimal radio performance; details available in datasheet */
144 RXCTRL0H = 0x32;
\ 00003B 7432 MOV A,#0x32
\ 00003D 90DF0C MOV DPTR,#-0x20f4
\ 000040 F0 MOVX @DPTR,A
145 RXCTRL0L = 0xF5;
\ 000041 74F5 MOV A,#-0xb
\ 000043 90DF0D MOV DPTR,#-0x20f3
\ 000046 F0 MOVX @DPTR,A
146
147 ///////////////////////////////////////////////////////////////////////////////////
148 // REV_B_WORKAROUND : workaround for chip bug #267, update when fixed
149 #ifndef _REMOVE_REV_B_WORKAROUNDS
150 /* do nothing */
151 #else
152 // this part can go away once new .h file is shipping
153 #ifndef IRQSRC
154 #define IRQSRC XREG( 0xDF64 )
155 #endif
156 //vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
157 // keep this code, delete the rest
158 /* enable TX_DONE interrupts for ACK transmits */
159 IRQSRC = TXACK;
160 //^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
161 #endif
162 ///////////////////////////////////////////////////////////////////////////////////
163
164 /* disable the CSPT register compare function */
165 CSPT = 0xFF;
\ 000047 74FF MOV A,#-0x1
\ 000049 90DF16 MOV DPTR,#-0x20ea
\ 00004C F0 MOVX @DPTR,A
166
167 /* enable general RF interrupts */
168 IEN2 |= RFIE;
\ 00004D 439A01 ORL 0x9a,#0x1
169
170 /* intialize shadow register */
171 shadowPerof2 = 0;
\ 000050 E4 CLR A
\ 000051 90.... MOV DPTR,#??shadowPerof2
\ 000054 F0 MOVX @DPTR,A
172
173 /* set RF interrupts one notch above lowest priority (four levels available) */
174 IP0 |= IP_RFERR_RF_DMA_BV;
\ 000055 43A901 ORL 0xa9,#0x1
175 IP1 &= ~IP_RFERR_RF_DMA_BV;
\ 000058 53B9FE ANL 0xb9,#0xfe
176
177 /*-------------------------------------------------------------------------------
178 * Initialize MAC timer.
179 */
180
181 /* set timer rollover */
182 T2CAPLPL = MAC_RADIO_TIMER_TICKS_PER_BACKOFF() & 0xFF;
\ 00005B 75A400 MOV 0xa4,#0x0
183 T2CAPHPH = MAC_RADIO_TIMER_TICKS_PER_BACKOFF() >> 8;
\ 00005E 75A528 MOV 0xa5,#0x28
184
185 /* start timer */
186 T2CNF |= RUN;
\ 000061 43C301 ORL 0xc3,#0x1
187
188 /* enable timer interrupts */
189 T2IE = 1;
\ 000064 D2BA SETB 0xb8.2
190
191 /* configure clock to use XOSC */
192 SLEEP &= ~OSC_PD; /* turn on 16MHz RC and 32MHz XOSC */
\ 000066 53BEFB ANL 0xbe,#0xfb
193 while (!(SLEEP & XOSC_STB)); /* wait for 32MHz XOSC stable */
\ ??macMcuInit_2:
\ 000069 E5BE MOV A,0xbe
\ 00006B A2E6 MOV C,0xE0 /* A */.6
\ 00006D 50FA JNC ??macMcuInit_2
194 asm("NOP"); /* chip bug workaround */
\ 00006F 00 NOP
195 for (i=0; i<504; i++) asm("NOP"); /* Require 63us delay for Rev B */
\ 000070 78F8 MOV R0,#-0x8
\ 000072 7901 MOV R1,#0x1
\ ??macMcuInit_3:
\ 000074 00 NOP
\ 000075 E8 MOV A,R0
\ 000076 24FF ADD A,#-0x1
\ 000078 18 DEC R0
\ 000079 E9 MOV A,R1
\ 00007A 34FF ADDC A,#-0x1
\ 00007C F9 MOV R1,A
\ 00007D E8 MOV A,R0
\ 00007E 7001 JNZ ??macMcuInit_4
\ 000080 E9 MOV A,R1
\ ??macMcuInit_4:
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