led_test.map.qmsg

最简单的nios例程

{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cpu_0_jtag_debug_module_wrapper first_nios2_system:inst\|cpu_0:the_cpu_0\|cpu_0_nios2_oci:the_cpu_0_nios2_oci\|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper " "Info: Elaborating entity \"cpu_0_jtag_debug_module_wrapper\" for hierarchy \"first_nios2_system:inst\|cpu_0:the_cpu_0\|cpu_0_nios2_oci:the_cpu_0_nios2_oci\|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper\"" {  } { { "cpu_0.v" "the_cpu_0_jtag_debug_module_wrapper" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0.v" 3745 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "cpu_0_jtag_debug_module.v 1 1 " "Warning: Using design file cpu_0_jtag_debug_module.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 cpu_0_jtag_debug_module " "Info: Found entity 1: cpu_0_jtag_debug_module" {  } { { "cpu_0_jtag_debug_module.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0_jtag_debug_module.v" 18 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cpu_0_jtag_debug_module first_nios2_system:inst\|cpu_0:the_cpu_0\|cpu_0_nios2_oci:the_cpu_0_nios2_oci\|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper\|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1 " "Info: Elaborating entity \"cpu_0_jtag_debug_module\" for hierarchy \"first_nios2_system:inst\|cpu_0:the_cpu_0\|cpu_0_nios2_oci:the_cpu_0_nios2_oci\|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper\|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1\"" {  } { { "cpu_0_jtag_debug_module_wrapper.v" "the_cpu_0_jtag_debug_module1" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0_jtag_debug_module_wrapper.v" 211 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "onchip_RAM_s1_arbitrator first_nios2_system:inst\|onchip_RAM_s1_arbitrator:the_onchip_RAM_s1 " "Info: Elaborating entity \"onchip_RAM_s1_arbitrator\" for hierarchy \"first_nios2_system:inst\|onchip_RAM_s1_arbitrator:the_onchip_RAM_s1\"" {  } { { "first_nios2_system.v" "the_onchip_RAM_s1" { Text "F:/alter/2sfenpin/liz/led_test/first_nios2_system.v" 2604 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "onchip_RAM.v 1 1 " "Warning: Using design file onchip_RAM.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 onchip_RAM " "Info: Found entity 1: onchip_RAM" {  } { { "onchip_RAM.v" "" { Text "F:/alter/2sfenpin/liz/led_test/onchip_RAM.v" 21 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "onchip_RAM first_nios2_system:inst\|onchip_RAM:the_onchip_RAM " "Info: Elaborating entity \"onchip_RAM\" for hierarchy \"first_nios2_system:inst\|onchip_RAM:the_onchip_RAM\"" {  } { { "first_nios2_system.v" "the_onchip_RAM" { Text "F:/alter/2sfenpin/liz/led_test/first_nios2_system.v" 2616 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram first_nios2_system:inst\|onchip_RAM:the_onchip_RAM\|altsyncram:the_altsyncram " "Info: Elaborating entity \"altsyncram\" for hierarchy \"first_nios2_system:inst\|onchip_RAM:the_onchip_RAM\|altsyncram:the_altsyncram\"" {  } { { "onchip_RAM.v" "the_altsyncram" { Text "F:/alter/2sfenpin/liz/led_test/onchip_RAM.v" 90 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "first_nios2_system:inst\|onchip_RAM:the_onchip_RAM\|altsyncram:the_altsyncram " "Info: Elaborated megafunction instantiation \"first_nios2_system:inst\|onchip_RAM:the_onchip_RAM\|altsyncram:the_altsyncram\"" {  } { { "onchip_RAM.v" "" { Text "F:/alter/2sfenpin/liz/led_test/onchip_RAM.v" 90 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_oeb1.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_oeb1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_oeb1 " "Info: Found entity 1: altsyncram_oeb1" {  } { { "db/altsyncram_oeb1.tdf" "" { Text "F:/alter/2sfenpin/liz/led_test/db/altsyncram_oeb1.tdf" 27 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_oeb1 first_nios2_system:inst\|onchip_RAM:the_onchip_RAM\|altsyncram:the_altsyncram\|altsyncram_oeb1:auto_generated " "Info: Elaborating entity \"altsyncram_oeb1\" for hierarchy \"first_nios2_system:inst\|onchip_RAM:the_onchip_RAM\|altsyncram:the_altsyncram\|altsyncram_oeb1:auto_generated\"" {  } { { "altsyncram.tdf" "auto_generated" { Text "d:/altera/72/quartus/libraries/megafunctions/altsyncram.tdf" 918 4 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WMIO_MIO_HEX_DATA_WRAPPING_HEAD" "F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex 32 10 " "Warning: Width of data items in F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex is greater than the memory width. Wrapping data items to subsequent addresses. Found 32 warnings, reporting 10" { { "Warning" "WMIO_MIO_DATA_WRAPPING" "2 F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex " "Warning: Data at line (2) of memory initialization file \"F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." {  } { { "F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex" "" { Text "F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex" 2 -1 0 } }  } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0} { "Warning" "WMIO_MIO_DATA_WRAPPING" "3 F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex " "Warning: Data at line (3) of memory initialization file \"F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." {  } { { "F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex" "" { Text "F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex" 3 -1 0 } }  } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0} { "Warning" "WMIO_MIO_DATA_WRAPPING" "4 F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex " "Warning: Data at line (4) of memory initialization file \"F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." {  } { { "F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex" "" { Text "F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex" 4 -1 0 } }  } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0} { "Warning" "WMIO_MIO_DATA_WRAPPING" "5 F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex " "Warning: Data at line (5) of memory initialization file \"F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." {  } { { "F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex" "" { Text "F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex" 5 -1 0 } }  } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0} { "Warning" "WMIO_MIO_DATA_WRAPPING" "6 F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex " "Warning: Data at line (6) of memory initialization file \"F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." {  } { { "F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex" "" { Text "F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex" 6 -1 0 } }  } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0} { "Warning" "WMIO_MIO_DATA_WRAPPING" "7 F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex " "Warning: Data at line (7) of memory initialization file \"F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." {  } { { "F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex" "" { Text "F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex" 7 -1 0 } }  } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0} { "Warning" "WMIO_MIO_DATA_WRAPPING" "8 F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex " "Warning: Data at line (8) of memory initialization file \"F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." {  } { { "F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex" "" { Text "F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex" 8 -1 0 } }  } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0} { "Warning" "WMIO_MIO_DATA_WRAPPING" "9 F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex " "Warning: Data at line (9) of memory initialization file \"F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." {  } { { "F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex" "" { Text "F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex" 9 -1 0 } }  } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0} { "Warning" "WMIO_MIO_DATA_WRAPPING" "10 F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex " "Warning: Data at line (10) of memory initialization file \"F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." {  } { { "F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex" "" { Text "F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex" 10 -1 0 } }  } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0} { "Warning" "WMIO_MIO_DATA_WRAPPING" "11 F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex " "Warning: Data at line (11) of memory initialization file \"F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." {  } { { "F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex" "" { Text "F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex" 11 -1 0 } }  } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0}  } { { "F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex" "" { Text "F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex" 1 -1 0 } }  } 0 0 "Width of data items in %1!s! is greater than the memory width. Wrapping data items to subsequent addresses. Found %2!u! warnings, reporting %3!u!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "onchip_ROM_s1_arbitrator first_nios2_system:inst\|onchip_ROM_s1_arbitrator:the_onchip_ROM_s1 " "Info: Elaborating entity \"onchip_ROM_s1_arbitrator\" for hierarchy \"first_nios2_system:inst\|onchip_ROM_s1_arbitrator:the_onchip_ROM_s1\"" {  } { { "first_nios2_system.v" "the_onchip_ROM_s1" { Text "F:/alter/2sfenpin/liz/led_test/first_nios2_system.v" 2651 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "onchip_ROM.v 1 1 " "Warning: Using design file onchip_ROM.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 onchip_ROM " "Info: Found entity 1: onchip_ROM" {  } { { "onchip_ROM.v" "" { Text "F:/alter/2sfenpin/liz/led_test/onchip_ROM.v" 21 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "onchip_ROM first_nios2_system:inst\|onchip_ROM:the_onchip_ROM " "Info: Elaborating entity \"onchip_ROM\" for hierarchy \"first_nios2_system:inst\|onchip_ROM:the_onchip_ROM\"" {  } { { "first_nios2_system.v" "the_onchip_ROM" { Text "F:/alter/2sfenpin/liz/led_test/first_nios2_system.v" 2664 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram first_nios2_system:inst\|onchip_ROM:the_onchip_ROM\|altsyncram:the_altsyncram " "Info: Elaborating entity \"altsyncram\" for hierarchy \"first_nios2_system:inst\|onchip_ROM:the_onchip_ROM\|altsyncram:the_altsyncram\"" {  } { { "onchip_ROM.v" "the_altsyncram" { Text "F:/alter/2sfenpin/liz/led_test/onchip_ROM.v" 92 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "first_nios2_system:inst\|onchip_ROM:the_onchip_ROM\|altsyncram:the_altsyncram " "Info: Elaborated megafunction instantiation \"first_nios2_system:inst\|onchip_ROM:the_onchip_ROM\|altsyncram:the_altsyncram\"" {  } { { "onchip_ROM.v" "" { Text "F:/alter/2sfenpin/liz/led_test/onchip_ROM.v" 92 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_teb1.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_teb1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_teb1 " "Info: Found entity 1: altsyncram_teb1" {  } { { "db/altsyncram_teb1.tdf" "" { Text "F:/alter/2sfenpin/liz/led_test/db/altsyncram_teb1.tdf" 27 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_teb1 first_nios2_system:inst\|onchip_ROM:the_onchip_ROM\|altsyncram:the_altsyncram\|altsyncram_teb1:auto_generated " "Info: Elaborating entity \"altsyncram_teb1\" for hierarchy \"first_nios2_system:inst\|onchip_ROM:the_onchip_ROM\|altsyncram:the_altsyncram\|altsyncram_teb1:auto_generated\"" {  } { { "altsyncram.tdf" "auto_generated" { Text "d:/altera/72/quartus/libraries/megafunctions/altsyncram.tdf" 918 4 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WMIO_MIO_HEX_DATA_WRAPPING_HEAD" "F:/alter/2sfenpin/liz/led_test/onchip_ROM.hex 64 10 " "Warning: Width of data items in F:/alter/2sfenpin/liz/led_test/onchip_ROM.hex is greater than the memory width. Wrapping data items to subsequent addresses. Found 64 warnings, reporting 10" { { "Warning" "WMIO_MIO_DATA_WRAPPING" "2 F:/alter/2sfenpin/liz/led_test/onchip_ROM.hex " "Warning: Data at line (2) of memory initialization file \"F:/alter/2sfenpin/liz/led_test/onchip_ROM.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses."