first_nios2_system.v

最简单的nios例程

//megafunction wizard: %Altera SOPC Builder%
//GENERATION: STANDARD
//VERSION: WM1.0


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// synthesis translate_off
`timescale 1ns / 1ps
// synthesis translate_on

// turn off superfluous verilog processor warnings 
// altera message_level Level1 
// altera message_off 10034 10035 10036 10037 10230 10240 10030 

module LED_PIO_s1_arbitrator (
                               // inputs:
                                clk,
                                cpu_0_data_master_address_to_slave,
                                cpu_0_data_master_read,
                                cpu_0_data_master_waitrequest,
                                cpu_0_data_master_write,
                                cpu_0_data_master_writedata,
                                reset_n,

                               // outputs:
                                LED_PIO_s1_address,
                                LED_PIO_s1_chipselect,
                                LED_PIO_s1_reset_n,
                                LED_PIO_s1_write_n,
                                LED_PIO_s1_writedata,
                                cpu_0_data_master_granted_LED_PIO_s1,
                                cpu_0_data_master_qualified_request_LED_PIO_s1,
                                cpu_0_data_master_read_data_valid_LED_PIO_s1,
                                cpu_0_data_master_requests_LED_PIO_s1,
                                d1_LED_PIO_s1_end_xfer
                             )
  /* synthesis auto_dissolve = "FALSE" */ ;

  output  [  1: 0] LED_PIO_s1_address;
  output           LED_PIO_s1_chipselect;
  output           LED_PIO_s1_reset_n;
  output           LED_PIO_s1_write_n;
  output           LED_PIO_s1_writedata;
  output           cpu_0_data_master_granted_LED_PIO_s1;
  output           cpu_0_data_master_qualified_request_LED_PIO_s1;
  output           cpu_0_data_master_read_data_valid_LED_PIO_s1;
  output           cpu_0_data_master_requests_LED_PIO_s1;
  output           d1_LED_PIO_s1_end_xfer;
  input            clk;
  input   [ 13: 0] cpu_0_data_master_address_to_slave;
  input            cpu_0_data_master_read;
  input            cpu_0_data_master_waitrequest;
  input            cpu_0_data_master_write;
  input   [ 31: 0] cpu_0_data_master_writedata;
  input            reset_n;

  wire    [  1: 0] LED_PIO_s1_address;
  wire             LED_PIO_s1_allgrants;
  wire             LED_PIO_s1_allow_new_arb_cycle;
  wire             LED_PIO_s1_any_bursting_master_saved_grant;
  wire             LED_PIO_s1_any_continuerequest;
  wire             LED_PIO_s1_arb_counter_enable;
  reg              LED_PIO_s1_arb_share_counter;
  wire             LED_PIO_s1_arb_share_counter_next_value;
  wire             LED_PIO_s1_arb_share_set_values;
  wire             LED_PIO_s1_beginbursttransfer_internal;
  wire             LED_PIO_s1_begins_xfer;
  wire             LED_PIO_s1_chipselect;
  wire             LED_PIO_s1_end_xfer;
  wire             LED_PIO_s1_firsttransfer;
  wire             LED_PIO_s1_grant_vector;
  wire             LED_PIO_s1_in_a_read_cycle;
  wire             LED_PIO_s1_in_a_write_cycle;
  wire             LED_PIO_s1_master_qreq_vector;
  wire             LED_PIO_s1_non_bursting_master_requests;
  reg              LED_PIO_s1_reg_firsttransfer;
  wire             LED_PIO_s1_reset_n;
  reg              LED_PIO_s1_slavearbiterlockenable;
  wire             LED_PIO_s1_slavearbiterlockenable2;
  wire             LED_PIO_s1_unreg_firsttransfer;
  wire             LED_PIO_s1_waits_for_read;
  wire             LED_PIO_s1_waits_for_write;
  wire             LED_PIO_s1_write_n;
  wire             LED_PIO_s1_writedata;
  wire             cpu_0_data_master_arbiterlock;
  wire             cpu_0_data_master_arbiterlock2;
  wire             cpu_0_data_master_continuerequest;
  wire             cpu_0_data_master_granted_LED_PIO_s1;
  wire             cpu_0_data_master_qualified_request_LED_PIO_s1;
  wire             cpu_0_data_master_read_data_valid_LED_PIO_s1;
  wire             cpu_0_data_master_requests_LED_PIO_s1;
  wire             cpu_0_data_master_saved_grant_LED_PIO_s1;
  reg              d1_LED_PIO_s1_end_xfer;
  reg              d1_reasons_to_wait;
  reg              enable_nonzero_assertions;
  wire             end_xfer_arb_share_counter_term_LED_PIO_s1;
  wire             in_a_read_cycle;
  wire             in_a_write_cycle;
  wire    [ 13: 0] shifted_address_to_LED_PIO_s1_from_cpu_0_data_master;
  wire             wait_for_LED_PIO_s1_counter;
  always @(posedge clk or negedge reset_n)
    begin
      if (reset_n == 0)
          d1_reasons_to_wait <= 0;
      else if (1)
          d1_reasons_to_wait <= ~LED_PIO_s1_end_xfer;
    end


  assign LED_PIO_s1_begins_xfer = ~d1_reasons_to_wait & ((cpu_0_data_master_qualified_request_LED_PIO_s1));
  assign cpu_0_data_master_requests_LED_PIO_s1 = (({cpu_0_data_master_address_to_slave[13 : 4] , 4'b0} == 14'h2800) & (cpu_0_data_master_read | cpu_0_data_master_write)) & cpu_0_data_master_write;
  //LED_PIO_s1_arb_share_counter set values, which is an e_mux
  assign LED_PIO_s1_arb_share_set_values = 1;

  //LED_PIO_s1_non_bursting_master_requests mux, which is an e_mux
  assign LED_PIO_s1_non_bursting_master_requests = cpu_0_data_master_requests_LED_PIO_s1;

  //LED_PIO_s1_any_bursting_master_saved_grant mux, which is an e_mux
  assign LED_PIO_s1_any_bursting_master_saved_grant = 0;

  //LED_PIO_s1_arb_share_counter_next_value assignment, which is an e_assign
  assign LED_PIO_s1_arb_share_counter_next_value = LED_PIO_s1_firsttransfer ? (LED_PIO_s1_arb_share_set_values - 1) : |LED_PIO_s1_arb_share_counter ? (LED_PIO_s1_arb_share_counter - 1) : 0;

  //LED_PIO_s1_allgrants all slave grants, which is an e_mux
  assign LED_PIO_s1_allgrants = |LED_PIO_s1_grant_vector;

  //LED_PIO_s1_end_xfer assignment, which is an e_assign
  assign LED_PIO_s1_end_xfer = ~(LED_PIO_s1_waits_for_read | LED_PIO_s1_waits_for_write);

  //end_xfer_arb_share_counter_term_LED_PIO_s1 arb share counter enable term, which is an e_assign
  assign end_xfer_arb_share_counter_term_LED_PIO_s1 = LED_PIO_s1_end_xfer & (~LED_PIO_s1_any_bursting_master_saved_grant | in_a_read_cycle | in_a_write_cycle);

  //LED_PIO_s1_arb_share_counter arbitration counter enable, which is an e_assign
  assign LED_PIO_s1_arb_counter_enable = (end_xfer_arb_share_counter_term_LED_PIO_s1 & LED_PIO_s1_allgrants) | (end_xfer_arb_share_counter_term_LED_PIO_s1 & ~LED_PIO_s1_non_bursting_master_requests);

  //LED_PIO_s1_arb_share_counter counter, which is an e_register
  always @(posedge clk or negedge reset_n)
    begin
      if (reset_n == 0)
          LED_PIO_s1_arb_share_counter <= 0;
      else if (LED_PIO_s1_arb_counter_enable)
          LED_PIO_s1_arb_share_counter <= LED_PIO_s1_arb_share_counter_next_value;
    end


  //LED_PIO_s1_slavearbiterlockenable slave enables arbiterlock, which is an e_register
  always @(posedge clk or negedge reset_n)
    begin
      if (reset_n == 0)
          LED_PIO_s1_slavearbiterlockenable <= 0;
      else if ((|LED_PIO_s1_master_qreq_vector & end_xfer_arb_share_counter_term_LED_PIO_s1) | (end_xfer_arb_share_counter_term_LED_PIO_s1 & ~LED_PIO_s1_non_bursting_master_requests))
          LED_PIO_s1_slavearbiterlockenable <= |LED_PIO_s1_arb_share_counter_next_value;
    end


  //cpu_0/data_master LED_PIO/s1 arbiterlock, which is an e_assign
  assign cpu_0_data_master_arbiterlock = LED_PIO_s1_slavearbiterlockenable & cpu_0_data_master_continuerequest;

  //LED_PIO_s1_slavearbiterlockenable2 slave enables arbiterlock2, which is an e_assign
  assign LED_PIO_s1_slavearbiterlockenable2 = |LED_PIO_s1_arb_share_counter_next_value;

  //cpu_0/data_master LED_PIO/s1 arbiterlock2, which is an e_assign
  assign cpu_0_data_master_arbiterlock2 = LED_PIO_s1_slavearbiterlockenable2 & cpu_0_data_master_continuerequest;

  //LED_PIO_s1_any_continuerequest at least one master continues requesting, which is an e_assign
  assign LED_PIO_s1_any_continuerequest = 1;

  //cpu_0_data_master_continuerequest continued request, which is an e_assign
  assign cpu_0_data_master_continuerequest = 1;

  assign cpu_0_data_master_qualified_request_LED_PIO_s1 = cpu_0_data_master_requests_LED_PIO_s1 & ~(((~cpu_0_data_master_waitrequest) & cpu_0_data_master_write));
  //LED_PIO_s1_writedata mux, which is an e_mux
  assign LED_PIO_s1_writedata = cpu_0_data_master_writedata;

  //master is always granted when requested
  assign cpu_0_data_master_granted_LED_PIO_s1 = cpu_0_data_master_qualified_request_LED_PIO_s1;

  //cpu_0/data_master saved-grant LED_PIO/s1, which is an e_assign
  assign cpu_0_data_master_saved_grant_LED_PIO_s1 = cpu_0_data_master_requests_LED_PIO_s1;

  //allow new arb cycle for LED_PIO/s1, which is an e_assign
  assign LED_PIO_s1_allow_new_arb_cycle = 1;

  //placeholder chosen master
  assign LED_PIO_s1_grant_vector = 1;

  //placeholder vector of master qualified-requests
  assign LED_PIO_s1_master_qreq_vector = 1;

  //LED_PIO_s1_reset_n assignment, which is an e_assign
  assign LED_PIO_s1_reset_n = reset_n;

  assign LED_PIO_s1_chipselect = cpu_0_data_master_granted_LED_PIO_s1;
  //LED_PIO_s1_firsttransfer first transaction, which is an e_assign
  assign LED_PIO_s1_firsttransfer = LED_PIO_s1_begins_xfer ? LED_PIO_s1_unreg_firsttransfer : LED_PIO_s1_reg_firsttransfer;

  //LED_PIO_s1_unreg_firsttransfer first transaction, which is an e_assign
  assign LED_PIO_s1_unreg_firsttransfer = ~(LED_PIO_s1_slavearbiterlockenable & LED_PIO_s1_any_continuerequest);

  //LED_PIO_s1_reg_firsttransfer first transaction, which is an e_register
  always @(posedge clk or negedge reset_n)
    begin
      if (reset_n == 0)
          LED_PIO_s1_reg_firsttransfer <= 1'b1;
      else if (LED_PIO_s1_begins_xfer)
          LED_PIO_s1_reg_firsttransfer <= LED_PIO_s1_unreg_firsttransfer;
    end


  //LED_PIO_s1_beginbursttransfer_internal begin burst transfer, which is an e_assign
  assign LED_PIO_s1_beginbursttransfer_internal = LED_PIO_s1_begins_xfer;