led_test.map.rpt

最简单的nios例程

; Auto RAM Replacement                                                           ; On                 ; On                 ;
; Auto Shift Register Replacement                                                ; Auto               ; Auto               ;
; Auto Clock Enable Replacement                                                  ; On                 ; On                 ;
; Allow Synchronous Control Signals                                              ; On                 ; On                 ;
; Force Use of Synchronous Clear Signals                                         ; Off                ; Off                ;
; Auto RAM to Logic Cell Conversion                                              ; Off                ; Off                ;
; Auto Resource Sharing                                                          ; Off                ; Off                ;
; Allow Any RAM Size For Recognition                                             ; Off                ; Off                ;
; Allow Any ROM Size For Recognition                                             ; Off                ; Off                ;
; Allow Any Shift Register Size For Recognition                                  ; Off                ; Off                ;
; Ignore translate_off and synthesis_off directives                              ; Off                ; Off                ;
; Show Parameter Settings Tables in Synthesis Report                             ; On                 ; On                 ;
; Ignore Maximum Fan-Out Assignments                                             ; Off                ; Off                ;
; Retiming Meta-Stability Register Sequence Length                               ; 2                  ; 2                  ;
; PowerPlay Power Optimization                                                   ; Normal compilation ; Normal compilation ;
; HDL message level                                                              ; Level2             ; Level2             ;
; Suppress Register Optimization Related Messages                                ; Off                ; Off                ;
; Number of Removed Registers Reported in Synthesis Report                       ; 100                ; 100                ;
; Clock MUX Protection                                                           ; On                 ; On                 ;
; Block Design Naming                                                            ; Auto               ; Auto               ;
+--------------------------------------------------------------------------------+--------------------+--------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Source Files Read                                                                                                                        ;
+-----------------------------------+-----------------+------------------------------------+--------------------------------------------------------------------+
; File Name with User-Entered Path  ; Used in Netlist ; File Type                          ; File Name with Absolute Path                                       ;
+-----------------------------------+-----------------+------------------------------------+--------------------------------------------------------------------+
; led_test.bdf                      ; yes             ; User Block Diagram/Schematic File  ; F:/alter/2sfenpin/liz/led_test/led_test.bdf                        ;
; first_nios2_system.v              ; yes             ; Other                              ; F:/alter/2sfenpin/liz/led_test/first_nios2_system.v                ;
; LED_PIO.v                         ; yes             ; Other                              ; F:/alter/2sfenpin/liz/led_test/LED_PIO.v                           ;
; cpu_0.v                           ; yes             ; Encrypted File                     ; F:/alter/2sfenpin/liz/led_test/cpu_0.v                             ;
; cpu_0_test_bench.v                ; yes             ; Other                              ; F:/alter/2sfenpin/liz/led_test/cpu_0_test_bench.v                  ;
; altsyncram.tdf                    ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/altsyncram.tdf        ;
; stratix_ram_block.inc             ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/stratix_ram_block.inc ;
; lpm_mux.inc                       ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/lpm_mux.inc           ;
; lpm_decode.inc                    ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/lpm_decode.inc        ;
; aglobal72.inc                     ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/aglobal72.inc         ;
; a_rdenreg.inc                     ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/a_rdenreg.inc         ;
; altrom.inc                        ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/altrom.inc            ;
; altram.inc                        ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/altram.inc            ;
; altdpram.inc                      ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/altdpram.inc          ;
; altqpram.inc                      ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/altqpram.inc          ;
; db/altsyncram_uob1.tdf            ; yes             ; Auto-Generated Megafunction        ; F:/alter/2sfenpin/liz/led_test/db/altsyncram_uob1.tdf              ;
; db/altsyncram_6sk1.tdf            ; yes             ; Auto-Generated Megafunction        ; F:/alter/2sfenpin/liz/led_test/db/altsyncram_6sk1.tdf              ;
; db/altsyncram_phe1.tdf            ; yes             ; Auto-Generated Megafunction        ; F:/alter/2sfenpin/liz/led_test/db/altsyncram_phe1.tdf              ;
; cpu_0_ic_tag_ram.mif              ; yes             ; Other                              ; F:/alter/2sfenpin/liz/led_test/cpu_0_ic_tag_ram.mif                ;
; db/altsyncram_4be1.tdf            ; yes             ; Auto-Generated Megafunction        ; F:/alter/2sfenpin/liz/led_test/db/altsyncram_4be1.tdf              ;
; cpu_0_rf_ram_a.mif                ; yes             ; Other                              ; F:/alter/2sfenpin/liz/led_test/cpu_0_rf_ram_a.mif                  ;
; db/altsyncram_5be1.tdf            ; yes             ; Auto-Generated Megafunction        ; F:/alter/2sfenpin/liz/led_test/db/altsyncram_5be1.tdf              ;
; cpu_0_rf_ram_b.mif                ; yes             ; Other                              ; F:/alter/2sfenpin/liz/led_test/cpu_0_rf_ram_b.mif                  ;
; db/altsyncram_c572.tdf            ; yes             ; Auto-Generated Megafunction        ; F:/alter/2sfenpin/liz/led_test/db/altsyncram_c572.tdf              ;
; cpu_0_ociram_default_contents.mif ; yes             ; Other                              ; F:/alter/2sfenpin/liz/led_test/cpu_0_ociram_default_contents.mif   ;
; db/altsyncram_e502.tdf            ; yes             ; Auto-Generated Megafunction        ; F:/alter/2sfenpin/liz/led_test/db/altsyncram_e502.tdf              ;
; cpu_0_jtag_debug_module_wrapper.v ; yes             ; Other                              ; F:/alter/2sfenpin/liz/led_test/cpu_0_jtag_debug_module_wrapper.v   ;
; cpu_0_jtag_debug_module.v         ; yes             ; Other                              ; F:/alter/2sfenpin/liz/led_test/cpu_0_jtag_debug_module.v           ;
; onchip_RAM.v                      ; yes             ; Other                              ; F:/alter/2sfenpin/liz/led_test/onchip_RAM.v                        ;
; db/altsyncram_oeb1.tdf            ; yes             ; Auto-Generated Megafunction        ; F:/alter/2sfenpin/liz/led_test/db/altsyncram_oeb1.tdf              ;
; onchip_RAM.hex                    ; yes             ; Other                              ; F:/alter/2sfenpin/liz/led_test/onchip_RAM.hex                      ;
; onchip_ROM.v                      ; yes             ; Other                              ; F:/alter/2sfenpin/liz/led_test/onchip_ROM.v                        ;
; db/altsyncram_teb1.tdf            ; yes             ; Auto-Generated Megafunction        ; F:/alter/2sfenpin/liz/led_test/db/altsyncram_teb1.tdf              ;
; onchip_ROM.hex                    ; yes             ; Other                              ; F:/alter/2sfenpin/liz/led_test/onchip_ROM.hex                      ;
; sysid.v                           ; yes             ; Other                              ; F:/alter/2sfenpin/liz/led_test/sysid.v                             ;
; sld_hub.vhd                       ; yes             ; Encrypted Megafunction             ; d:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd           ;
; lpm_shiftreg.tdf                  ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/lpm_shiftreg.tdf      ;
; lpm_constant.inc                  ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/lpm_constant.inc      ;
; dffeea.inc                        ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/dffeea.inc            ;
; lpm_decode.tdf                    ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/lpm_decode.tdf        ;
; declut.inc                        ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/declut.inc            ;