📄 iic.lst
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// IIC1_CLK = 0xA0|IIC_BaudRate;
// IIC1_CON = 0x00;
WaitStop();
return(value.dw);
}
#endif
385 unsigned short ReadWordIIC_HW(unsigned char device,unsigned char addr)
386 {
C51 COMPILER V7.20 IIC 09/14/2004 12:20:59 PAGE 19
387 1 unsigned char ch;
388 1 unsigned short value;
389 1 /* start bit */
390 1 /* transmit device */
391 1 INTIIC1_FLG = 0xff;
392 1 IIC1_DATA = device;
393 1 IIC1_CLK = 0x20 | IIC_BaudRate;
394 1 /* transmit addr */
395 1 MasterSendByte(addr);
396 1 /* transmit dumy data for restart bit */
397 1 WaitTx();
398 1 /* stop bit */
399 1 IIC1_CLK = 0xA0|IIC_BaudRate;
400 1 // IIC1_CON = 0x00;
401 1 /* restart bit */
402 1 WaitStop();
403 1 /* transmit device */
404 1 IIC1_DATA = device+1;
405 1 IIC1_CLK = 0x60 | IIC_BaudRate;
406 1 WaitTx();
407 1 /* read data */
408 1 // IIC1_CON = 0x00;
409 1 ch = MasterReadByte(2);
410 1 // IIC1_CON = 0x02;
411 1 value = MasterReadByte(1);
412 1 value <<= 8;
413 1 value |= ch;
414 1 /* no ack */
415 1 /* stop bit */
416 1 // IIC1_CLK = 0xA0|IIC_BaudRate;
417 1 // IIC1_CON = 0x00;
418 1 WaitStop();
419 1 return(value);
420 1 }
421
422 unsigned char ReadIIC_HW(unsigned char device,unsigned char addr)
423 {
424 1 unsigned char value;
425 1 /* start bit */
426 1 /* transmit device */
427 1 INTIIC1_FLG = 0xff;
428 1 IIC1_DATA = device;
429 1 IIC1_CLK = 0x20 | IIC_BaudRate;
430 1 /* transmit addr */
431 1 MasterSendByte(addr);
432 1 /* transmit dumy data for restart bit */
433 1 WaitTx();
434 1 /* stop bit */
435 1 IIC1_CLK = 0xA0|IIC_BaudRate;
436 1 // IIC1_CON = 0x00;
437 1 /* restart bit */
438 1 WaitStop();
439 1 /* transmit device */
440 1 IIC1_DATA = device+1;
441 1 IIC1_CLK = 0x60 | IIC_BaudRate;
442 1 WaitTx();
443 1 /* read data */
444 1 // IIC1_CON = 0x02;
445 1 value = MasterReadByte(1);
446 1 /* no ack */
447 1 /* stop bit */
448 1 // IIC1_CLK = 0xA0|IIC_BaudRate;
C51 COMPILER V7.20 IIC 09/14/2004 12:20:59 PAGE 20
449 1 // IIC1_CON = 0x00;
450 1 WaitStop();
451 1 return(value);
452 1 }
453
454 unsigned char MasterReadByte(unsigned char k)
455 {
456 1 unsigned char i;
457 1 Timer1 = 100;
458 1 while((INTIIC1_FLG & INTRX) == 0){
459 2 if(Timer1 == 0){
460 3 if((flag3 & BIT_2) != 0x00){
461 4 printf("ACK Fail4\r\n");
462 4 }
463 3 EA = 0;
464 3 break;
465 3 }
466 2 }
467 1 if(k == 1){
468 2 IIC1_CON = 0x02;
469 2 }
470 1 else{
471 2 IIC1_CON = 0x00;
472 2 }
473 1 INTIIC1_FLG = INTRX;
474 1 i = IIC1_DATA;
475 1 return i;
476 1 }
477
478 void WaitStop(void)
479 {
480 1 Timer1 = 100;
481 1 while((IIC1_CON & STOP) == 0){
482 2 if(Timer1 == 0){
483 3 if((flag3 & BIT_2) != 0x00){
484 4 printf("Stop Fail\r\n");
485 4 }
486 3 EA = 0;
487 3 break;
488 3 }
489 2 }
490 1 IIC1_CON = 0x00;
491 1 }
492
493 void CheckDevice(void)
494 {
495 1 DeviceFlag = 0;
496 1 //check SAA7114
497 1 if((flag3 & BIT_2) != 0x00){
498 2 printf("Video Decoder ");
499 2 }
500 1 VideoEnable();
501 1 Sleep(10);
502 1 if(TestIIC_HW(SAA7114) == 0)
503 1 DeviceFlag &= ~BIT_0;
504 1 else
505 1 DeviceFlag |= BIT_0;
506 1 VideoDisable();
507 1 }
508
509 unsigned char TestIIC_HW(unsigned char device)
510 {
C51 COMPILER V7.20 IIC 09/14/2004 12:20:59 PAGE 21
511 1 unsigned char value;
512 1 /* start bit */
513 1 /* transmit device */
514 1 INTIIC1_FLG = 0xff;
515 1 IIC1_DATA = device + 1;
516 1 IIC1_CLK = 0x60 | IIC_BaudRate;
517 1 // IIC1_CON = 0x00;
518 1 Timer1 = 100;
519 1 while((INTIIC1_FLG & INTTX) == 0){
520 2 if(Timer1 == 0){
521 3 break;
522 3 }
523 2 }
524 1 INTIIC1_FLG = INTTX;
525 1 /* read data */
526 1 IIC1_CON = 0x02;
527 1 Timer1 = 100;
528 1 while((INTIIC1_FLG & INTRX) == 0){
529 2 if(Timer1 == 0)
530 2 break;
531 2 }
532 1 if(Timer1 == 0){
533 2 IIC1_CLK = 0xA0|IIC_BaudRate;
534 2 IIC1_CON = 0x00;
535 2 value = 0;
536 2 if((flag3 & BIT_2) != 0x00){
537 3 printf("not install\r\n");
538 3 }
539 2 }
540 1 else{
541 2 value = IIC1_DATA;
542 2 value |= BIT_1;
543 2 /* no ack */
544 2 /* stop bit */
545 2 // IIC1_CLK = 0xA0|IIC_BaudRate;
546 2 // IIC1_CON = 0x00;
547 2 WaitStop();
548 2 if((flag3 & BIT_2) != 0x00){
549 3 printf("install\r\n");
550 3 }
551 2 }
552 1 return(value);
553 1 }
554
555
C51 COMPILER V7.20 IIC 09/14/2004 12:20:59 PAGE 22
ASSEMBLY LISTING OF GENERATED OBJECT CODE
; FUNCTION Com006C (BEGIN)
0000 L?0109:
0000 L?0110:
0000 AE05 MOV R6,AR5
0002 900000 E MOV DPTR,#INTIIC1_FLG
0005 74FF MOV A,#0FFH
0007 F0 MOVX @DPTR,A
0008 EF MOV A,R7
0009 L?0111:
0009 900000 E MOV DPTR,#IIC1_DATA
000C L?0112:
000C F0 MOVX @DPTR,A
000D 900000 E MOV DPTR,#IIC_BaudRate
0010 E0 MOVX A,@DPTR
0011 4420 ORL A,#020H
0013 900000 E MOV DPTR,#IIC1_CLK
0016 F0 MOVX @DPTR,A
0017 22 RET
0018 L?0113:
0018 L?0114:
0018 900000 E MOV DPTR,#IIC_BaudRate
001B E0 MOVX A,@DPTR
001C 44A0 ORL A,#0A0H
001E 900000 E MOV DPTR,#IIC1_CLK
0021 F0 MOVX @DPTR,A
0022 22 RET
0023 L?0115:
0023 L?0116:
0023 04 INC A
0024 900000 E MOV DPTR,#IIC1_DATA
0027 F0 MOVX @DPTR,A
0028 900000 E MOV DPTR,#IIC_BaudRate
002B E0 MOVX A,@DPTR
002C 4460 ORL A,#060H
002E 900000 E MOV DPTR,#IIC1_CLK
0031 F0 MOVX @DPTR,A
0032 22 RET
0033 L?0117:
0033 AE05 MOV R6,AR5
0035 L?0118:
0035 74FF MOV A,#0FFH
0037 L?0119:
0037 900000 E MOV DPTR,#INTIIC1_FLG
003A F0 MOVX @DPTR,A
003B 900000 E MOV DPTR,#IIC1_DATA
003E 22 RET
003F L?0120:
003F L?0121:
003F 7800 E MOV R0,#LOW Timer1
0041 7600 MOV @R0,#00H
0043 08 INC R0
0044 7664 MOV @R0,#064H
0046 22 RET
0047 L?0123:
0047 L?0124:
0047 E4 CLR A
0048 900000 E MOV DPTR,#IIC1_CON
004B F0 MOVX @DPTR,A
004C AF06 MOV R7,AR6
C51 COMPILER V7.20 IIC 09/14/2004 12:20:59 PAGE 23
004E 22 RET
004F L?0125:
004F E500 R MOV A,addr+01H
0051 25E0 ADD A,ACC
0053 FF MOV R7,A
0054 E500 R MOV A,addr
0056 33 RLC A
0057 FE MOV R6,A
0058 EF MOV A,R7
0059 22 RET
005A L?0126:
005A 900000 E MOV DPTR,#DDC_REG
005D 7480 MOV A,#080H
005F F0 MOVX @DPTR,A
0060 E500 R MOV A,i
0062 FD MOV R5,A
0063 22 RET
0064 L?0127:
0064 L?0128:
0064 900000 E MOV DPTR,#INTIIC1_FLG
0067 7408 MOV A,#08H
0069 F0 MOVX @DPTR,A
006A 22 RET
; FUNCTION Com006C (END)
; FUNCTION _Read24C16 (BEGIN)
; SOURCE LINE # 13
;---- Variable 'addr16' assigned to Register 'R6/R7' ----
; SOURCE LINE # 14
; SOURCE LINE # 17
0000 7C00 MOV R4,#00H
0002 AD07 MOV R5,AR7
;---- Variable 'addr' assigned to Register 'R4/R5' ----⌨️ 快捷键说明
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