📄 f63reg.lst
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C51 COMPILER V7.20 F63REG 09/14/2004 12:20:58 PAGE 1
C51 COMPILER V7.20, COMPILATION OF MODULE F63REG
OBJECT MODULE PLACED IN .\BIN\F63REG.obj
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE SRC\F63REG.C OPTIMIZE(9,SPEED) BROWSE DEBUG OBJECTEXTEND CODE LISTINCLUDE S
-YMBOLS PRINT(.\LST\F63REG.lst) PREPRINT(.\LST\F63REG.i) OBJECT(.\BIN\F63REG.obj)
line level source
1 #include "F63REG.H"
1 =1 #ifndef _F63REG_H
2 =1 #define _F63REG_H
3 =1 //----------------------------------------------------------
4 =1 extern xdata unsigned char PortA; // (R/W) : $FF
5 =1 extern xdata unsigned char PortB; // (R/W) : $FF
6 =1 extern xdata unsigned char PortC; // (R/W) : $FF
7 =1 extern xdata unsigned char PortD; // (R/W) : $FF
8 =1 //--------------[ Watch-Dog Timer ]-------------------------
9 =1 extern xdata unsigned char CLRWDT; // (-W-) : $55
10 =1 //--------------[ A/D Converter ]---------------------------
11 =1 extern xdata unsigned char ADC_CON; // (-W-) : $00
12 =1 #define STRT_ADC 0x80 // Start A to D Convert
13 =1 #define EN_ADC 0x10 // Enable ADC
14 =1 #define EN_ADC3 0x08 // Enable ADC3
15 =1 #define EN_ADC2 0x04 // Enable ADC2
16 =1 #define EN_ADC1 0x02 // Enable ADC1
17 =1 #define EN_ADC0 0x01 // Enable ADC0
18 =1 extern xdata unsigned char ADC_REG[4]; // (-R-) : ADC0 Value
19 =1 #define CMP_ADC 0x80 // (-R-): Complete ADC
20 =1 //--------------[ PWM D/A Converters ]----------------------
21 =1 extern xdata unsigned char ENPWM_LB; // (-W-) : Enable PWM07-PWM00
22 =1 extern xdata unsigned char ENPWM_HB; // (-W-) : Enable PWM15-PWM08
23 =1 extern xdata unsigned char PWM_REG[16];
24 =1 //--------------[ DDC Port ]--------------------------------
25 =1 extern xdata unsigned char DDC_CTRL;
26 =1 #define EN_DDC 0x80
27 =1 #define WPT_DDC 0x40
28 =1 #define LEN_EDID 0x20
29 =1 #define MODE_DDC 0x10
30 =1 #define EN_BACK 0x08
31 =1 #define INVT_VCLK 0x04
32 =1 #define CLR_PTR 0x02
33 =1 #define CLR_UPD 0x01
34 =1 extern xdata unsigned char DDC_REG;
35 =1 #define WR_SUCC 0x80
36 =1 #define OVF_DDC 0x04
37 =1 #define IS_CLRD 0x02
38 =1 #define UPD_DDC 0x01
39 =1 extern xdata unsigned char DDC_ADDR;
40 =1 #define VALID_B31 0xe0
41 =1 #define ADDRB_B31 0x0e
42 =1 //--------------[ Signal Master I2C-Bus Port0 (on DDC Port) ]
43 =1 extern xdata unsigned char INTIIC0_FLG;
44 =1 #define INTA 0x10
45 =1 #define INTTX 0x08
46 =1 #define INTRX 0x04
47 =1 #define INTNAK 0x02
48 =1 #define INTSTOP 0x01
49 =1 #define bINTA 4
50 =1 #define bINTTX 3
51 =1 #define bINTRX 2
52 =1 #define bINTNAK 1
53 =1 #define bINTSTOP 0
C51 COMPILER V7.20 F63REG 09/14/2004 12:20:58 PAGE 2
54 =1 extern xdata unsigned char INTIIC0_EN;
55 =1 #define INTA_EN 0x10
56 =1 #define INTTX_EN 0x08
57 =1 #define INTRX_EN 0x04
58 =1 #define INTNAK_EN 0x02
59 =1 #define INTSTOP_EN 0x01
60 =1 extern xdata unsigned char IIC0_ADDR;
61 =1 #define IIC_EN 0x01
62 =1 extern xdata unsigned char IIC0_DATA;
63 =1 extern xdata unsigned char IIC0_CON;
64 =1 #define SRW 0x20
65 =1 #define START 0x10
66 =1 #define STOP 0x08
67 =1 #define TXACK 0x02
68 =1 extern xdata unsigned char IIC0_CLK;
69 =1 #define MODE 0x80
70 =1 #define MRW 0x40
71 =1 #define RSTART 0x20
72 =1 #define IIC_RB 0x07
73 =1 //--------------[ Signal Master I2C-Bus Port1 (Intra Bus) ]
74 =1 extern xdata unsigned char INTIIC1_FLG;
75 =1 extern xdata unsigned char INTIIC1_EN;
76 =1 extern xdata unsigned char IIC1_ADDR;
77 =1 extern xdata unsigned char IIC1_DATA;
78 =1 extern xdata unsigned char IIC1_CON;
79 =1 extern xdata unsigned char IIC1_CLK;
80 =1 //--------------[ Interrupt Sources ]-----------------------
81 =1 extern xdata unsigned char INT_SRC;
82 =1 #define INTUSB_IRQ 0x40
83 =1 #define INTIIC0_IRQ 0x20
84 =1 #define INTEXT_IRQ 0x10
85 =1 #define INTIIC1_IRQ 0x02
86 =1 #define INTHV_IRQ 0x01
87 =1
88 =1 #define bINTSUB_IRQ 6
89 =1 #define bINTIIC0_IRQ 5
90 =1 #define bINTEXT_IRQ 4
91 =1 #define bINTIIC1_IRQ 1
92 =1 #define bINTHV_IRQ 0
93 =1 //--------------[ External Interrupt ]----------------------
94 =1 extern xdata unsigned char INTEXT_FLG;
95 =1 extern xdata unsigned char INTEXT_EN;
96 =1 #define INTE1 0x02
97 =1 #define INTE0 0x01
98 =1 #define INTE1_EDG 0x20
99 =1 #define INTE0_EDG 0x10
100 =1 //--------------[ SyncProcessor ]---------------------------
101 =1 extern xdata unsigned char INTHV_FLG;
102 =1 extern xdata unsigned char INTHV_EN;
103 =1 #define INT_H 0x80
104 =1 #define INT_V 0x40
105 =1 #define INT_HP 0x04
106 =1 #define INT_VP 0x02
107 =1 #define INT_FM 0x01 // 1: Enable Fast Mute
108 =1 extern xdata unsigned char SYNC_REG;
109 =1 #define EN_FRUN 0x80 // 1: Enable Free-Run Function
110 =1 #define AUTO_FLT 0x40 // 1: Enable Auto Filter Function
111 =1 #define EN_SOG 0x20 // 1: Enable SOG Function
112 =1 #define EN_CLMP 0x10 // 1: Enable Clamp Function
113 =1 #define EN_PAT 0x08 // 1: Enable Pattern Function
114 =1 #define EN_HALF 0x04 // 1: Enable HALF Function
115 =1 #define HALF_SEL 0x02 // 1: HALF_OUT = HALF_IN/2
C51 COMPILER V7.20 F63REG 09/14/2004 12:20:58 PAGE 3
116 =1 #define HALF_POL 0x01
117 =1 extern xdata unsigned char HVO_REG;
118 =1 #define EN_HOUT 0x80 // 1: Enable HSYNCO Output Pin
119 =1 #define EN_VOUT 0x40 // 1: Enable VSYNCO Output Pin
120 =1 #define EN_HRUN 0x20 // 1: Enable Free-Run Horizontal output control
121 =1 #define EN_VRUN 0x10 // 1: Enable Free-Run Vertical output control
122 =1 #define EN_INS 0x08 // 1: Enable Insert pulse control
123 =1 #define SYNCO_SEL 0x04 // 1: Sync outputs from the internal free running gererator
124 =1 #define HO_POL 0x02
125 =1 #define VO_POL 0x01
126 =1 extern xdata unsigned char HVI_REG;
127 =1 extern xdata unsigned char HPW_REG;
128 =1 extern xdata unsigned char HFLT_REG;
129 =1 extern xdata unsigned char CLMP_REG;
130 =1
131 =1 extern xdata unsigned char HVCNT_CTRL;
132 =1 extern xdata unsigned char HCNT_LB;
133 =1 extern xdata unsigned char HCNT_HB;
134 =1 extern xdata unsigned char VCNT_LB;
135 =1 extern xdata unsigned char VCNT_HB;
136 =1 extern xdata unsigned char DCNT_LB;
137 =1 extern xdata unsigned char DCNT_HB;
138 =1 extern xdata unsigned char LCNT_LB;
139 =1 extern xdata unsigned char LCNT_HB;
140 =1 extern xdata unsigned char MUTE_CTRL;
141 =1 //--------------[ Flash Memory ]----------------------------
142 =1 extern xdata unsigned char ISP_REG;
143 =1 #define ISP_FLG 0x02
144 =1 #define ISP_CH 0x01
145 =1 extern xdata unsigned char FLASH_BUF;
146 =1 //--------------[ GPIO Directly Control ]-------------------
147 =1 extern xdata unsigned char RDPA_REG;
148 =1 extern xdata unsigned char RDPB_REG;
149 =1 extern xdata unsigned char RDPC_REG;
150 =1 extern xdata unsigned char RDPD_REG;
151 =1 //--------------[ Stereo 3D Control ]-----------------------
152 =1 extern xdata unsigned char S3D_REG;
153 =1 #define EN_S3D 0x80
154 =1 #define EN_LNKO 0x40
155 =1 #define EN_IRO 0x20
156 =1 #define EN_SSYNCO 0x10
157 =1 #define SS_NOT 0x02
158 =1 #define V3D_SEL 0x01
159 =1 //--------------[ USB Port ]--------------------------------
160 =1 extern xdata unsigned char IUSB2_FLG; // (R/W) : $00
161 =1 #define R0_STL_FLG 0x80
162 =1 #define T0_STL_FLG 0x40
163 =1 #define RESMI 0x20
164 =1 #define URST 0x10
165 =1 #define NAK2 0x08
166 =1 #define NAK11 0x04
167 =1 #define NAKR0 0x02
168 =1 #define NAKT0 0x01
169 =1 extern xdata unsigned char IUSB2_EN; // (R/W) : $00
170 =1 #define R0_STL_EN 0x80
171 =1 #define T0_STL_EN 0x40
172 =1 #define RESMI_EN 0x20
173 =1 // #define URST 0x10
174 =1 #define NAK2_EN 0x08
175 =1 #define NAK11_EN 0x04
176 =1 #define NAKR0_EN 0x02
177 =1 #define NAKT0_EN 0x01
C51 COMPILER V7.20 F63REG 09/14/2004 12:20:58 PAGE 4
178 =1 extern xdata unsigned char IUSB1_FLG; // (R/W) : $00
179 =1 #define SUSP 0x80
180 =1 #define STUP 0x40
181 =1 #define OWSTUP 0x20
182 =1 // #define RST 0x10
183 =1 #define IN2 0x08
184 =1 #define IN1 0x04
185 =1 #define OT0 0x02
186 =1 #define IN0 0x01
187 =1 extern xdata unsigned char IUSB1_EN; // (R/W) : $00
188 =1 #define SUSP_EN 0x80
189 =1 #define STUP_EN 0x40
190 =1 #define OWSTUP_EN 0x20
191 =1 // #define RST_ 0x10
192 =1 #define IN2_EN_EN 0x08
193 =1 #define IN1_EN_EN 0x04
194 =1 #define OT0_EN_EN 0x02
195 =1 #define IN0_EN_EN 0x01
196 =1 extern xdata unsigned char MODE_FG; // (R/W) : $02
197 =1 extern xdata unsigned char USB_ADR; // (R/W) : $00
198 =1 extern xdata unsigned char USB_CON; // (R/W) : $00
199 =1 extern xdata unsigned char TXDAT0; // (-W-) : $XX (T0B7-T0B0)
200 =1 extern xdata unsigned char TXCNT0; // (-W-) : $XX (C0B3-C0B0)
201 =1 extern xdata unsigned char TXFLG0; // (R/W) : $00
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