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📄 startup_gcc.c

📁 eaayarm101自制小车源代码 周立功公司原创
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//*****************************************************************************//// startup_gcc.c - Boot code for Stellaris.//// Copyright (c) 2005-2007 Luminary Micro, Inc.  All rights reserved.//// Software License Agreement//// Luminary Micro, Inc. (LMI) is supplying this software for use solely and// exclusively on LMI's microcontroller products.//// The software is owned by LMI and/or its suppliers, and is protected under// applicable copyright laws.  All rights are reserved.  Any use in violation// of the foregoing restrictions may subject the user to criminal sanctions// under applicable laws, as well as to civil liability for the breach of the// terms and conditions of this license.//// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.//// This is part of revision 199 of an01245.////*****************************************************************************#include "car.h"#include "lights.h"#include "sensors.h"#include "switches.h"//*****************************************************************************//// Forward declaration of the default fault handlers.////*****************************************************************************void ResetISR(void);//*****************************************************************************//// The entry point for the application.////*****************************************************************************extern int main(void);//*****************************************************************************//// Reserve space for the system stack.////*****************************************************************************#ifndef STACK_SIZE#define STACK_SIZE              64#endifstatic unsigned long pulStack[STACK_SIZE];//*****************************************************************************//// The minimal vector table for a Cortex M3.  Note that the proper constructs// must be placed on this to ensure that it ends up at physical address// 0x0000.0000.////*****************************************************************************__attribute__ ((section(".isr_vector")))void (* const g_pfnVectors[])(void) ={    (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)),                                            // The initial stack pointer    ResetISR,                               // The reset handler    IntDefaultHandler,                      // The NMI handler    IntDefaultHandler,                      // The hard fault handler    IntDefaultHandler,                      // The MPU fault handler    IntDefaultHandler,                      // The bus fault handler    IntDefaultHandler,                      // The usage fault handler    0,                                      // Reserved    0,                                      // Reserved    0,                                      // Reserved    0,                                      // Reserved    IntDefaultHandler,                      // SVCall handler    IntDefaultHandler,                      // Debug monitor handler    0,                                      // Reserved    IntDefaultHandler,                      // The PendSV handler    SysTickHandler,                         // The SysTick handler    IntDefaultHandler,                      // GPIO Port A    IntDefaultHandler,                      // GPIO Port B    IntDefaultHandler,                      // GPIO Port C    IntDefaultHandler,                      // GPIO Port D    IntDefaultHandler,                      // GPIO Port E    IntDefaultHandler,                      // UART0 Rx and Tx    IntDefaultHandler,                      // UART1 Rx and Tx    IntDefaultHandler,                      // SSI Rx and Tx    IntDefaultHandler,                      // I2C Master and Slave    IntDefaultHandler,                      // PWM Fault    IntDefaultHandler,                      // PWM Generator 0    IntDefaultHandler,                      // PWM Generator 1    IntDefaultHandler,                      // PWM Generator 2    IntDefaultHandler,                      // Quadrature Encoder    ADC0IntHandler,                         // ADC Sequence 0    IntDefaultHandler,                      // ADC Sequence 1    IntDefaultHandler,                      // ADC Sequence 2    IntDefaultHandler,                      // ADC Sequence 3    IntDefaultHandler,                      // Watchdog timer    IntDefaultHandler,                      // Timer 0 subtimer A    IntDefaultHandler,                      // Timer 0 subtimer B    IntDefaultHandler,                      // Timer 1 subtimer A    IntDefaultHandler,                      // Timer 1 subtimer B    IntDefaultHandler,                      // Timer 2 subtimer A    IntDefaultHandler,                      // Timer 2 subtimer B    CompIntHandler,                         // Analog Comparator 0    IntDefaultHandler,                      // Analog Comparator 1    IntDefaultHandler,                      // Analog Comparator 2    IntDefaultHandler,                      // System Control (PLL, OSC, BO)    IntDefaultHandler                       // FLASH Control};//*****************************************************************************//// The following are constructs created by the linker, indicating where the// the "data" and "bss" segments reside in memory.  The initializers for the// for the "data" segment resides immediately following the "text" segment.////*****************************************************************************extern unsigned long _etext;extern unsigned long _data;extern unsigned long _edata;extern unsigned long _bss;extern unsigned long _ebss;//*****************************************************************************//// This is the code that gets called when the processor first starts execution// following a reset event.  Only the absolutely necessary set is performed,// after which the application supplied main() routine is called.  Any fancy// actions (such as making decisions based on the reset cause register, and// resetting the bits in that register) are left solely in the hands of the// application.////*****************************************************************************voidResetISR(void){    unsigned long *pulSrc, *pulDest;    //    // Copy the data segment initializers from flash to SRAM.    //    pulSrc = &_etext;    for(pulDest = &_data; pulDest < &_edata; )    {        *pulDest++ = *pulSrc++;    }    //    // Zero fill the bss segment.    //    for(pulDest = &_bss; pulDest < &_ebss; )    {        *pulDest++ = 0;    }    //    // Call the application's entry point.    //    main();}

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