hw.c

uCOS-II 2.8和uC-TCP/IP在ATMEL AT91SAM9261上移植

/*
*********************************************************************************************************
*                                            Atmel AT91SAM9261
*                                         Board Support Package
*
*                              (c) Copyright 2004, Micrium, Inc., Weston, FL
*                                          All Rights Reserved
*
*
* File   : hw.c
* By     : Eric Shufro
*
* Notes  : 1) This file contains additional BSP and peripheral initialization code
*********************************************************************************************************
*/

#include <includes.h>

/*
*********************************************************************************************************
*                                               CONSTANTS
*********************************************************************************************************
*/

#define  SPI0_MISO           (INT32U)(1 <<  0)                          /* Pin PA.0                                                 */
#define  SPI0_MOSI           (INT32U)(1 <<  1)                          /* Pin PA.1                                                 */
#define  SPI0_SCK            (INT32U)(1 <<  2)                          /* Pin PA.2                                                 */
#define  SPI0_NPSC0          (INT32U)(1 <<  3)                          /* Pin PA.3 for NPSC0 dataflash chip / socket               */ 

/*
*********************************************************************************************************
*                                               GLOBLAS
*********************************************************************************************************
*/

/*
*********************************************************************************************************
*                                               FUNCTION PROTOTYPES
*********************************************************************************************************
*/

static  void  matrix_init(void);

/*
*********************************************************************************************************
*                                          hw_init()
*
* Description : This function performs additional processor initialization.
*********************************************************************************************************
*/

void  hw_init (void)
{
    matrix_init();
}

/*
*********************************************************************************************************
*                                          matrix_init()
*
* Description : This function ininitializes the processor bus matrix
*********************************************************************************************************
*/

static  void  matrix_init (void) 
{
                                                                        /* -------------- Initialize the Matrix ------------------- */
    AT91C_BASE_MATRIX->MATRIX_SCFG0    |=   AT91C_MATRIX_DEFMSTR_TYPE_FIXED_DEFMSTR |                          
                                            AT91C_MATRIX_FIXED_DEFMSTR0_ARM926D;

    AT91C_BASE_MATRIX->MATRIX_SCFG3    |=   AT91C_MATRIX_DEFMSTR_TYPE_FIXED_DEFMSTR | 
                                            AT91C_MATRIX_FIXED_DEFMSTR0_ARM926D;    
}

/*
*********************************************************************************************************
*                                          dataflash_init()
*
* Description : This function ininitializes the onboard dataflash
*********************************************************************************************************
*/

void  df_hw_init (void)
{
    AT91C_BASE_PIOA->PIO_ASR            =   SPI0_MISO    |              /* Assign the following pins to Periph A                    */
                                            SPI0_MOSI    |        
                                            SPI0_SCK     | 
                                            SPI0_NPSC0;      

    AT91C_BASE_PIOA->PIO_PDR            =   SPI0_MISO    |              /* Enable peripheral control for pins:                      */
                                            SPI0_MOSI    |           
                                            SPI0_SCK     | 
                                            SPI0_NPSC0;            
}

/*
*********************************************************************************************************
*                                          nandflash_hw_init()
*
* Description : This function ininitializes the onboard dataflash
* Notes       : 1) This function assumes MCK of ~100MHz.
*********************************************************************************************************
*/

void  nandflash_hw_init (void)
{
                                                                            /* Setup Smart Media / Onboard NAND device                  */
                                                                            /* Timmings are specific to the Micron MT29F2G16AAB (256MB) */
    AT91C_BASE_PMC->PMC_PCER            =  (1 << AT91C_ID_PIOC);            /* Enable Clocks for NAND Flash (Uses PIOC)                 */
    AT91C_BASE_MATRIX->MATRIX_EBICSA   |=   AT91C_MATRIX_CS3A_SM;           /* Eenable the address range of CS3 in HMATRIX              */

                                                                            /* Configure SMC CS3                                        */
    AT91C_BASE_SMC->SMC_SETUP3          =  (0 <<  0)                |       /* NWE setup len = 128 * NWE_SETUP[5]    + NWE_SETUP[4:0]   */
                                           (0 <<  8)                |       /* NCS setup len = 128 * NCS_WR_SETUP[5] + NCS_WR_SETUP[4:0]*/
                                           (0 << 16)                |       /* NRD setup len = 128 * NRD_SETUP[5]    + NRD_SETUP[4:0]   */
                                           (0 << 24);                       /* NCS setup len = 128 * NCS_RD_SETUP[5] + NCS_RD_SETUP[4:0]*/

    AT91C_BASE_SMC->SMC_PULSE3          =  (4 << 0)                 |       /* NWE pulse len = 256 * NWE_PULSE[6]    + NWE_PULSE[5:0]   */
                                           (6 << 8)                 |       /* NCS pulse len = 256 * NCS_WR_PULSE[6] + NCS_WR_PULSE[5:0]*/
                                           (3 << 16)                |       /* NRD pulse len = 256 * NRD_PULSE[6]    + NRD_PULSE[5:0]   */
                                           (5 << 24);                       /* NCS pulse len = 256 * NCS_RD_PULSE[6] + NCS_RD_PULSE[5:0]*/

    AT91C_BASE_SMC->SMC_CYCLE3          =  (6 << 0)                 |       /* Wr cycle len  = NWE_CYCLE[8:7] * 256 + NWE_CYCLE[6:0]    */
                                           (5 << 16);                       /* Rd cycle len  = NRD_CYCLE[8:7] * 256 + NRD_CYCLE[6:0]    */

    AT91C_BASE_SMC->SMC_CTRL3           =   AT91C_SMC_READMODE       |      /* Reads controlled by the NRD as opposed to NCS Signal     */
                                            AT91C_SMC_WRITEMODE      |      /* Writes controlled by the NWE as opposed to NCS Signal    */
                                            AT91C_SMC_NWAITM_NWAIT_DISABLE   | /* Extern al NWAIT signal disabled                       */
                                           (1 << 16);                       /* TDF Cycles (Data Float Time) = 1 Cycle                   */

    AT91C_BASE_PIOA->PIO_ODR            =   AT91C_PIO_PC15;                 /* Set PC15, the Read/Busy signal pin as an input pin       */
    AT91C_BASE_PIOA->PIO_PER            =   AT91C_PIO_PC15;                 /* Enable PIO control of PC15                               */
    AT91C_BASE_PIOA->PIO_PPUER          =   AT91C_PIO_PC15;                 /* Enable the Pull-Up resistor for PC15                     */

                                                                            /* Enable PC0 = NANDOE, PC1 = NANDWE, A21 = CLE, A22 = ALE  */
    AT91C_BASE_PIOA->PIO_PDR            =   AT91C_PC0_SMOE | AT91C_PC1_SMWE;/* Set PC0 and PC1 to peripheral mode                       */
    AT91C_BASE_PIOA->PIO_ASR            =   AT91C_PC0_SMOE | AT91C_PC1_SMWE;/* Select Peripheral A function, NANDOE and NANDWE          */

                                                                            /* Enable the NandFlash                                     */
    AT91C_BASE_PIOA->PIO_PER            =   AT91C_PIO_PC14;                 /* Enable PIO control of PC14                               */
    AT91C_BASE_PIOA->PIO_OER            =   AT91C_PIO_PC14;                 /* Set PC14 to output                                       */
}

/*
*********************************************************************************************************
*                                          nandflash_cfg_16bits_dbw_init()
*
* Description : This function configures the SMC for use with 16 bit nandflash
* Callers     : nandlash.c
*********************************************************************************************************
*/

void nandflash_cfg_16bits_dbw_init (void)
{
    AT91C_BASE_SMC->SMC_CTRL3          |=  AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS;        
}