net_bsp.c

uCOS-II 2.8和uC-TCP/IP在ATMEL AT91SAM9261上移植

/*
*********************************************************************************************************
*                                              uC/TCP-IP
*                                      The Embedded TCP/IP Stack
*
*                            (c) Copyright 2004; Micrium, Inc.; Weston, FL
*
*                   All rights reserved.  Protected by international copyright laws.
*                   Knowledge of the source code may not be used to write a similar
*                   product.  This file may only be used in accordance with a license
*                   and should not be redistributed in any way.
*********************************************************************************************************
*
*                                BOARD SUPPORT PACKAGE (BSP) FUNCTIONS
*
*                                          AT91SAM9261
*
* Filename   : net_bsp.c
* Programmer : Brian Nagel
*            : Eric Shufro
* Version    : 1.0
* Date       : 01/02/2007
*********************************************************************************************************
*/

/*
*********************************************************************************************************
*                                            INCLUDE FILES
*********************************************************************************************************
*/

#include <includes.h>

/*
*********************************************************************************************************
*                                            LOCAL DEFINES
*********************************************************************************************************
*/

/*
*********************************************************************************************************
*                                            LOCAL DEFINES
*********************************************************************************************************
*/

#define AT91C_DM9000_NWE_SETUP	        (1  << 0)		                /* Note: these timings are based on MCK, which is assumed   */
#define AT91C_DM9000_NWE_PULSE 	        (3  << 0)		                /* to be 96MHz                                              */
#define AT91C_DM9000_NWE_CYCLE 	        (4  << 0)		

#define AT91C_DM9000_NRD_SETUP	        (1  << 16)		    
#define AT91C_DM9000_NRD_PULSE	        (3  << 16)		
#define AT91C_DM9000_NRD_CYCLE	        (4  << 16)		
    
#define AT91C_DM9000_NCS_WR_SETUP	    (0  << 8)		
#define AT91C_DM9000_NCS_WR_PULSE	    (4  << 8)		
    
#define AT91C_DM9000_NCS_RD_SETUP	    (0  << 24)		
#define AT91C_DM9000_NCS_RD_PULSE	    (4  << 24)		  
  
#define AT91C_DM9000_TDF	            (1  << 16)		

/*
*********************************************************************************************************
*                                            PROTOTYPES
*********************************************************************************************************
*/

extern  void  NetNIC_ISR_Handler(void);

/*
*********************************************************************************************************
*                                            GLOBALS
*********************************************************************************************************
*/

static  OS_EVENT  *DM9000_LockSem;                                      /* Semaphore uses to provide exclusive access to the DM9000 */

/*
*********************************************************************************************************
*                            Initialize the NIC hardware
*
* Description : This function is called by NetBSP_NIC_HW_Init() to configure the IO pins necessary
*             : to communicate between the AT91SAM9261 and the DM9000E.
*
* Argument(s) : none.
*
* Returns     : none.
*
* Notes(s)    : (1) I/O configuration for the IRQ input occurs in NetBSP_IntInit()
*********************************************************************************************************
*/

void  NetBSP_NIC_HW_Init (void)
{
    AT91C_BASE_SMC->SMC_SETUP2 = (AT91C_DM9000_NWE_SETUP              | /* Configure the SMC for use with the Davicom DM9000E       */ 
                                  AT91C_DM9000_NCS_WR_SETUP           | /* Consule the DM9000E datasheet for timing diagrams and    */
				                  AT91C_DM9000_NRD_SETUP              | /* see the AT91SAM9261 datasheet section 21.9.1 and below   */
                                  AT91C_DM9000_NCS_RD_SETUP);           /* for additional information on how to generate these      */
                                                                        /* timings should MCK run at a frequency other than 96MHz   */
    AT91C_BASE_SMC->SMC_PULSE2 = (AT91C_DM9000_NWE_PULSE              | 
                                  AT91C_DM9000_NCS_WR_PULSE           |   
                                  AT91C_DM9000_NRD_PULSE              |   
                                  AT91C_DM9000_NCS_RD_PULSE);
  
    AT91C_BASE_SMC->SMC_CYCLE2 = (AT91C_DM9000_NWE_CYCLE              | 
                                  AT91C_DM9000_NRD_CYCLE);
    
    AT91C_BASE_SMC->SMC_CTRL2  = (AT91C_SMC_READMODE                  | 
                                  AT91C_SMC_WRITEMODE                 | 
                                  AT91C_SMC_NWAITM_NWAIT_DISABLE      |
			                      AT91C_SMC_BAT_BYTE_WRITE            | 
                                  AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS    | 
                                  AT91C_DM9000_TDF);
  
    AT91C_BASE_PMC->PMC_PCER   = (1 << AT91C_ID_SYS);                   /* Ensure clocks for the SMC are enabled                    */
    AT91C_BASE_PMC->PMC_PCER   = (1 << AT91C_ID_PIOC);                  /* Enable PIOC clock                                        */
    AT91C_BASE_SYS->PIOC_PER   = (1 << 10);                             /* Configure the reset signal (PC10) as a GPIO pin          */
    AT91C_BASE_SYS->PIOC_OER   = (1 << 10);                             /* Configure the reset signal as an output pin              */
    AT91C_BASE_SYS->PIOC_CODR  = (1 << 10);                             /* Set the pin to a logic low level (not reset)             */
}

/*
*********************************************************************************************************
*                            Initialize NIC interrupts in the AIC
*
* Description : This function configures the AIC for NIC interrupts.
*
* Arguments   : none.
*
* Returns     : none.
*
* Caller(s)   : DM9000EP_Init()
*
* Notes       : 1) NetNIC_ISR_Handler() would potential be called for any PIOC pin that generates
*                  an interrupt. If other PIOC pin interrupts are required, then a dispatch PIOC 
*                  interrupt handler will need to be created.
*********************************************************************************************************
*/

void  NetBSP_IntInit (void)
{
    volatile CPU_INT32U  dummy;
    
    
    AT91C_BASE_AIC->AIC_IDCR    = (1 << AT91C_ID_PIOC);                 /* Temporarily disable PIOC interrupts on the AIC level     */

    AT91C_BASE_PIOC->PIO_PER    =  AT91C_PIO_PC11;                      /* Enable GPIO control of pin PC11                          */
    AT91C_BASE_PIOC->PIO_IFER   =  AT91C_PIO_PC11;                      /* Enable input glitch filter on PC11                       */
    AT91C_BASE_PIOC->PIO_IER    =  AT91C_PIO_PC11;                      /* Enable PIOC interrupts                                   */
    dummy                       =  AT91C_BASE_PIOC->PIO_ISR;            /* Clear the status register flags by reading PIOC ISR      */
    
                                                                        /* Setup AIC interrupt controller                           */
    AT91C_BASE_AIC->AIC_SVR[AT91C_ID_PIOC] = (CPU_INT32U)NetNIC_ISR_Handler;
    AT91C_BASE_AIC->AIC_SMR[AT91C_ID_PIOC] =  AT91C_AIC_SRCTYPE_EXT_HIGH_LEVEL | AT91C_AIC_PRIOR_LOWEST;
   
    AT91C_BASE_AIC->AIC_ICCR    = (1 << AT91C_ID_PIOC);
    AT91C_BASE_AIC->AIC_IECR    = (1 << AT91C_ID_PIOC);                 /* Re-enable PIOC interrupts on the AIC level               */
}

/*
*********************************************************************************************************
*                              Clear NIC interrupts in the AIC
*
* Description : This function clears NIC interrupts.
*
* Arguments   : none.
*
* Returns     : none.
*
* Caller(s)   : NetNIC_ISR_Handler()
*********************************************************************************************************
*/

void  NetBSP_IntClr (void)
{
    volatile CPU_INT32U  dummy;

    
    dummy                       =  AT91C_BASE_PIOC->PIO_ISR;            /* Clear the status register flags by reading PIOC ISR      */    
    AT91C_BASE_AIC->AIC_ICCR    = (1 << AT91C_ID_PIOC);                 /* Clear the AIC PIOC interrupt source                      */    
}

/*
*********************************************************************************************************
*                                   WRITE 8 BITS TO A NIC REGISTER
*
* Description : This function is called from functions in net_nic.c to write to a NIC register.
*
* Argument(s) : reg     is the register offset of the register to which data will be written.
*               data    is the data to write to the register.
*
* Returns     : none.
*********************************************************************************************************
*/

#if NET_NIC_CFG_RD_WR_SEL == NET_NIC_RD_WR_SEL_FNCT
void  NetNIC_WrReg_8 (CPU_INT08U reg, CPU_INT08U data)
{
    SMC_INDX16 = (CPU_INT16U)reg;
    SMC_DATA16 = (CPU_INT16U)data;
}
#endif

/*
*********************************************************************************************************
*                               READ 8 BITS FROM A NIC REGISTER
*
* Description : This function is called from functions in net_nic.c to read from the NIC
*
* Argument(s) : reg     is the register offset of the register from which data will be read.
*
* Returns     : The data from the register.
*********************************************************************************************************
*/

CPU_INT08U  NetNIC_RdReg_8 (CPU_INT08U reg)
{
    CPU_INT08U  rd_value;

    
    SMC_INDX16 = (CPU_INT16U)reg;
    rd_value   = (CPU_INT08U)SMC_DATA16;

    return (rd_value);
}

/*
*********************************************************************************************************
*                                   WRITE A REGISTER INDEX TO THE DM900A
*
* Description : This function is called from functions in net_nic.c to write to a NIC register.
*
* Argument(s) : ix     is the index which will be written to the data bus.
*
* Returns     : none.
*
* Note(s)     : (1) This function is used with NetNIC_RdData_16() and NetNIC_WrData_16() or
*                   NetNIC_RdData_8() and NetNIC_WrData_8() to perform multiple read/write accesses
*                   after a single command (i.e., index specification).  Basically, a call to this
*                   function (specifying the register which will be accessed) is followed by multiple
*                   calls to NetNIC_RdData_16() or NetNIC_WrData_16() (reading/writing data to the NIC).
*********************************************************************************************************
*/

#if NET_NIC_CFG_RD_WR_SEL == NET_NIC_RD_WR_SEL_FNCT
void  NetNIC_WrIx_8 (CPU_INT08U ix)
{
    SMC_INDX16 = (CPU_INT16U)ix;
}
#endif

/*
*********************************************************************************************************
*                                 READ DATA FROM THE DM9000E
*
* Description : This function is called from functions in net_nic.c to read from the DM9000E data bus.
*
* Argument(s) : none.
*
* Returns     : The data from the register.
*
* Note(s)     : see Note (1) for NetNIC_WrCmd_8
*********************************************************************************************************
*/

#if NET_NIC_CFG_RD_WR_SEL == NET_NIC_RD_WR_SEL_FNCT
CPU_INT16U  NetNIC_RdData_16 (void)
{
    CPU_INT16U  rd_value;


    rd_value   = SMC_DATA16;

    return (rd_value);
}
#endif

/*
*********************************************************************************************************
*                                 WRITE DATA TO THE DM9000E
*
* Description : This function is called from functions in net_nic.c to write to the DM9000E data bus.
*
* Argument(s) : data    is the data to write to the DM9000E.
*
* Returns     : none.
*
* Note(s)     : see Note (1) for NetNIC_WrCmd_8
*********************************************************************************************************
*/

#if NET_NIC_CFG_RD_WR_SEL == NET_NIC_RD_WR_SEL_FNCT
void  NetNIC_WrData_16 (CPU_INT16U data)
{
    SMC_DATA16 = data;
}
#endif

/*
*********************************************************************************************************
*                                 READ DATA FROM THE DM9000E
*
* Description : This function is called from functions in net_nic.c to read from the DM9000E data bus.
*
* Argument(s) : none.
*
* Returns     : The data from the register.
*
* Note(s)     : see Note (1) for NetNIC_WrCmd_8
*********************************************************************************************************
*/

#if NET_NIC_CFG_RD_WR_SEL == NET_NIC_RD_WR_SEL_FNCT
CPU_INT08U  NetNIC_RdData_8 (void)
{
    CPU_INT08U  rd_value;

    
    rd_value   = (CPU_INT08U)SMC_DATA16;

    return (rd_value);
}
#endif

/*
*********************************************************************************************************
*                                 WRITE DATA TO THE DM9000E
*
* Description : This function is called from functions in net_nic.c to read from the DM9000E data bus.
*
* Argument(s) : data    is the data to write to the DM9000E.
*
* Returns     : none.
*
* Note(s)     : see Note (1) for NetNIC_WrCmd_8
*********************************************************************************************************
*/

#if NET_NIC_CFG_RD_WR_SEL == NET_NIC_RD_WR_SEL_FNCT
void  NetNIC_WrData_8 (CPU_INT08U data)
{
    SMC_DATA16 = (CPU_INT16U)data;
}
#endif

/*
*********************************************************************************************************
*                                        NetBSP_OS_X_Init()