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uCOS-II 2.8和uC-TCP/IP在ATMEL AT91SAM9261上移植

********************************************************************
*
*       _Watchdog()
*
* Function description
*   Clear Watchdog
*********************************************************************
*/

Watchdog()
{                                                               //* Watchdog Disable
                                                                //  AT91C_BASE_WDTC->WDTC_WDMR= AT91C_WDTC_WDDIS;
   __writeMemory32(0x00008000,0xFFFFFD44,"Memory");
   __message "------------------------------- Watchdog Disable ----------------------------------------";
}

/*
********************************************************************
*
*       CheckRemap()
*
* Function description
*   Check the Remap.
********************************************************************
*/

CheckRemap()
{
    __mac_i =__readMemory32(0x00000030,"Memory");               //* Read the value at 0x0
    __mac_i =__mac_i+1;                                         //* Increment the value
    __writeMemory32(__mac_i,0x30,"Memory");                     //* Attempt to write the value back to 0x30
    __mac_pt =__readMemory32(0x00000030,"Memory");              //* Read 0x30

    if (__mac_i == __mac_pt) {                                  //* Check if write was successful
        __message "------------------------------- RAM is at 0x00  ----------------------------------------";
    } else {
        __message "------------------------------- ROM is at 0x00 -----------------------------------------";
        __writeMemory32(0x00000003,0xFFFFEE00,"Memory");
        __message "----------------------- Memory Map Toggled to RAM at 0x00 ------------------------------";
    }
}

/*
********************************************************************
*
*       CheckRemap()
*
* Function description
*   Initialize CPU registers and set the PC to 0x00
********************************************************************
*/

execUserSetup()
{
    ini();
    __message "-------------------------------Set PC ----------------------------------------";
    __writeMemory32(0x00000000,0xB4,"Register");
}

/*
********************************************************************
*
*       __AIC()
*
* Function description
*   Reset the Interrupt Controller.
********************************************************************
*/

AIC()
{
    __message "------------------------------- AIC 2 INIT ---------------------------------------------";

    __writeMemory32(0xffffffff,0xFFFFF124,"Memory");            // Mask All interrupt pAic->AIC_IDCR = 0xFFFFFFFF;
    __writeMemory32(0xffffffff,0xFFFFF128,"Memory");
    __writeMemory32(0xffffffff,0xFFFFFC14,"Memory");            // disable peripheral clock  Peripheral Clock Disable Register

    __readMemory32(0xFFFA0020,"Memory");                        // #define AT91C_TC0_SR    ((AT91_REG *) 	0xFFFA0020) // (TC0) Status Register
    __readMemory32(0xFFFA0060,"Memory");                        // #define AT91C_TC1_SR    ((AT91_REG *) 	0xFFFA0060) // (TC1) Status Register
    __readMemory32(0xFFFA00A0,"Memory");                        // #define AT91C_TC2_SR    ((AT91_REG *) 	0xFFFA00A0) // (TC2) Status Register

    for (__mac_i=0;__mac_i < 8; __mac_i++)
    {
      __mac_pt  =  __readMemory32(0xFFFFF130,"Memory");         // AT91C_BASE_AIC->AIC_EOICR
    }
}

/*
********************************************************************
*
*       ini() :
* Function description
* Write ARM9 core regsiter to Reset value
*********************************************************************
*/

ini()
{
__writeMemory32(0x0,0x00,"Register");
__writeMemory32(0x0,0x04,"Register");
__writeMemory32(0x0,0x08,"Register");
__writeMemory32(0x0,0x0C,"Register");
__writeMemory32(0x0,0x10,"Register");
__writeMemory32(0x0,0x14,"Register");
__writeMemory32(0x0,0x18,"Register");
__writeMemory32(0x0,0x1C,"Register");
__writeMemory32(0x0,0x20,"Register");
__writeMemory32(0x0,0x24,"Register");
__writeMemory32(0x0,0x28,"Register");
__writeMemory32(0x0,0x2C,"Register");
__writeMemory32(0x0,0x30,"Register");
__writeMemory32(0x0,0x34,"Register");
__writeMemory32(0x0,0x38,"Register");

__writeMemory32(0x0D3,0x98,"Register");                         // Set CPSR
}

RG()
{

__mac_i =__readMemory32(0x00,"Register");   __message "R00 0x",__mac_i:%X;
__mac_i =__readMemory32(0x04,"Register");   __message "R01 0x",__mac_i:%X;
__mac_i =__readMemory32(0x08,"Register");   __message "R02 0x",__mac_i:%X;
__mac_i =__readMemory32(0x0C,"Register");   __message "R03 0x",__mac_i:%X;
__mac_i =__readMemory32(0x10,"Register");   __message "R04 0x",__mac_i:%X;
__mac_i =__readMemory32(0x14,"Register");   __message "R05 0x",__mac_i:%X;
__mac_i =__readMemory32(0x18,"Register");   __message "R06 0x",__mac_i:%X;
__mac_i =__readMemory32(0x1C,"Register");   __message "R07 0x",__mac_i:%X;
__mac_i =__readMemory32(0x20,"Register");   __message "R08 0x",__mac_i:%X;
__mac_i =__readMemory32(0x24,"Register");   __message "R09 0x",__mac_i:%X;
__mac_i =__readMemory32(0x28,"Register");   __message "R10 0x",__mac_i:%X;
__mac_i =__readMemory32(0x2C,"Register");   __message "R11 0x",__mac_i:%X;
__mac_i =__readMemory32(0x30,"Register");   __message "R12 0x",__mac_i:%X;
__mac_i =__readMemory32(0x34,"Register");   __message "R13 0x",__mac_i:%X;
__mac_i =__readMemory32(0x38,"Register");   __message "R14 0x",__mac_i:%X;
__mac_i =__readMemory32(0x3C,"Register");   __message "R13 SVC 0x",__mac_i:%X;
__mac_i =__readMemory32(0x40,"Register");   __message "R14 SVC 0x",__mac_i:%X;
__mac_i =__readMemory32(0x44,"Register");   __message "R13 ABT 0x",__mac_i:%X;
__mac_i =__readMemory32(0x48,"Register");   __message "R14 ABT 0x",__mac_i:%X;
__mac_i =__readMemory32(0x4C,"Register");   __message "R13 UND 0x",__mac_i:%X;
__mac_i =__readMemory32(0x50,"Register");   __message "R14 UND 0x",__mac_i:%X;
__mac_i =__readMemory32(0x54,"Register");   __message "R13 IRQ 0x",__mac_i:%X;
__mac_i =__readMemory32(0x58,"Register");   __message "R14 IRQ 0x",__mac_i:%X;
__mac_i =__readMemory32(0x5C,"Register");   __message "R08 FIQ 0x",__mac_i:%X;
__mac_i =__readMemory32(0x60,"Register");   __message "R09 FIQ 0x",__mac_i:%X;
__mac_i =__readMemory32(0x64,"Register");   __message "R10 FIQ 0x",__mac_i:%X;
__mac_i =__readMemory32(0x68,"Register");   __message "R11 FIQ 0x",__mac_i:%X;
__mac_i =__readMemory32(0x6C,"Register");   __message "R12 FIQ 0x",__mac_i:%X;
__mac_i =__readMemory32(0x70,"Register");   __message "R13 FIQ 0x",__mac_i:%X;
__mac_i =__readMemory32(0x74,"Register");   __message "R14 FIQ0x",__mac_i:%X;
__mac_i =__readMemory32(0x98,"Register");   __message "CPSR     ",__mac_i:%X;
__mac_i =__readMemory32(0x94,"Register");   __message "SPSR     ",__mac_i:%X;
__mac_i =__readMemory32(0x9C,"Register");   __message "SPSR ABT ",__mac_i:%X;
__mac_i =__readMemory32(0xA0,"Register");   __message "SPSR ABT ",__mac_i:%X;
__mac_i =__readMemory32(0xA4,"Register");   __message "SPSR UND ",__mac_i:%X;
__mac_i =__readMemory32(0xA8,"Register");   __message "SPSR IRQ ",__mac_i:%X;
__mac_i =__readMemory32(0xAC,"Register");   __message "SPSR FIQ ",__mac_i:%X;

__mac_i =__readMemory32(0xB4,"Register");   __message "PC 0x",__mac_i:%X;

}