spd.h

MIPS下的boottloader yamon 的源代码

/************************************************************************
 *
 *  spd.h
 *
 *  Register definitions for Serial Presence detect
 *
 *
 * ######################################################################
 *
 * Copyright (c) 1999-2000 MIPS Technologies, Inc. All rights reserved. 
 * 
 * Unpublished rights reserved under the Copyright Laws of the United States of 
 * America. 
 * 
 * This document contains information that is proprietary to MIPS Technologies, 
 * Inc. ("MIPS Technologies"). Any copying, modifying or use of this information 
 * (in whole or in part) which is not expressly permitted in writing by MIPS 
 * Technologies or a contractually-authorized third party is strictly 
 * prohibited. At a minimum, this information is protected under unfair 
 * competition laws and the expression of the information contained herein is 
 * protected under federal copyright laws. Violations thereof may result in 
 * criminal penalties and fines. 
 * MIPS Technologies or any contractually-authorized third party reserves the 
 * right to change the information contained in this document to improve 
 * function, design or otherwise. MIPS Technologies does not assume any 
 * liability arising out of the application or use of this information. Any 
 * license under patent rights or any other intellectual property rights owned 
 * by MIPS Technologies or third parties shall be conveyed by MIPS Technologies 
 * or any contractually-authorized third party in a separate license agreement 
 * between the parties. 
 * The information contained in this document constitutes one or more of the 
 * following: commercial computer software, commercial computer software 
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 * any related documentation of any kind, including related technical data or 
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 * modification, disclosure, or transfer of this information, or any related 
 * documentation of any kind, is restricted in accordance with Federal 
 * Acquisition Regulation 12.212 for civilian agencies and Defense Federal 
 * Acquisition Regulation Supplement 227.7202 for military agencies. The use of 
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 *
 ************************************************************************/


#ifndef SPD_H
#define SPD_H


/************************************************************************
 *  Include files
 ************************************************************************/

#include <sysdefs.h>

/************************************************************************
 *  Register offset addresses and access types
*************************************************************************/

#define SPD_ROWS			3
#define SPD_COL				4
#define SPD_MODULE_BANKS	       	5
#define SPD_MODULE_WIDTH		6
#define SPD_CONFIG_TYPE			11
#define SPD_RFSH_RT			12
#define SPD_SDRAM_WIDTH			13
#define SPD_EC_SDRAM			14
#define SPD_BURSTLEN			16
#define SPD_DEVICE_BANKS		17
#define SPD_CASLAT			18
#define SPD_MRPT			27
#define SPD_RCDM			29
#define SPD_MRPW			30
#define SPD_ROW_DENSITY			31

/************************************************************************
 *  Register encodings
*************************************************************************/

#define SPD_ROWS_A_SHF			0
#define SPD_ROWS_A_MSK			(MSK(4) << SPD_ROWS_A_SHF)

#define SPD_ROWS_B_SHF			4
#define SPD_ROWS_B_MSK			(MSK(4) << SPD_ROWS_B_SHF)

#define SPD_COL_A_SHF			0
#define SPD_COL_A_MSK			(MSK(4) << SPD_COL_A_SHF)

#define SPD_COL_B_SHF			4
#define SPD_COL_B_MSK			(MSK(4) << SPD_COL_B_SHF)

#define SPD_CASLAT_1_SHF		0
#define SPD_CASLAT_1_MSK		(MSK(1) << SPD_CASLAT_1_SHF)
#define SPD_CASLAT_1_BIT		SPD_CASLAT_1_MSK

#define SPD_CASLAT_2_SHF		1
#define SPD_CASLAT_2_MSK		(MSK(1) << SPD_CASLAT_2_SHF)
#define SPD_CASLAT_2_BIT		SPD_CASLAT_2_MSK

#define SPD_CASLAT_3_SHF		2
#define SPD_CASLAT_3_MSK		(MSK(1) << SPD_CASLAT_3_SHF)
#define SPD_CASLAT_3_BIT		SPD_CASLAT_3_MSK

#define SPD_CASLAT_4_SHF		3
#define SPD_CASLAT_4_MSK		(MSK(1) << SPD_CASLAT_4_SHF)
#define SPD_CASLAT_4_BIT		SPD_CASLAT_4_MSK

#define SPD_CASLAT_5_SHF		4
#define SPD_CASLAT_5_MSK		(MSK(1) << SPD_CASLAT_5_SHF)
#define SPD_CASLAT_5_BIT		SPD_CASLAT_5_MSK

#define SPD_CASLAT_6_SHF		5
#define SPD_CASLAT_6_MSK		(MSK(1) << SPD_CASLAT_6_SHF)
#define SPD_CASLAT_6_BIT		SPD_CASLAT_6_MSK

#define SPD_CASLAT_7_SHF		6
#define SPD_CASLAT_7_MSK		(MSK(1) << SPD_CASLAT_7_SHF)
#define SPD_CASLAT_7_BIT		SPD_CASLAT_7_MSK

#define SPD_BURSTLEN_8_SHF		3
#define SPD_BURSTLEN_8_MSK		(MSK(1) << SPD_BURSTLEN_8_SHF)
#define SPD_BURSTLEN_8_BIT		SPD_BURSTLEN_8_MSK

#define SPD_BURSTLEN_4_SHF		2
#define SPD_BURSTLEN_4_MSK		(MSK(1) << SPD_BURSTLEN_4_SHF)
#define SPD_BURSTLEN_4_BIT		SPD_BURSTLEN_4_MSK

#define SPD_BURSTLEN_2_SHF		1
#define SPD_BURSTLEN_2_MSK		(MSK(1) << SPD_BURSTLEN_2_SHF)
#define SPD_BURSTLEN_2_BIT		SPD_BURSTLEN_2_MSK

#define SPD_BURSTLEN_1_SHF		0
#define SPD_BURSTLEN_1_MSK		(MSK(1) << SPD_BURSTLEN_1_SHF)
#define SPD_BURSTLEN_1_BIT		SPD_BURSTLEN_1_MSK

#define SPD_CONFIG_TYPE_NONE		0x0
#define SPD_CONFIG_TYPE_PARITY		0x1
#define SPD_CONFIG_TYPE_ECC		0x2

#define SPD_RFSH_RT_RATE_SHF		0
#define SPD_RFSH_RT_RATE_MSK		(MSK(7) << SPD_RFSH_RT_RATE_SHF)
#define SPD_RFSH_RT_RATE_125		5
#define SPD_RFSH_RT_RATE_62_5		4
#define SPD_RFSH_RT_RATE_31_3		3
#define SPD_RFSH_RT_RATE_15_625		0
#define SPD_RFSH_RT_RATE_7_8		2
#define SPD_RFSH_RT_RATE_3_9		1

#define SPD_SDRAM_WIDTH_W_SHF		0
#define SPD_SDRAM_WIDTH_W_MSK		(MSK(7) << SPD_SDRAM_WIDTH_W_SHF)
#define SPD_SDRAM_WIDTH_B2_SHF		7
#define SPD_SDRAM_WIDTH_B2_MSK		(MSK(1) << SPD_SDRAM_WIDTH_B2_SHF)
#define SPD_SDRAM_WIDTH_B2_BIT		SPD_SDRAM_WIDTH_B2_MSK

#define SPD_EC_SDRAM_WIDTH_SHF		0
#define SPD_EC_SDRAM_WIDTH_MSK		(MSK(7) << SPD_EC_SDRAM_WIDTH_SHF)


#endif /* #ifndef SPD_H */