superio.h

MIPS下的boottloader yamon 的源代码

/************************************************************************
 *
 *  Register definitions for SMSC SuperIO device
 *
 *
 * ######################################################################
 *
 * Copyright (c) 1999-2000 MIPS Technologies, Inc. All rights reserved. 
 * 
 * Unpublished rights reserved under the Copyright Laws of the United States of 
 * America. 
 * 
 * This document contains information that is proprietary to MIPS Technologies, 
 * Inc. ("MIPS Technologies"). Any copying, modifying or use of this information 
 * (in whole or in part) which is not expressly permitted in writing by MIPS 
 * Technologies or a contractually-authorized third party is strictly 
 * prohibited. At a minimum, this information is protected under unfair 
 * competition laws and the expression of the information contained herein is 
 * protected under federal copyright laws. Violations thereof may result in 
 * criminal penalties and fines. 
 * MIPS Technologies or any contractually-authorized third party reserves the 
 * right to change the information contained in this document to improve 
 * function, design or otherwise. MIPS Technologies does not assume any 
 * liability arising out of the application or use of this information. Any 
 * license under patent rights or any other intellectual property rights owned 
 * by MIPS Technologies or third parties shall be conveyed by MIPS Technologies 
 * or any contractually-authorized third party in a separate license agreement 
 * between the parties. 
 * The information contained in this document constitutes one or more of the 
 * following: commercial computer software, commercial computer software 
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 * any related documentation of any kind, including related technical data or 
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 * documentation of any kind, is restricted in accordance with Federal 
 * Acquisition Regulation 12.212 for civilian agencies and Defense Federal 
 * Acquisition Regulation Supplement 227.7202 for military agencies. The use of 
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 *
 ************************************************************************/


#ifndef SUPERIO_H
#define SUPERIO_H


/************************************************************************
 *  Include files
 ************************************************************************/

#include <sysdefs.h>

/************************************************************************
 *  Register offset addresses and access types
*************************************************************************/

#define SMSC_CONFIG_OFS		0x3f0
#define SMSC_DATA_OFS		0x3f1

#define SMSC_CONFIG_DEVNUM	0x7
#define SMSC_CONFIG_ACTIVATE	0x30
#define SMSC_CONFIG_BASEHI	0x60
#define SMSC_CONFIG_BASELO	0x61
#define SMSC_CONFIG_IRQ		0x70
#define SMSC_CONFIG_IRQ2	0x72
#define SMSC_CONFIG_MODE	0xF0

/************************************************************************
 *  Register encodings
*************************************************************************/

#define SMSC_CONFIG_KEY_START		  0x55
#define SMSC_CONFIG_KEY_EXIT		  0xaa

#define SMSC_CONFIG_DEVNUM_FDD	  	  0
#define SMSC_CONFIG_DEVNUM_COM1		  4
#define SMSC_CONFIG_DEVNUM_COM2		  5
#define SMSC_CONFIG_DEVNUM_PARALLEL	  3
#define SMSC_CONFIG_DEVNUM_KYBD		  7

#define SMSC_CONFIG_ACTIVATE_ENABLE_SHF	  0
#define SMSC_CONFIG_ACTIVATE_ENABLE_MSK   (MSK(1) << SMSC_CONFIG_ACTIVATE_ENABLE_SHF)
#define SMSC_CONFIG_ACTIVATE_ENABLE_BIT   SMSC_CONFIG_ACTIVATE_ENABLE_MSK

#define SMSC_CONFIG_MODE_HIGHSPEED_SHF	  1
#define SMSC_CONFIG_MODE_HIGHSPEED_MSK	  (MSK(1) << SMSC_CONFIG_MODE_HIGHSPEED_SHF)
#define SMSC_CONFIG_MODE_HIGHSPEED_BIT	  SMSC_CONFIG_MODE_HIGHSPEED_MSK

#endif /* #ifndef SUPERIO_H */