saa9730.h

MIPS下的boottloader yamon 的源代码

/************************************************************************
 *
 *  Register definitions for SAA9730 device
 *
 *
 * ######################################################################
 *
 * Copyright (c) 1999-2000 MIPS Technologies, Inc. All rights reserved. 
 * 
 * Unpublished rights reserved under the Copyright Laws of the United States of 
 * America. 
 * 
 * This document contains information that is proprietary to MIPS Technologies, 
 * Inc. ("MIPS Technologies"). Any copying, modifying or use of this information 
 * (in whole or in part) which is not expressly permitted in writing by MIPS 
 * Technologies or a contractually-authorized third party is strictly 
 * prohibited. At a minimum, this information is protected under unfair 
 * competition laws and the expression of the information contained herein is 
 * protected under federal copyright laws. Violations thereof may result in 
 * criminal penalties and fines. 
 * MIPS Technologies or any contractually-authorized third party reserves the 
 * right to change the information contained in this document to improve 
 * function, design or otherwise. MIPS Technologies does not assume any 
 * liability arising out of the application or use of this information. Any 
 * license under patent rights or any other intellectual property rights owned 
 * by MIPS Technologies or third parties shall be conveyed by MIPS Technologies 
 * or any contractually-authorized third party in a separate license agreement 
 * between the parties. 
 * The information contained in this document constitutes one or more of the 
 * following: commercial computer software, commercial computer software 
 * documentation or other commercial items. If the user of this information, or 
 * any related documentation of any kind, including related technical data or 
 * manuals, is an agency, department, or other entity of the United States 
 * government ("Government"), the use, duplication, reproduction, release, 
 * modification, disclosure, or transfer of this information, or any related 
 * documentation of any kind, is restricted in accordance with Federal 
 * Acquisition Regulation 12.212 for civilian agencies and Defense Federal 
 * Acquisition Regulation Supplement 227.7202 for military agencies. The use of 
 * this information by the Government is further restricted in accordance with 
 * the terms of the license agreement(s) and/or applicable contract terms and 
 * conditions covering this information from MIPS Technologies or any 
 * contractually-authorized third party. 
 *
 ************************************************************************/


#ifndef SAA9730_H
#define SAA9730_H


/************************************************************************
 *  Include files
 ************************************************************************/

#include <sysdefs.h>

/************************************************************************
 *  Register offset addresses and access types
*************************************************************************/

#define SAA9730_I2CTFR_OFS		0x2400
#define SAA9730_I2CSC_OFS		0x2404

/************************************************************************
 *  Register encodings
*************************************************************************/

#define SAA9730_I2CSC_I2CCC_SHF		8
#define SAA9730_I2CSC_I2CCC_MSK		(MSK(3) << SAA9730_I2CSC_I2CCC_SHF)
#define SAA9730_I2CSC_I2CCC_120		0
#define SAA9730_I2CSC_I2CCC_3200	1
#define SAA9730_I2CSC_I2CCC_80		2
#define SAA9730_I2CSC_I2CCC_480		4
#define SAA9730_I2CSC_I2CCC_6400	5
#define SAA9730_I2CSC_I2CCC_320		6

#define SAA9730_I2CTFR_BYTE2_SHF	24
#define SAA9730_I2CTFR_BYTE2_MSK	(MSK(8) << SAA9730_I2CTFR_BYTE2_SHF)

#define SAA9730_I2CTFR_BYTE2ATTR_SHF	6
#define SAA9730_I2CTFR_BYTE2ATTR_MSK	(MSK(2) << SAA9730_I2CTFR_BYTE2ATTR_SHF)

#define SAA9730_I2CTFR_BYTE1_SHF	16
#define SAA9730_I2CTFR_BYTE1_MSK	(MSK(8) << SAA9730_I2CTFR_BYTE1_SHF)

#define SAA9730_I2CTFR_BYTE1ATTR_SHF	4
#define SAA9730_I2CTFR_BYTE1ATTR_MSK	(MSK(2) << SAA9730_I2CTFR_BYTE1ATTR_SHF)

#define SAA9730_I2CTFR_BYTE0_SHF	8
#define SAA9730_I2CTFR_BYTE0_MSK	(MSK(8) << SAA9730_I2CTFR_BYTE0_SHF)

#define SAA9730_I2CTFR_BYTE0ATTR_SHF	2
#define SAA9730_I2CTFR_BYTE0ATTR_MSK	(MSK(2) << SAA9730_I2CTFR_BYTE0ATTR_SHF)

#define SAA9730_I2CTFR_BUSY_SHF		0
#define SAA9730_I2CTFR_BUSY_MSK		(MSK(1) << SAA9730_I2CTFR_BUSY_SHF)

#define SAA9730_I2CTFR_ERR_SHF		1
#define SAA9730_I2CTFR_ERR_MSK		(MSK(1) << SAA9730_I2CTFR_ERR_SHF)

/* Common values for BYTE[2..0]ATTR fields */
#define SAA9730_I2CTFR_ATTR_START	0x3
#define SAA9730_I2CTFR_ATTR_CONT	0x2
#define SAA9730_I2CTFR_ATTR_STOP	0x1
#define SAA9730_I2CTFR_ATTR_NOP		0x0

#endif /* #ifndef SAA9730_H */