init.h

MIPS下的boottloader yamon 的源代码

/************************************************************************
 *
 *  init.h
 *
 *  Local definitions for init code
 *
 *
 * ######################################################################
 *
 * Copyright (c) 1999-2000 MIPS Technologies, Inc. All rights reserved. 
 * 
 * Unpublished rights reserved under the Copyright Laws of the United States of 
 * America. 
 * 
 * This document contains information that is proprietary to MIPS Technologies, 
 * Inc. ("MIPS Technologies"). Any copying, modifying or use of this information 
 * (in whole or in part) which is not expressly permitted in writing by MIPS 
 * Technologies or a contractually-authorized third party is strictly 
 * prohibited. At a minimum, this information is protected under unfair 
 * competition laws and the expression of the information contained herein is 
 * protected under federal copyright laws. Violations thereof may result in 
 * criminal penalties and fines. 
 * MIPS Technologies or any contractually-authorized third party reserves the 
 * right to change the information contained in this document to improve 
 * function, design or otherwise. MIPS Technologies does not assume any 
 * liability arising out of the application or use of this information. Any 
 * license under patent rights or any other intellectual property rights owned 
 * by MIPS Technologies or third parties shall be conveyed by MIPS Technologies 
 * or any contractually-authorized third party in a separate license agreement 
 * between the parties. 
 * The information contained in this document constitutes one or more of the 
 * following: commercial computer software, commercial computer software 
 * documentation or other commercial items. If the user of this information, or 
 * any related documentation of any kind, including related technical data or 
 * manuals, is an agency, department, or other entity of the United States 
 * government ("Government"), the use, duplication, reproduction, release, 
 * modification, disclosure, or transfer of this information, or any related 
 * documentation of any kind, is restricted in accordance with Federal 
 * Acquisition Regulation 12.212 for civilian agencies and Defense Federal 
 * Acquisition Regulation Supplement 227.7202 for military agencies. The use of 
 * this information by the Government is further restricted in accordance with 
 * the terms of the license agreement(s) and/or applicable contract terms and 
 * conditions covering this information from MIPS Technologies or any 
 * contractually-authorized third party. 
 *
 ************************************************************************/


#ifndef INIT_H
#define INIT_H


/************************************************************************
 *  Include files
 ************************************************************************/

#include <qed_rm52xx.h>

/************************************************************************
 *  Definitions
*************************************************************************/

/* MIPS32 specifics */
#define STATUS_MIPS32	C0_STATUS_BEV_BIT
#define CONFIG0_MIPS32	(C0_CONFIG_K0_NONCOHERENT << C0_CONFIG_K0_SHF)

/* QED specifics  */
#define STATUS_QED	(C0_STATUS_QED_KSU_KERNEL << C0_STATUS_QED_KSU_SHF) |\
			C0_STATUS_QED_BEV_BIT

#define CONFIG_QED	(C0_CONFIG_QED_EC_X3   << C0_CONFIG_QED_EC_SHF) |\
			(C0_CONFIG_QED_EP_DDDD << C0_CONFIG_QED_EP_SHF) |\
			(C0_CONFIG_QED_EW_64   << C0_CONFIG_QED_EW_SHF) |\
			C0_CONFIG_QED_SCN_BIT			        |\
			C0_CONFIG_QED_EM_BIT			        |\
			(C0_CONFIG_QED_EB_SUB  << C0_CONFIG_QED_EB_SHF) |\
			(C0_CONFIG_QED_K0_NONCOHERENT << C0_CONFIG_QED_K0_SHF)


/*  Error handling. Each error requires the following :
 *  
 *  1) An error code as defined here.
 *  2) An error message string as defined by ERROR_MESSAGES (see below).
 *  3) An entry in error handling code as defined by ERROR_HANDLING (see below).
 */

/* Error codes */

#define ERROR_PROCESSOR_UNKNOWN	  1
#define ERROR_PLATFORM_UNKNOWN	  2
#define ERROR_CORE_UNKNOWN	  3
#define ERROR_RAM_LO		  4
#define ERROR_RAM_MI		  5	
#define ERROR_RAM_HI		  6
#define ERROR_MEMTEST_WORD	  7
#define ERROR_MEMTEST_BYTE	  8
#define ERROR_SPD		  9
#define ERROR_SDRAM_CASLAT	  10
#define ERROR_SDRAM_BURSTLEN	  11
#define ERROR_SDRAM_ERRORCHECK	  12
#define ERROR_SDRAM_DEV_BANKS	  13
#define ERROR_SDRAM_CONFIG	  14
#define ERROR_NB_CONFIG		  15
#define	ERROR_NB_DECODE		  16
#define ERROR_STRUCTURE		  17


/**** Cpu specific initialisation ****/	

#ifdef _ASSEMBLER_

#define MSG( name, s ) \
	.align 3;      \
name:   .asciiz  s


/* Error messages */

#define ERROR_MESSAGES			         \
						 \
MSG( msg_ERROR_PROCESSOR_UNKNOWN, "E:CPU"    );	 \
MSG( msg_ERROR_PLATFORM_UNKNOWN,  "E:BOARD"  );	 \
MSG( msg_ERROR_CORE_UNKNOWN,	  "E:CORE"   );	 \
MSG( msg_ERROR_RAM_LO,		  "E:RAM_LO" );	 \
MSG( msg_ERROR_RAM_MI,		  "E:RAM_MI" );	 \
MSG( msg_ERROR_RAM_HI,	          "E:RAM_HI" );	 \
MSG( msg_ERROR_MEMTEST_WORD,	  "E:RAM_W"  );	 \
MSG( msg_ERROR_MEMTEST_BYTE,	  "E:RAM_B"  );	 \
MSG( msg_ERROR_SPD,		  "E:NO_RAM" );  \
MSG( msg_ERROR_SDRAM_CASLAT,      "E:RAM_CL" );	 \
MSG( msg_ERROR_SDRAM_BURSTLEN,    "E:RAM_BL" );	 \
MSG( msg_ERROR_SDRAM_ERRORCHECK,  "E:RAM_EC" );	 \
MSG( msg_ERROR_SDRAM_DEV_BANKS,   "E:RAM_DB" );	 \
MSG( msg_ERROR_SDRAM_CONFIG,      "E:RAM_CF" );	 \
MSG( msg_ERROR_NB_CONFIG,         "E:NB_CFG" );	 \
MSG( msg_ERROR_NB_DECODE,         "E:NB_DEC" );	 \
MSG( msg_ERROR_STRUCTURE,         "E:STRUCT" );	 \
MSG( msg_ERROR_UNKNOWN,	          "E:UNKNWN" )


/* Error handling code */

#define ERROR( code, msg )	  \
	li	t0, code;	  \
	bne	v0, t0, 1f;	  \
	nop;			  \
	la	t9, msg;	  \
	b	write_error;	  \
	nop;			  \
1:

#define ERROR_HANDLING						\
								\
ERROR( ERROR_PROCESSOR_UNKNOWN, msg_ERROR_PROCESSOR_UNKNOWN )	\
ERROR( ERROR_PLATFORM_UNKNOWN,  msg_ERROR_PLATFORM_UNKNOWN )	\
ERROR( ERROR_CORE_UNKNOWN,      msg_ERROR_CORE_UNKNOWN )	\
ERROR( ERROR_RAM_LO,		msg_ERROR_RAM_LO )		\
ERROR( ERROR_RAM_MI,		msg_ERROR_RAM_MI )		\
ERROR( ERROR_RAM_HI,		msg_ERROR_RAM_HI )		\
ERROR( ERROR_MEMTEST_WORD,	msg_ERROR_MEMTEST_WORD )	\
ERROR( ERROR_MEMTEST_BYTE,	msg_ERROR_MEMTEST_BYTE )	\
ERROR( ERROR_SPD,		msg_ERROR_SPD )			\
ERROR( ERROR_SDRAM_CASLAT,	msg_ERROR_SDRAM_CASLAT )	\
ERROR( ERROR_SDRAM_BURSTLEN,	msg_ERROR_SDRAM_BURSTLEN )	\
ERROR( ERROR_SDRAM_ERRORCHECK,	msg_ERROR_SDRAM_ERRORCHECK )	\
ERROR( ERROR_SDRAM_DEV_BANKS,	msg_ERROR_SDRAM_DEV_BANKS )	\
ERROR( ERROR_SDRAM_CONFIG,	msg_ERROR_SDRAM_CONFIG )	\
ERROR( ERROR_NB_CONFIG,		msg_ERROR_NB_CONFIG )		\
ERROR( ERROR_NB_DECODE,		msg_ERROR_NB_DECODE )		\
ERROR( ERROR_STRUCTURE,		msg_ERROR_STRUCTURE )		\
								\
la	t9, msg_ERROR_UNKNOWN;					\
								\
write_error:							\
	/* Write error message and idle loop forever */		\
	jal	sys_disp_string;				\
	nop;							\
1:								\
	b	1b;						\
	nop




/* DISP_STR macro modifies t9..t5 and expects k0 to hold platformID */
#define DISP_STR( s );\
		la   t9, s;\
		KSEG1A( t9 );\
		move t8, ra;\
		jal  sys_disp_string;\
		nop;\
		move ra, t8

/**** CPU specific inialisation */
EXTERN( sys_init_processor )
EXTERN( sys_init_qed_rm5261 )	/* QED RM5261 */
EXTERN( sys_init_mips32 )	/* MIPS32     */

/**** Platform specific intialisation ****/
EXTERN( sys_platform_early )
EXTERN( sys_platform_init )
EXTERN( sys_disp_string )
EXTERN( sys_init_atlas_malta )    /* Atlas and Malta */
EXTERN( sys_init_sead )		  /* SEAD            */
EXTERN( sys_init_sead2 )	  /* SEAD-2          */
EXTERN( sys_spd_read )

/**** Core card specific intialisation ****/
EXTERN( sys_core_init )
EXTERN( sys_core_get_pcimem_base )
EXTERN( sys_core_get_max_sdram_bank )
EXTERN( sys_core_config_write )
EXTERN( sys_core_config_read )
EXTERN( sys_core_configure_sdram )
EXTERN( sys_core_setup_decode )
EXTERN( sys_core_remap_pci_io )

/**** Generic code ****/
EXTERN( sys_init_cache )
EXTERN( sys_platform_early_done )
EXTERN( sys_determine_sdram_parms )

/**** First C-function ****/	
EXTERN( main )

#else  /* #ifdef _ASSEMBLER_ */


/************************************************************************
 *
 *                          arch_platform_init
 *  Description :
 *  -------------
 *
 *  Platform specific initialisation code
 *
 *  Return values :
 *  ---------------
 *
 *  None
 *
 ************************************************************************/
void
arch_platform_init(
    bool early );	/* TRUE -> Before initmodules(), FALSE -> after */


/************************************************************************
 *
 *                          arch_core_init
 *  Description :
 *  -------------
 *
 *  Core card specific initialisation code
 *
 *  Return values :
 *  ---------------
 *
 *  None
 *
 ************************************************************************/
void
arch_core_init();


/************************************************************************
 *
 *                          arch_core_estimate_busfreq
 *  Description :
 *  -------------
 *
 *  Estimate external bus (SysAD) clock frequency.
 *
 *  Return values :
 *  ---------------
 *
 *  Estimated frequency in Hz.
 *
 ************************************************************************/
UINT32
arch_core_estimate_busfreq( void );


#endif /* #ifdef _ASSEMBLER_ */
     


#endif /* #ifndef INIT_H */