pb1000.h

MIPS下的boottloader yamon 的源代码

// Typically valid for all boards, can be over-ridden below
#define PREFERRED_BAUDRATE	115200

// All RAM is required to start at physical 0x00000000
#define PB1000_SYSTEMRAM_BASE 0x00000000

// The macro PB1000_SYSTEMRAM_SIZE can be declared for a board in
// order to over-ride the run-time computation contained in file
// yamon/arch/init/platform/init_platform_s.S. Needed when running
// from SRAM, for example.

/*
  Here is the Flash layout utilized by YAMON (on Alchemy boards):

    +---------------------+ TOP of Flash
	|     FILE FLASH      |
    +---------------------+ 0xBFFC0000
	|                     |
	|                     |
	|    MONITOR FLASH    |
	|                     |
	|                     |
	|                     |
    +  -  -  -  -  -  -  -+
	|        YAMON        |
    +---------------------+ 0xBFC00000
	|                     |
	|                     |
	|                     |
	|                     |
	|                     |
	|    SYSTEM FLASH     |
	|                     |
	|                     |
	|                     |
	|                     |
	|                     |
	|                     |
	|                     |
    +---------------------+ BOTTOM of Flash
 Notes:
 1) MONITOR FLASH must *always* exist at 0xBFC00000, the MIPS reset vector.
    MONITOR FLASH contains YAMON.
 2) Typically 1MB is used by YAMON at 0xBFC00000. However, the MONITOR
    FLASH settings specify ~4MB, this is just so that the flash programming
	routines are "aware" of the space above YAMON.
 3) FILE FLASH is where YAMON stores its environment variables. The intent
    is to allocate a single sector, at the top of the Flash for this purpose.
	Due to varying sector sizes, the FILE FLASH may not occupy a full sector,
	but unless there is a great need for large numbers of environment variables,
	the default values here should suffice.
 4) SYSTEM FLASH is not used/"managed" by YAMON and available for user purposes.
    It is essentially all Flash below the top 4MB (below the reset vector).
 5) These settings are typically valid for all boards, but can be over-riden for
    a particular board by #undef'ing the wrong macro and redefining as appropriate.
 6) A board should define PB1000_FLASH_SIZE correctly.
 7) A board should define PB1000_FLASH_SECTOR_SIZE correctly. For non-uniform
    Flash devices, this single macro may not suffice.
 8) These macros only work if the board has > 4MB of Flash.
 */

#define PB1000_MONITORFLASH_BASE 0xBFC00000
#define PB1000_MONITORFLASH_SIZE 0x003C0000 /* ~4MByte (leave 256K space for FILE FLASH */
#define PB1000_MONITORFLASH_SECTORSIZE (PB1000_FLASH_SECTOR_SIZE)

#define PB1000_FILEFLASH_BASE 0xBFFC0000
#define PB1000_FILEFLASH_SIZE 0x00040000 /* 256 KByte */
#define PB1000_FILEFLASH_SECTORSIZE (PB1000_FLASH_SECTOR_SIZE)

#define PB1000_SYSTEMFLASH_BASE (0xC0000000 - PB1000_FLASH_SIZE)
#define	PB1000_SYSTEMFLASH_SIZE (PB1000_FLASH_SIZE - 0x00400000)
#define PB1000_SYSTEMFLASH_SECTORSIZE (PB1000_FLASH_SECTOR_SIZE)
#define PB1000_SYSTEMFLASH_BANKCOUNT 1
#define PB1000_SYSTEMFLASH_BLOCKCOUNT (PB1000_SYSTEMFLASH_SIZE / PB1000_SYSTEMFLASH_SECTORSIZE)

/********************************************************************/

#ifdef PB1000_CONFIG

/* The following memory information assumes that 2 AMD29DL323D are being used
   arranged to provide a 32 bit word access 
   System, monitor and file flash all reside in the same physical flash */
//#define PB1000_FLASH_SIZE			0x00800000 /* 8MB */
//#define PB1000_FLASH_SECTOR_SIZE	0x00020000 /* 128KB */

#define PB1000_SYSTEMFLASH_BASE 0xBF820000
#define	PB1000_SYSTEMFLASH_SIZE 0x003e0000 /* 3.875 MByte */
#define PB1000_SYSTEMFLASH_SECTORSIZE 0x00020000 /* 128kByte */
#define PB1000_SYSTEMFLASH_BANKCOUNT 2
#define PB1000_SYSTEMFLASH_BLOCKCOUNT 63

#define PB1000_MONITORFLASH_BASE 0xBFC00000
#define PB1000_MONITORFLASH_SIZE 0x00400000 /* 4MByte */
#define PB1000_MONITORFLASH_SECTORSIZE 0x00020000 /* 128kByte */

#define PB1000_FILEFLASH_BASE 0xbf800000
#define PB1000_FILEFLASH_SIZE 0x00020000 /*128kByte*/
#define PB1000_FILEFLASH_SECTORSIZE 0x00004000 /* 16kByte */

//#define PROMICE 1
#ifdef PROMICE // setup for RAM based debug of YAMON
//#undef PB1000_FILEFLASH_BASE
#undef PB1000_FILEFLASH_SIZE
#undef PB1000_FILEFLASH_SECTORSIZE
//#define PB1000_FILEFLASH_BASE 0xA3000000
#define PB1000_FILEFLASH_SIZE 0x00020000	// 128kByte
#define PB1000_FILEFLASH_SECTORSIZE 0x00004000	// 16kByte
#define PB1000_SYSTEMRAM_SIZE 0x02000000
#endif

#define BOARD_STARTUP_MENU "\nSwitch S7.1 selects endian.\n"

#endif

/********************************************************************/
			  
#ifdef PB1500_CONFIG

#define PB1000_FLASH_SIZE			0x04000000 /* 64MB */
#define PB1000_FLASH_SECTOR_SIZE	0x00020000 /* 128KB */
/* Strata driver multiplies sector size * 2 */

#define BOARD_STARTUP_MENU "\nSwitch S21 selects endian.\n"

#endif

/********************************************************************/

#ifdef PB1100_CONFIG

#define PB1000_FLASH_SIZE			0x04000000 /* 64MB */
#define PB1000_FLASH_SECTOR_SIZE	0x00020000 /* 128KB */
/* Strata driver multiplies sector size * 2 */

#define BOARD_STARTUP_MENU "\nSwitch S21 selects endian.\n"

#endif

/********************************************************************/

#ifdef PB1550_CONFIG

//#define FLASH_16BIT 1
#ifdef FLASH_16BIT

#define DUAL_BOOT_16BIT // for yamon/init/reset/reset.S
#define PB1000_FLASH_SIZE			0x04000000 /* 64MB */
#define PB1000_FLASH_SECTOR_SIZE	0x00010000 /* 64KB */

#else 

#define PB1000_FLASH_SIZE			0x08000000 /* 128MB */
#define PB1000_FLASH_SECTOR_SIZE	0x00020000 /* 128KB */

#endif

/* NAPA SMS LAN91C111 daughtercard */
#define LAN91C111_ADDR 0xAC000300

#define USE_S9
#ifdef USE_S9
#define BOARD_STARTUP_MENU	"\n" \
"Switch S9.[2345] 1=On, 0=Off (# = CPU/SBUS/SDR in MHz): \n" \
"Pb1550-SDR:\n" \
" 0000=396/198/198  \n" \
"Pb1550-DDR:\n" \
" 0000=396/198/198  0100=492/123/123  1000=600/150/150  \n" \
" 0001=336/168/168  0101=492/164/164  1001=600/200/100  \n" \
" 0010=396/198/ 99  0110=492/246/123  1010=600/200/200  \n" \
" 0011=396/198/198  0111=552/276/138  1011=600/300/150  \n" \
"All other values are not implemented, do not use.\n" \
"\nSwitch S9.1 selects endian.\n"
#else
#define BOARD_STARTUP_MENU "\nSwitch S9.1 selects endian.\n"
#endif

#endif

/********************************************************************/

#ifdef PB1200_CONFIG

#define FLASH_16BIT 1
#define DUAL_BOOT_16BIT // for yamon/init/reset/reset.S
 
#define PB1000_FLASH_SIZE			0x08000000 /* 128MB */
#define PB1000_FLASH_SECTOR_SIZE	0x00020000 /* 128KB */

#define LAN91C111_ADDR 0xAD000300
#define BCSR_ADDR	0xAD800000

/*
 * Uncomment the following to place SRAM (instead of DDR) at 0x00000000
 * This creates the following:
 * 0x00000000 for 64M : RCE2, with SRAM @ 0x00000000
 * 0x04000000 for 64M : DDR rank1 (DDR rank0 is disabled)
 * NOTE: Must also change YAMON/arch/init/reset_pb1200.S to match.
 */
//#define USE_SRAM
#ifdef USE_SRAM
#undef LAN91C111_ADDR
#undef BCSR_ADDR
#define PB1000_SYSTEMRAM_SIZE 0x00200000 /* 2MB */
#define LAN91C111_ADDR 0xA1000300
#define BCSR_ADDR 0xA1800000
#endif

/*
 * Uncomment below to get run-time frequency selection.
 */
#define USE_S12
#ifdef USE_S12
#define BOARD_STARTUP_MENU	"\n" \
"Switch S12.[2345] 1=On, 0=Off (# = CPU/SBUS/DDR in MHz): \n" \
"Pb1200-DDR1:\n" \
" 0000=396/198/198,CL3    0100=492/123/123,CL2    1000=600/200/100,CL2\n" \
" 0001=324/162/162,CL2.5  0101=492/164/164,CL2.5  1001=600/200/200,CL3\n" \
" 0010=396/198/99 ,CL2    0110=492/246/123,CL2    1010=600/300/150,CL3\n" \
" 0011=396/198/198,CL3    0111=600/150/150,CL2.5\n" \
"Pb1200-DDR2:\n" \
" 0000=396/198/198,CL3 DDR2-400       0100=492/246/246,CL4 DDR2-533\n" \
" 0001=324/162/162,CL3 DDR2-400       0101=600/200/200,CL3 DDR2-400\n" \
" 0001=492/164/164,CL4 DDR2-400\n" \
" 0011=396/198/198,CL3 DDR2-400\n" \
"All other values are not implemented, do not use.\n" \
"\nSwitch S12.1 selects endian.\n"
#else
#define BOARD_STARTUP_MENU "\nSwitch S12.1 selects endian.\n"
#endif

#endif

/********************************************************************/

#if defined(DB1000_CONFIG) || defined(DB1500_CONFIG) || defined(DB1100_CONFIG)

#define PB1000_FLASH_SIZE			0x02000000 /* 32MB */
#define PB1000_FLASH_SECTOR_SIZE	0x00020000 /* 128KB */

#define BOARD_STARTUP_MENU "\nSwitch S1.1 selects endian.\n"

#endif

/********************************************************************/

#if defined(DB1550_CONFIG)

#define PB1000_FLASH_SIZE			0x08000000 /* 128MB */
#define PB1000_FLASH_SECTOR_SIZE	0x00020000 /* 128KB */

#define USE_S5
#ifdef USE_S5
#define BOARD_STARTUP_MENU	"\n" \
"Switch S5.[2345] 1=On, 0=Off (# = CPU/SBUS/DDR in MHz): \n" \
" 0000=396/198/198  0100=492/123/123  1000=600/150/150  \n" \
" 0001=336/168/168  0101=492/164/164  1001=600/200/100  \n" \
" 0010=396/198/ 99  0110=492/246/123  1010=600/200/200  \n" \
" 0011=396/198/198  0111=552/276/138  1011=600/300/150  \n" \
"All other values are not implemented, do not use.\n" \
"\nSwitch S5.1 selects endian.\n"
#else
#define BOARD_STARTUP_MENU "\nSwitch S5.1 selects endian.\n"
#endif

/* NAPA SMS LAN91C111 daughtercard */
#define LAN91C111_ADDR 0xAC000300

#endif

/********************************************************************/

#if defined(DB1200_CONFIG)

#define FLASH_16BIT 1
#define DUAL_BOOT_16BIT // for yamon/init/reset/reset.S

#define PB1000_FLASH_SIZE			0x04000000 /* 64MB */
#define PB1000_FLASH_SECTOR_SIZE	0x00010000 /* 64KB */

#define USE_S6
#ifdef USE_S6
#define BOARD_STARTUP_MENU	"\n" \
"Switch S6.[2345] 1=On, 0=Off (# = CPU/SBUS/DDR in MHz): \n" \
" 0000=396/198/198,CL3 DDR2-400\n" \
" 0001=324/162/162,CL3 DDR2-400\n" \
" 0010=396/198/198,CL3 DDR2-400\n" \
" 0011=492/246/246,CL4 DDR2-533\n" \
" 0100=600/200/200,CL3 DDR2-400\n" \
"All other values are not implemented, do not use.\n" \
"\nSwitch S6.1 selects endian.\n"
#else
#define BOARD_STARTUP_MENU "\nSwitch S6.1 selects endian.\n"
#endif

#define LAN91C111_ADDR 0xB9000300
#define BCSR_ADDR	0xB9800000

#endif

/********************************************************************/

#ifdef HYDROGEN_CONFIG

#define PB1000_FLASH_SIZE			0x02000000 /* 32MB */
#define PB1000_FLASH_SECTOR_SIZE	0x00020000 /* 128KB */
/* Strata driver multiplies sector size * 2 */

#endif 

/********************************************************************/

#ifdef HYD1100_CONFIG

#define PB1000_FLASH_SIZE			0x02000000 /* 32MB */
#define PB1000_FLASH_SECTOR_SIZE	0x00010000 /* 64KB */
/* Strata driver multiplies sector size * 2 */

#endif 

/********************************************************************/

#ifdef H3_CONFIG

#define PB1000_FLASH_SIZE			0x02000000 /* 32MB */
#define PB1000_FLASH_SECTOR_SIZE	0x00010000 /* 64KB */
/* Strata driver multiplies sector size * 2 */

#endif 

/********************************************************************/

#ifdef BE1000_CONFIG

#define FLASH_16BIT 1

#define PB1000_FLASH_SIZE			0x00800000 /* 8MB */
#define PB1000_FLASH_SECTOR_SIZE	0x00010000 /* 64KB */

#endif

/********************************************************************/

#ifdef BOSPORUS_CONFIG

#define FLASH_16BIT 1

#define PB1000_FLASH_SIZE			0x01000000 /* 16MB */
#define PB1000_FLASH_SECTOR_SIZE	0x00010000 /* 64KB */

#endif

/********************************************************************/

#ifdef TI1500_CONFIG

#define PB1000_FLASH_SIZE			0x01000000 /* 16MB */
#define PB1000_FLASH_SECTOR_SIZE	0x00020000 /* 128KB */

#endif

/********************************************************************/

#ifdef MIRAGE_CONFIG

#define PB1000_FLASH_SIZE			0x04000000 /* 64MB */
#define PB1000_FLASH_SECTOR_SIZE	0x00020000 /* 128KB */

#endif

/********************************************************************/

#ifdef SDV2_CONFIG

#define FLASH_16BIT 1

#define PB1000_FLASH_SIZE			0x04000000 /* 64MB */
#define PB1000_FLASH_SECTOR_SIZE	0x00010000 /* 64KB */

#endif

/********************************************************************/

#if defined(WIDGET_CONFIG)

#define FLASH_16BIT 1

#define PB1000_SYSTEMFLASH_BASE 0xBFD00000
#define PB1000_SYSTEMFLASH_SIZE 0x000F0000 /* ~1MBbyte */
#define PB1000_SYSTEMFLASH_SECTORSIZE 0x00010000 /* 64kByte */
#define PB1000_SYSTEMFLASH_BANKCOUNT 1
#define PB1000_SYSTEMFLASH_BLOCKCOUNT 1

#define PB1000_MONITORFLASH_BASE 0xBFC00000
#define PB1000_MONITORFLASH_SIZE 0x00100000 /* 1MByte */
#define PB1000_MONITORFLASH_SECTORSIZE 0x00010000 /* 64kByte */

#define PB1000_FILEFLASH_BASE 0xbfdf0000
#define PB1000_FILEFLASH_SIZE 0x00010000 /* 64kByte */
#define PB1000_FILEFLASH_SECTORSIZE 0x00010000 /* 64kByte */

#endif

/********************************************************************/

#ifdef FICMMP_CONFIG

#define FLASH_16BIT 1
#define DUAL_BOOT_16BIT // for yamon/init/reset/reset.S
 
#define PB1000_FLASH_SIZE			0x08000000 /* 128MB */
#define PB1000_FLASH_SECTOR_SIZE	0x00020000 /* 128KB */

//#define LAN91C111_ADDR 0xAD000300
#define LAN91C111_ADDR 0xAC000300   /* FIC RDK board */

#endif

/********************************************************************/


/********************************************************************/
/********************************************************************/
/********************************************************************/
/********************************************************************/

/* Programmable Counters */
#define AU1000_TOY_BASE  0xB1900000
#define AU1000_TOY_CONTROL	(AU1000_TOY_BASE + 0x0014)
#define AU1000_TOY_TRIM		(AU1000_TOY_BASE + 0x0000)
#define AU1000_TOY_WRITE	(AU1000_TOY_BASE + 0x0004)
#define AU1000_TOY_READ		(AU1000_TOY_BASE + 0x0040)

#define AU1000_SYS_CPUPLL 0xB1900060
#define AU1000_SYS_POWERCTRL 0xb190003c
/* Au1x00 processors normally use 12 MHz oscillator CPU osc input */
#define AU1000_CPUOSC_FREQ 12000000

/*	PCI Configuration */
#define Pb1500_PCIMEM_BASE		0x08000000	// Start of PCI Memory window
#define Pb1500_PCIMEM_SIZE		0x04000000	// 128MB window
#define Pb1500_PCIIO_BASE		0x30000000	// start of PCI I/O window
#define Pb1500_PCIIO_SIZE		0x00010000	// 65KB of I/O

#ifndef _ASSEMBLER_

void au1000_memtest(void);

#endif