pci.h

MIPS下的boottloader yamon 的源代码

{
    UINT16	devid;
    UINT16	vendorid;
    UINT8	function;
    t_pci_bar	bar;		/* Requirements for BAR	*/
}
t_pci_bar_req;


/************************************************************************
 *  Public functions
 ************************************************************************/


/************************************************************************
 *
 *                          pci_config
 *  Description :
 *  -------------
 *
 *  Autodetect and autoconfigure PCI
 *
 *  The function receives parameters for available memory and IO ranges.
 *  A range is defined by 3 parameters :
 *
 *  1) Start of range as seen from PCI.
 *  2) Size of range.
 *  3) Offset of range. The system controller supports remapping of memory
 *     and IO ranges so that the addresses seen on the CPU side (SysAD) of
 *     the controller and the addresses seen on PCI are offset by some amount.
 *     The CPU side start address is found by adding the offset to the
 *     PCI side start address.
 *
 *  Return values :
 *  ---------------
 *
 *  0 = OK, otherwise error
 *
 ************************************************************************/
UINT32
pci_config(
    UINT32      mem_start,		/* Start of PCI memory range	*/
    UINT32	mem_size,		/* Size of PCI memory range     */
    UINT32	mem_offset,		/* Offset of PCI memory range	*/

    UINT32	io_start,		/* Start of PCI io range	*/
    UINT32	io_size,		/* Size of PCI io range		*/
    UINT32	io_offset );		/* Offset of PCI io range	*/


/************************************************************************
 *
 *                          arch_pci_config_controller
 *  Description :
 *  -------------
 *
 *  Configure system controller regarding PCI.
 *
 *  Return values :
 *  ---------------
 *
 *  OK or ERROR_PCI_STRUCTURE (should never happen)
 *
 ************************************************************************/
UINT32
arch_pci_config_controller(
    t_pci_bar_req *bar_req,	   /* Array for fixed bar requests	*/
    UINT32	  *bar_count,	   /* Current number of fixed bar req.	*/
    UINT32	  max_bar_count,   /* Max fixed bar requests		*/
    t_known_dev   *known_dev_controller ); /* Controller data to be filled out */


/************************************************************************
 *
 *                          arch_pci_config_access
 *  Description :
 *  -------------
 *
 *  PCI configuration cycle (read or write)
 *
 *  Return values :
 *  ---------------
 *
 *  OK              :  If no error.
 *  ERROR_PCI_ABORT : If master abort (no target) or target abort.
 *
 ************************************************************************/
UINT32
arch_pci_config_access(
    UINT32 busnum,		/* PCI bus number (0 = local bus)	*/
    UINT32 devnum,		/* PCI device number			*/
    UINT32 func,		/* Function number of device		*/
    UINT32 reg,			/* Device register 			*/
    bool   write,		/* TRUE -> Config write, else read	*/
    UINT8  size,		/* Sizeof data (1/2/4 bytes)		*/
    void   *data );		/* write or read data			*/


/************************************************************************
 *
 *                          arch_pci_system_slot
 *  Description :
 *  -------------
 *
 *  Determine whether board is located in Compact PCI system slot.
 *  Platforms that don't have a compact PCI connector will always
 *  return FALSE.
 *
 *  Return values :
 *  ---------------
 *
 *  TRUE ->  In Compact PCI system slot
 *  FALSE -> Not in system slot.
 *
 ************************************************************************/
bool
arch_pci_system_slot( void );


/************************************************************************
 *
 *                          arch_pci_slot
 *  Description :
 *  -------------
 *
 *  Determine whether a device number corresponds to a PCI slot
 *
 *  Return values :
 *  ---------------
 *
 *  TRUE ->  PCI slot
 *  FALSE -> Not PCI slot
 *
 ************************************************************************/
bool
arch_pci_slot( 
    UINT8 dev,			/* PCI device number			*/
    UINT8 *number );		/* OUT : PCI slot number		*/


/************************************************************************
 *
 *                          arch_pci_slot_intline
 *  Description :
 *  -------------
 *
 *  Determine the interrupt line (for interrupt controller) used for
 *  PCI slot identified by PCI device number.
 *
 *  Return values :
 *  ---------------
 *
 *  Interrupt line
 *
 ************************************************************************/
UINT8
arch_pci_slot_intline( 
    UINT8 dev,			/* PCI device number of slot		*/
    UINT8 intpin );		/* Int. pin (A/B/C/D) used by device	*/



/************************************************************************
 *
 *                          arch_pci_remote_intline
 *  Description :
 *  -------------
 *
 *  Determine the interrupt line (for interrupt controller) used for
 *  PCI interrupt pin on Compact PCI connector
 *
 *  Return values :
 *  ---------------
 *
 *  Interrupt line
 *
 ************************************************************************/
UINT8
arch_pci_remote_intline( 
    UINT8 intpin );		/* Int. pin (A/B/C/D) used by device	*/


/************************************************************************
 *
 *                          arch_pci_lattim
 *  Description :
 *  -------------
 *
 *  Latency timer value to be written to PCI device (Max_Lat)
 *
 *  Return values :
 *  ---------------
 *
 *  Value to be written to Max_Lat.
 *
 ************************************************************************/
UINT8
arch_pci_lattim( 
    t_pci_cfg_dev *dev );	/* PCI device structure			*/


/************************************************************************
 *
 *                          arch_pci_multi
 *  Description :
 *  -------------
 *
 *  Extrace multi field from PCI configuration word 0xc
 *  (Word holding Bist/Header Type/Latency Timer/Cache Line Size)
 *
 *  Return values :
 *  ---------------
 *
 *  multi field
 *
 ************************************************************************/
UINT8
arch_pci_multi( 
    t_pci_cfg_dev *dev,
    UINT32	  bhlc );


/************************************************************************
 *
 *                          pci_autoconfig
 *  Description :
 *  -------------
 *
 *  Configure PCI based on platform requirements.
 *
 *  Return values :
 *  ---------------
 *
 *     0: no pci error, else error
 *
 ************************************************************************/
UINT32
pci_autoconfig(
    UINT32         mem_start,		/* Start of PCI memory range	*/
    UINT32	   mem_size,		/* Size of PCI memory range     */
    UINT32	   mem_offset,		/* Offset of PCI memory range	*/

    UINT32	   io_start,		/* Start of PCI io range	*/
    UINT32	   io_size,		/* Size of PCI io range		*/
    UINT32	   io_offset,		/* Offset of PCI io range	*/

    t_pci_bar_req  *bar_req,		/* Special BAR requirements	*/
    UINT32	   bar_req_count,	/* Number of special BARs       */

    UINT32	   maxbus,		/* Max number of PCI busses	*/
    UINT32	   maxdev,		/* Max number of PCI devices    */

    t_known_dev    *known_dev,		/* Array of known devices	*/
    UINT32	   known_dev_count );	/* Count of known devices	*/


/************************************************************************
 *
 *                          pci_check_range
 *  Description :
 *  -------------
 *
 *  Validate PCI memory range
 *
 *  Return values :
 *  ---------------
 *
 *  OK              :  Range OK
 *  ERROR_PCI_RANGE : Range not OK
 *
 ************************************************************************/
UINT32
pci_check_range( 
    UINT32 addr,			/* Start of range		*/
    UINT32 size,			/* Size of range		*/
    UINT32 *mask );			/* Mask corresponding to range	*/


#endif /* #ifndef _ASSEMBLER_ */


#endif /* #ifndef PCI_H */