📄 lib_mem.h
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/*$PAGE*/
/*
*********************************************************************************************************
* MEMORY POOL DATA TYPES
*
*
* MEMORY SEGMENT
* ----------------
* MEMORY POOL | | <----
* POINTERS TO | MEMORY | |
* MEM_POOL MEMORY BLOCKS | BLOCKS | |
* |----------------| |---------| | -------- | |
* | O------------------> | O--------------------> | | | |
* |----------------| |---------| | | | | |
* | Pool Addr Ptr | | O------------- | -------- | |
* | Pool Size | |---------| | | | |
* |----------------| | | | | -------- | |
* | Block Size | | | --------> | | | |
* | Block Number | | | | | | | |
* |----------------| | . | | -------- | |
* | Block Index | | . | | | |
* |----------------| | . | | . | |
* | O----------------- | | | . | |
* |----------------| | | | | . | |
* | O------------ | | | | | |
* |----------------| | | |---------| | -------- | |
* | Total Size | | | | O--------------------> | | | |
* | Rem'ing Size | | | |---------| | | | | |
* |----------------| | | | | | -------- | |
* | Seg List Ptr: | | | |---------| | | |
* | Prim Prev | | | | ------------ | |
* | Prim Next | | | | | <--------
* | Sec Prev | | | | | | |
* | Sec Next | | | | | | |
* |----------------| | | | | | |
* | | | | | |
* | | | | | |
* | | | | | |
* | | | | | |
* | | | | | |
* | | ---------------- | |
* | | | |
* | -------------------------------------------------- |
* | |
* -----------------------------------------------------------
*
*********************************************************************************************************
*/
typedef struct mem_pool MEM_POOL;
/* ----------------- MEM POOL ----------------- */
struct mem_pool {
LIB_MEM_TYPE Type; /* Pool type: LIB_TYPE_POOL or LIB_TYPE_HEAP */
void *PoolAddrStart; /* Ptr to start of mem seg for mem pool blks. */
void *PoolAddrEnd; /* Ptr to end of mem seg for mem pool blks. */
void **PoolPtrs; /* Ptr to mem pool's array of blk ptrs. */
CPU_SIZE_T PoolSize; /* Size of mem pool (in octets). */
CPU_SIZE_T BlkAlign; /* Align of mem pool blk (in octets). */
CPU_SIZE_T BlkSize; /* Size of mem pool blks (in octets). */
CPU_SIZE_T BlkNbr; /* Nbr of mem pool blks. */
MEM_POOL_IX BlkIx; /* Ix into mem pool's array of blk ptrs. */
/* ----------------- MEM SEG ------------------ */
void *SegAddr; /* Ptr to mem seg's base/start addr. */
void *SegAddrNextAvail; /* Ptr to mem seg's next avail addr. */
CPU_SIZE_T SegSizeTot; /* Tot size of mem seg (in octets). */
CPU_SIZE_T SegSizeRem; /* Rem size of mem seg (in octets). */
/* ------------- MEM SEG LINK LIST ------------ */
MEM_POOL *SegPrimListPrevPtr;
MEM_POOL *SegPrimListNextPtr;
MEM_POOL *SegSecListPrevPtr;
MEM_POOL *SegSecListNextPtr;
};
/*$PAGE*/
/*
*********************************************************************************************************
* GLOBAL VARIABLES
*********************************************************************************************************
*/
/*$PAGE*/
/*
*********************************************************************************************************
* MACRO'S
*********************************************************************************************************
*/
/*
*********************************************************************************************************
* MEMORY DATA VALUE MACRO'S
*
* Note(s) : (1) (a) Some variables & variable buffers to pass & receive data values MUST start on appropriate
* CPU word-aligned addresses. This is required because most word-aligned processors are more
* efficient & may even REQUIRE that multi-octet words start on CPU word-aligned addresses.
*
* (1) For 16-bit word-aligned processors, this means that
*
* all 16- & 32-bit words MUST start on addresses that are multiples of 2 octets
*
* (2) For 32-bit word-aligned processors, this means that
*
* all 16-bit words MUST start on addresses that are multiples of 2 octets
* all 32-bit words MUST start on addresses that are multiples of 4 octets
*
* (b) However, some data values macro's appropriately access data values from any CPU addresses,
* word-aligned or not. Thus for processors that require data word alignment, data words can
* be accessed to/from any CPU address, word-aligned or not, without generating data-word-
* alignment exceptions/faults.
*********************************************************************************************************
*/
/*$PAGE*/
/*
*********************************************************************************************************
* MEM_VAL_GET_xxx()
*
* Description : Decode data values from any CPU memory address.
*
* Argument(s) : addr Lowest CPU memory address of data value to decode (see Notes #2 & #3a).
*
* Return(s) : Decoded data value from CPU memory address (see Notes #1 & #3b).
*
* Caller(s) : various.
*
* Note(s) : (1) Decode data values based on the values' data-word order in CPU memory :
*
* MEM_VAL_GET_xxx_BIG() Decode big- endian data values -- data words' most
* significant octet @ lowest memory address
* MEM_VAL_GET_xxx_LITTLE() Decode little-endian data values -- data words' least
* significant octet @ lowest memory address
* MEM_VAL_GET_xxx() Decode data values using CPU's native or configured
* data-word order
*
* See also 'cpu.h CPU WORD CONFIGURATION Note #2'.
*
* (2) CPU memory addresses/pointers NOT checked for NULL.
*
* (3) (a) MEM_VAL_GET_xxx() macro's decode data values without regard to CPU word-aligned addresses.
* Thus for processors that require data word alignment, data words can be decoded from any
* CPU address, word-aligned or not, without generating data-word-alignment exceptions/faults.
*
* (b) However, any variable to receive the returned data value MUST start on an appropriate CPU
* word-aligned address.
*
* See also 'MEMORY DATA VALUE MACRO'S Note #1'.
*
* (4) MEM_VAL_COPY_GET_xxx() macro's are more efficient than MEM_VAL_GET_xxx() macro's & are
* also independent of CPU data-word-alignment & SHOULD be used whenever possible.
*
* See also 'MEM_VAL_COPY_GET_xxx() Note #4'.
*
* (5) The 'CPU_CFG_ENDIAN_TYPE' pre-processor 'else'-conditional code SHOULD never be compiled/
* linked since each 'cpu.h' SHOULD ensure that the CPU data-word-memory order configuration
* constant (CPU_CFG_ENDIAN_TYPE) is configured with an appropriate data-word-memory order
* value (see 'cpu.h CPU WORD CONFIGURATION Note #2'). The 'else'-conditional code is
* included as an extra precaution in case 'cpu.h' is incorrectly configured.
*********************************************************************************************************
*/
#define MEM_VAL_GET_INT08U_BIG(addr) (((CPU_INT08U)(*(((CPU_INT08U *)(addr)) + 0))) << (0 * DEF_OCTET_NBR_BITS))
#define MEM_VAL_GET_INT16U_BIG(addr) ((((CPU_INT16U)(*(((CPU_INT08U *)(addr)) + 0))) << (1 * DEF_OCTET_NBR_BITS)) + \
(((CPU_INT16U)(*(((CPU_INT08U *)(addr)) + 1))) << (0 * DEF_OCTET_NBR_BITS)))
#define MEM_VAL_GET_INT32U_BIG(addr) ((((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 0))) << (3 * DEF_OCTET_NBR_BITS)) + \
(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 1))) << (2 * DEF_OCTET_NBR_BITS)) + \
(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 2))) << (1 * DEF_OCTET_NBR_BITS)) + \
(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 3))) << (0 * DEF_OCTET_NBR_BITS)))
#define MEM_VAL_GET_INT08U_LITTLE(addr) (((CPU_INT08U)(*(((CPU_INT08U *)(addr)) + 0))) << (0 * DEF_OCTET_NBR_BITS))
#define MEM_VAL_GET_INT16U_LITTLE(addr) ((((CPU_INT16U)(*(((CPU_INT08U *)(addr)) + 0))) << (0 * DEF_OCTET_NBR_BITS)) + \
(((CPU_INT16U)(*(((CPU_INT08U *)(addr)) + 1))) << (1 * DEF_OCTET_NBR_BITS)))
#define MEM_VAL_GET_INT32U_LITTLE(addr) ((((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 0))) << (0 * DEF_OCTET_NBR_BITS)) + \
(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 1))) << (1 * DEF_OCTET_NBR_BITS)) + \
(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 2))) << (2 * DEF_OCTET_NBR_BITS)) + \
(((CPU_INT32U)(*(((CPU_INT08U *)(addr)) + 3))) << (3 * DEF_OCTET_NBR_BITS)))
#if (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_BIG)
#define MEM_VAL_GET_INT08U(addr) MEM_VAL_GET_INT08U_BIG(addr)
#define MEM_VAL_GET_INT16U(addr) MEM_VAL_GET_INT16U_BIG(addr)
#define MEM_VAL_GET_INT32U(addr) MEM_VAL_GET_INT32U_BIG(addr)
#elif (CPU_CFG_ENDIAN_TYPE == CPU_ENDIAN_TYPE_LITTLE)
#define MEM_VAL_GET_INT08U(addr) MEM_VAL_GET_INT08U_LITTLE(addr)
#define MEM_VAL_GET_INT16U(addr) MEM_VAL_GET_INT16U_LITTLE(addr)
#define MEM_VAL_GET_INT32U(addr) MEM_VAL_GET_INT32U_LITTLE(addr)
#else /* See Note #5. */
#error "CPU_CFG_ENDIAN_TYPE illegally #defined in 'cpu.h' "
#error " [See 'cpu.h CONFIGURATION ERRORS']"
#endif
/*$PAGE*/
/*
*********************************************************************************************************
* MEM_VAL_SET_xxx()
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