r300_context.h

mesa-6.5-minigui源码

	struct r300_state_atom unk4274; /* (4274) */
	struct r300_state_atom unk4288; /* (4288) */
	struct r300_state_atom unk42A0;	/* (42A0) */
	struct r300_state_atom zbs;	/* zbias (42A4) */
	struct r300_state_atom unk42B4; /* (42B4) */
	struct r300_state_atom cul;	/* cull cntl (42B8) */
	struct r300_state_atom unk42C0; /* (42C0) */
	struct r300_state_atom rc;	/* rs control (4300) */
	struct r300_state_atom ri;	/* rs interpolators (4310) */
	struct r300_state_atom rr;	/* rs route (4330) */
	struct r300_state_atom unk43A4;	/* (43A4) */
	struct r300_state_atom unk43E8;	/* (43E8) */
	struct r300_state_atom fp;	/* fragment program cntl + nodes (4600) */
	struct r300_state_atom fpt;     /* texi - (4620) */
	struct r300_state_atom unk46A4;	/* (46A4) */
	struct r300_state_atom fpi[4];	/* fp instructions (46C0/47C0/48C0/49C0) */
	struct r300_state_atom unk4BC0;	/* (4BC0) */
	struct r300_state_atom unk4BC8;	/* (4BC8) */
	struct r300_state_atom at;	/* alpha test (4BD4) */
	struct r300_state_atom unk4BD8;	/* (4BD8) */
	struct r300_state_atom fpp;     /* 0x4C00 and following */
	struct r300_state_atom unk4E00;	/* (4E00) */
	struct r300_state_atom bld;	/* blending (4E04) */
	struct r300_state_atom cmk;	/* colormask (4E0C) */
	struct r300_state_atom unk4E10;	/* constant blend color + ??? (4E10) */
	struct r300_state_atom cb;	/* colorbuffer (4E28) */
	struct r300_state_atom unk4E50;	/* (4E50) */
	struct r300_state_atom unk4E88;	/* (4E88) */
	struct r300_state_atom unk4EA0;	/* (4E88) I saw it only written on RV350 hardware..  */
	struct r300_state_atom zs;	/* zstencil control (4F00) */
	struct r300_state_atom unk4F10;	/* (4F10) */
	struct r300_state_atom zb;	/* z buffer (4F20) */
	struct r300_state_atom unk4F28;	/* (4F28) */
	struct r300_state_atom unk4F30;	/* (4F30) */
	struct r300_state_atom unk4F44;	/* (4F44) */
	struct r300_state_atom unk4F54;	/* (4F54) */

	struct r300_state_atom vpi;	/* vp instructions */
	struct r300_state_atom vpp;	/* vp parameters */
	struct r300_state_atom vps;	/* vertex point size (?) */
		/* 8 texture units */
		/* the state is grouped by function and not by
		   texture unit. This makes single unit updates
		   really awkward - we are much better off
		   updating the whole thing at once */
	struct {
		struct r300_state_atom filter;
		struct r300_state_atom unknown1;
		struct r300_state_atom size;
		struct r300_state_atom format;
		struct r300_state_atom pitch;
		struct r300_state_atom offset;
		struct r300_state_atom unknown4;
		struct r300_state_atom border_color;
		} tex;
	struct r300_state_atom txe;	/* tex enable (4104) */
};


/**
 * This structure holds the command buffer while it is being constructed.
 *
 * The first batch of commands in the buffer is always the state that needs
 * to be re-emitted when the context is lost. This batch can be skipped
 * otherwise.
 */
struct r300_cmdbuf {
	int		size;		/* DWORDs allocated for buffer */
	uint32_t*	cmd_buf;
	int		count_used;	/* DWORDs filled so far */
	int		count_reemit;	/* size of re-emission batch */
};


/**
 * State cache
 */

struct r300_depthbuffer_state {
	GLfloat scale;
};

struct r300_stencilbuffer_state {
	GLuint clear;
	GLboolean hw_stencil;

};

struct r300_vap_reg_state {
	   /* input register assigments */
	   int i_coords;
	   int i_normal;
	   int i_color[2];
	   int i_fog;
	   int i_tex[R300_MAX_TEXTURE_UNITS];
	   int i_index;
	   int i_pointsize;
	};

/* Vertex shader state */

/* Perhaps more if we store programs in vmem? */
#define VSF_MAX_FRAGMENT_LENGTH (256*4)
	
/* Can be tested with colormat currently. */
#define VSF_MAX_FRAGMENT_TEMPS (14)


struct r300_vertex_shader_fragment {
	int length;
	union {
		GLuint d[VSF_MAX_FRAGMENT_LENGTH];
		float f[VSF_MAX_FRAGMENT_LENGTH];
		VERTEX_SHADER_INSTRUCTION i[VSF_MAX_FRAGMENT_LENGTH/4];
		} body;
	};

#define VSF_DEST_PROGRAM	0x0
#define VSF_DEST_MATRIX0	0x200
#define VSF_DEST_MATRIX1	0x204
#define VSF_DEST_MATRIX2	0x208
#define VSF_DEST_VECTOR0	0x20c
#define VSF_DEST_VECTOR1	0x20d
#define VSF_DEST_UNKNOWN1	0x400
#define VSF_DEST_UNKNOWN2	0x406

struct r300_vertex_shader_state {
	struct r300_vertex_shader_fragment program;

	/* a bit of a waste - each uses only a subset of allocated space..
	    but easier to program */
	struct r300_vertex_shader_fragment matrix[3];
	struct r300_vertex_shader_fragment vector[2];

	struct r300_vertex_shader_fragment unknown1;
	struct r300_vertex_shader_fragment unknown2;

	int program_start;
	int unknown_ptr1;  /* pointer within program space */
	int program_end;

	int param_offset;
	int param_count;

	int unknown_ptr2;  /* pointer within program space */
	int unknown_ptr3;  /* pointer within program space */
	};
	
extern int hw_tcl_on;

#define CURRENT_VERTEX_SHADER(ctx) (ctx->VertexProgram._Current)

/* Should but doesnt work */
//#define CURRENT_VERTEX_SHADER(ctx) (R300_CONTEXT(ctx)->curr_vp)

//#define TMU_ENABLED(ctx, unit) (hw_tcl_on ? ctx->Texture.Unit[unit]._ReallyEnabled && (OutputsWritten & (1<<(VERT_RESULT_TEX0+(unit)))) : 
//	(r300->state.render_inputs & (_TNL_BIT_TEX0<<(unit))))
//#define TMU_ENABLED(ctx, unit) (hw_tcl_on ? ctx->Texture.Unit[unit]._ReallyEnabled && OutputsWritten & (1<<(VERT_RESULT_TEX0+(unit))) : 
//	ctx->Texture.Unit[unit]._ReallyEnabled && r300->state.render_inputs & (_TNL_BIT_TEX0<<(unit)))

#define TMU_ENABLED(ctx, unit) (ctx->Texture.Unit[unit]._ReallyEnabled)

/* r300_vertex_shader_state and r300_vertex_program should probably be merged together someday.
 * Keeping them them seperate for now should ensure fixed pipeline keeps functioning properly.
 */	
struct r300_vertex_program {
	struct vertex_program mesa_program; /* Must be first */
	int translated;
	
	struct r300_vertex_shader_fragment program;
	struct r300_vertex_shader_fragment params;
	
	int pos_end;
	int num_temporaries; /* Number of temp vars used by program */
	int inputs[VERT_ATTRIB_MAX];
	int outputs[VERT_RESULT_MAX];
	int native;
	int ref_count;
	int use_ref_count;
};

#define PFS_MAX_ALU_INST	64
#define PFS_MAX_TEX_INST	64
#define PFS_MAX_TEX_INDIRECT 4
#define PFS_NUM_TEMP_REGS	32
#define PFS_NUM_CONST_REGS	16

/* Tracking data for Mesa registers */
struct reg_acc {
       int reg;        /* Assigned hw temp */
       unsigned int refcount; /* Number of uses by mesa program */
};

struct r300_pfs_compile_state {
       int v_pos, s_pos;       /* highest ALU slots used */

       /* Track some information gathered during opcode
        * construction.
        * 
        * NOTE: Data is only set by the code, and isn't used yet.
        */
       struct {
               int vsrc[3];
               int ssrc[3];
               int umask;
       } slot[PFS_MAX_ALU_INST];

       /* Used to map Mesa's inputs/temps onto hardware temps */
       int temp_in_use;
       struct reg_acc temps[PFS_NUM_TEMP_REGS];
       struct reg_acc inputs[32]; /* don't actually need 32... */

       /* Track usage of hardware temps, for register allocation,
        * indirection detection, etc. */
       int hwreg_in_use;
       GLuint used_in_node;
       GLuint dest_in_node;
};

struct r300_fragment_program {
	struct fragment_program mesa_program;

	GLcontext *ctx;
	GLboolean translated;
	GLboolean error;
	struct r300_pfs_compile_state *cs;

	struct {
		int length;
		GLuint inst[PFS_MAX_TEX_INST];
	} tex;

	struct {
		struct {
			GLuint inst0;
			GLuint inst1;
			GLuint inst2;
			GLuint inst3;
		} inst[PFS_MAX_ALU_INST];
	} alu;

	struct {
		int tex_offset;
		int tex_end;
		int alu_offset;
		int alu_end;
		int flags;
	} node[4];
	int cur_node;
	int first_node_has_tex;

	int alu_offset;
	int alu_end;
	int tex_offset;
	int tex_end;

	/* Hardware constants */
	GLfloat constant[PFS_NUM_CONST_REGS][4];
	int const_nr;

	/* Tracked parameters */
	struct {
		int idx;			/* hardware index */
		GLfloat *values;	/* pointer to values */
	} param[PFS_NUM_CONST_REGS];
	int param_nr;
	GLboolean params_uptodate;

	int max_temp_idx;
};

#define R300_MAX_AOS_ARRAYS		16

#define AOS_FORMAT_FLOAT	1
#define AOS_FORMAT_UBYTE	2
#define AOS_FORMAT_FLOAT_COLOR	3

#define REG_COORDS	0
#define REG_COLOR0	1
#define REG_TEX0	2

struct dt {
	GLint size;
	GLenum type;
	GLsizei stride;
	void *data;
};

struct radeon_vertex_buffer {
	int Count;
	void *Elts;
	int elt_size;
	int elt_min, elt_max; /* debug */
	
	struct dt AttribPtr[VERT_ATTRIB_MAX];
	
	struct tnl_prim  *Primitive;	              
	GLuint      PrimitiveCount;
	GLint LockFirst;
	GLsizei LockCount;
	int lock_uptodate;
};

struct r300_aos_rec {
	GLuint offset;
	int element_size; /* in dwords */
	int stride;       /* distance between elements, in dwords */

	int format;

	int ncomponents; /* number of components - between 1 and 4, inclusive */

	int reg; /* which register they are assigned to. */

	};

struct r300_state {
	struct r300_depthbuffer_state depth;
	struct r300_texture_state texture;
	struct r300_vap_reg_state vap_reg;
	struct r300_vertex_shader_state vertex_shader;
	struct r300_pfs_compile_state pfs_compile;
	struct r300_dma_region aos[R300_MAX_AOS_ARRAYS];
	int aos_count;
	struct radeon_vertex_buffer VB;

	GLuint *Elts;
	struct r300_dma_region elt_dma;
	
	GLuint render_inputs; /* actual render inputs that R300 was configured for. 
				 They are the same as tnl->render_inputs for fixed pipeline */	
	
	struct {
		int transform_offset;  /* Transform matrix offset, -1 if none */
		} vap_param;  /* vertex processor parameter allocation - tells where to write parameters */
	
	struct r300_stencilbuffer_state stencil;
	
};

#define R300_FALLBACK_NONE 0
#define R300_FALLBACK_TCL 1
#define R300_FALLBACK_RAST 2

/**
 * R300 context structure.
 */
struct r300_context {
	struct radeon_context radeon; /* parent class, must be first */

	struct r300_hw_state hw;
	struct r300_cmdbuf cmdbuf;
	struct r300_state state;
	struct vertex_program *curr_vp;

	/* Vertex buffers
	 */
	struct r300_dma dma;
	GLboolean save_on_next_unlock;
	GLuint NewGLState;

	/* Texture object bookkeeping
	 */
	unsigned nr_heaps;
	driTexHeap *texture_heaps[RADEON_NR_TEX_HEAPS];
	driTextureObject swapped;
	int texture_depth;
	float initialMaxAnisotropy;

	/* Clientdata textures;
	 */
	GLuint prefer_gart_client_texturing;

#ifdef USER_BUFFERS
	struct radeon_memory_manager *rmm;
	GLvector4f dummy_attrib[_TNL_ATTRIB_MAX];
	GLvector4f *temp_attrib[_TNL_ATTRIB_MAX];
#endif

	GLboolean texmicrotile;
};

struct r300_buffer_object {
	struct gl_buffer_object mesa_obj;
	int id;
};
		
#define R300_CONTEXT(ctx)		((r300ContextPtr)(ctx->DriverCtx))

static __inline GLuint r300PackColor( GLuint cpp,
					GLubyte r, GLubyte g,
					GLubyte b, GLubyte a )
{
   switch ( cpp ) {
   case 2:
      return PACK_COLOR_565( r, g, b );
   case 4:
      return PACK_COLOR_8888( r, g, b, a );
   default:
      return 0;
   }
}
extern void r300DestroyContext(__DRIcontextPrivate * driContextPriv);
extern GLboolean r300CreateContext(const __GLcontextModes * glVisual,
				   __DRIcontextPrivate * driContextPriv,
				   void *sharedContextPrivate);

void r300_translate_vertex_shader(struct r300_vertex_program *vp);
extern void r300InitShaderFuncs(struct dd_function_table *functions);
extern int r300VertexProgUpdateParams(GLcontext *ctx, struct r300_vertex_program *vp, float *dst);
extern int r300Fallback(GLcontext *ctx);

extern void radeon_vb_to_rvb(r300ContextPtr rmesa, struct radeon_vertex_buffer *rvb, struct vertex_buffer *vb);
extern GLboolean r300_run_vb_render(GLcontext *ctx, struct tnl_pipeline_stage *stage);

#ifdef RADEON_VTXFMT_A
extern void radeon_init_vtxfmt_a(r300ContextPtr rmesa);
#endif

#ifdef HW_VBOS
extern void r300_init_vbo_funcs(struct dd_function_table *functions);
extern void r300_evict_vbos(GLcontext *ctx, int amount);
#endif

#define RADEON_D_CAPTURE 0
#define RADEON_D_PLAYBACK 1
#define RADEON_D_PLAYBACK_RAW 2
#define RADEON_D_T 3

#endif				/* __R300_CONTEXT_H__ */