📄 smode_rf_settings.h
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/***********************************************************************************
Filename: smode_rf_settings.h
***********************************************************************************/
#ifndef SMODE_RF_SETTINGS
#define SMODE_RF_SETTINGS
// Product = CC1101
// Chip version = A (VERSION = 0x04)
// Crystal accuracy = 10 ppm
// X-tal frequency = 26 MHz
// RF output power = + 10 dBm
// RX filterbandwidth = 270 kHz
// Deviation = 47 kHz
// Datarate = 32.73 kBaud
// Modulation = (0) 2-FSK
// Manchester enable = (0) Manchester disabled
// RF Frequency = 868.299866 MHz
// Channel spacing = 199.951172 kHz
// Channel number = 0
// Optimization = -
// Sync mode = (5) 15/16 + carrier-sense above threshold
// Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX
// CRC operation = (0) CRC disabled for TX and RX
// Forward Error Correction = (0) FEC disabled
// Length configuration = (0) Fixed length packets, length configured in PKTLEN register.
// Packetlength = 255
// Preamble count = (2) 4 bytes
// Append status = 0
// Address check = (0) No address check
// FIFO autoflush = 0
// Device address = 0
// GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet
// GDO2 signal selection = (41) CHIP_RDY
const HAL_RF_CONFIG sModeRfConfig = {
0x08, // FSCTRL1 Frequency synthesizer control.
0x00, // FSCTRL0 Frequency synthesizer control.
0x21, // FREQ2 Frequency control word, high byte.
0x65, // FREQ1 Frequency control word, middle byte.
0x6A, // FREQ0 Frequency control word, low byte.
0x6A, // MDMCFG4 Modem configuration.
0x4A, // MDMCFG3 Modem configuration.
0x05, // MDMCFG2 Modem configuration.
0x22, // MDMCFG1 Modem configuration.
0xF8, // MDMCFG0 Modem configuration.
0x00, // CHANNR Channel number.
0x47, // DEVIATN Modem deviation setting (when FSK modulation is enabled).
0xB6, // FREND1 Front end RX configuration.
0x10, // FREND0 Front end RX configuration.
0x18, // MCSM0 Main Radio Control State Machine configuration.
0x2E, // FOCCFG Frequency Offset Compensation Configuration.
0x6D, // BSCFG Bit synchronization Configuration.
0x04, // AGCCTRL2 AGC control.
0x09, // AGCCTRL1 AGC control.
0xB2, // AGCCTRL0 AGC control.
0xEA, // FSCAL3 Frequency synthesizer calibration.
0x2A, // FSCAL2 Frequency synthesizer calibration.
0x00, // FSCAL1 Frequency synthesizer calibration.
0x1F, // FSCAL0 Frequency synthesizer calibration.
0x59, // FSTEST Frequency synthesizer calibration.
0x81, // TEST2 Various test settings.
0x35, // TEST1 Various test settings.
0x09, // TEST0 Various test settings.
0x06, // IOCFG2 GDO2 output pin configuration.
0x00, // IOCFG0D GDO0 output pin configuration. Refer to SmartRF
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