📄 ne2000.h
字号:
/* bit 1 (0x02) is unused/reserved */
/*
* COL: Transmit Collided. Indicates that the transmission collided at least
* once with another station on the network.
*/
#define NE2000_TSR_COL 0x04
/*
* ABT: Transmit aborted. Indicates that the transmission was aborted due to
* excessive collisions.
*/
#define NE2000_TSR_ABT 0x08
/*
* CRS: Carrier Sense Lost. Indicates that carrier was lost during the
* transmission of the packet. (Transmission is not aborted because of a loss
* of carrier).
*/
#define NE2000_TSR_CRS 0x10
/*
* FU: FIFO Underrun. Indicates that the NIC wasn't able to access bus/
* transmission memory before the FIFO emptied. Transmission of the packet was
* aborted.
*/
#define NE2000_TSR_FU 0x20
/*
* CDH: CD Heartbeat. Indicates that the collision detection circuitry isn't
* working correctly during a collision heartbeat test.
*/
#define NE2000_TSR_CDH 0x40
/*
* OWC: Out of Window Collision: Indicates that a collision occurred after a
* slot time (51.2us). The transmission is rescheduled just as in normal
* collisions.
*/
#define NE2000_TSR_OWC 0x80
/* ******************************************************************** */
/* Receiver Configuration Register (RCR) definitions */
/*
* SEP: Save Errored Packets. If 0, error packets are discarded. If set to 1,
* packets with CRC and frame errors are not discarded.
*/
#define NE2000_RCR_SEP 0x01
/*
* AR: Accept Runt packet. If 0, packet with less than 64 byte are discarded.
* If set to 1, packets with less than 64 byte are not discarded.
*/
#define NE2000_RCR_AR 0x02
/*
* AB: Accept Broadcast. If set, packets sent to the broadcast address will be
* accepted.
*/
#define NE2000_RCR_AB 0x04
/*
* AM: Accept Multicast. If set, packets sent to a multicast address are
* checked for a match in the hashing array. If clear, multicast packets are
* ignored.
*/
#define NE2000_RCR_AM 0x08
/*
* PRO: Promiscuous Physical. If set, all packets with a physical addresses
* are accepted. If clear, a physical destination address must match this
* station's address. Note: for full promiscuous mode, RCR_AB and RCR_AM must
* also be set. In addition, the multicast hashing array must be set to all
* 1's so that all multicast addresses are accepted.
*/
#define NE2000_RCR_PRO 0x10
/*
* MON: Monitor Mode. If set, packets will be checked for good CRC and
* framing, but are not stored in the ring-buffer. If clear, packets are
* stored (normal operation).
*/
#define NE2000_RCR_MON 0x20
/* Bits 6 and 7 are unused/reserved. */
/* ******************************************************************** */
/* Receiver Status Register (RSR) definitions */
/* PRX: Packet Received without error. */
#define NE2000_RSR_PRX 0x01
/*
* CRC: CRC error. Indicates that a packet has a CRC error. Also set for
* frame alignment errors.
*/
#define NE2000_RSR_CRC 0x02
/*
* FAE: Frame Alignment Error. Indicates that the incoming packet did not end
* on a byte boundary and the CRC did not match at the last byte boundary.
*/
#define NE2000_RSR_FAE 0x04
/*
* FO: FIFO Overrun. Indicates that the FIFO was not serviced (during local
* DMA) causing it to overrun. Reception of the packet is aborted.
*/
#define NE2000_RSR_FO 0x08
/*
* MPA: Missed Packet. Indicates that the received packet couldn't be stored
* in the ring-buffer because of insufficient buffer space (exceeding the
* boundary pointer), or because the transfer to the ring-buffer was inhibited
* by RCR_MON - monitor mode.
*/
#define NE2000_RSR_MPA 0x10
/*
* PHY: Physical address. If 0, the packet received was sent to a physical
* address. If 1, the packet was accepted because of a multicast/broadcast
* address match.
*/
#define NE2000_RSR_PHY 0x20
/*
* DIS: Receiver Disabled. Set to indicate that the receiver has enetered
* monitor mode. Cleared when the receiver exits monitor mode.
*/
#define NE2000_RSR_DIS 0x40
/*
* DFR: Deferring. Set to indicate a 'jabber' condition. The CRS and COL
* inputs are active, and the transceiver has set the CD line as a result of
* the jabber.
*/
#define NE2000_RSR_DFR 0x80
/* ******************************************************************** */
/* receive ring descriptor
*
* The National Semiconductor DS8390 Network interface controller uses the
* following receive ring headers. The way this works is that the memory on
* the interface card is chopped up into 256 bytes blocks. A contiguous
* portion of those blocks are marked for receive packets by setting start and
* end block #'s in the NIC. For each packet that is put into the receive
* ring, one of these headers (4 bytes each) is tacked onto the front. The
* first byte is a copy of the receiver status register at the time the packet
* was received.
*/
struct ne2000_ring
{
byte rsr; /* receiver status */
byte next_packet; /* pointer to next packet */
word count; /* bytes in packet + CRC len */
};
/* ******************************************************************** */
/* Common constants */
#define NE2000_PAGE_SIZE 256 /* Size of RAM pages in bytes */
#define NE2000_TXBUF_SIZE 6 /* Size of TX buffer in pages */
/* ******************************************************************** */
/* Definitions for Novell NE1000/2000 boards */
/* Board type codes */
#define NE2000_TYPE_NE1000 0x01
#define NE2000_TYPE_NE2000 0x02
/* Register offsets/total */
#define NE2000_NOVELL_NIC_OFFSET (0x00)
#define NE2000_NOVELL_ASIC_OFFSET (0x10)
#define NE2000_NOVELL_IO_PORTS 32
/*
* Remote DMA data register; for reading or writing to the NIC mem via
* programmed I/O (offset from ASIC base).
*/
#define NE2000_NOVELL_DATA (0x00)
/* Reset register; reading from this register causes a board reset. */
#define NE2000_NOVELL_RESET (0x0f)
//#define NE2000_NOVELL_RESET (0x08)
/* God damned Garfield's none support of 8-bit access */
#define DATA_BUS_16BIT 1 /* for TAXConroller*/
//#define RTL8019_LOOPBACK_TEST 1 /* Enable loopback test */
#define RTL8019_LOOPBACK_TEST 0 /* Disable loopback test */
#define LOOPBACK_TEST_MODE NE2000_TCR_LB0
#if DATA_BUS_16BIT
#define _ui_ unsigned int
#define REF_ASIC_ADDR(X) X
#define ASSIGN_ASIC_ADDR(OFFSET, POINTER)
#define asic_addr_NE2000_NOVELL_DATA (CFG_NE2000_IOBASE+(NE2000_NOVELL_ASIC_OFFSET+NE2000_NOVELL_DATA)*2)
#define asic_addr_NE2000_NOVELL_RESET (CFG_NE2000_IOBASE+(NE2000_NOVELL_ASIC_OFFSET+NE2000_NOVELL_RESET)*2)
#define REF_REG_ADDR(X) X
#define ASSIGN_REG_ADDR(OFFSET, POINTER)
#define nic_addr_NE2000_P0_BNRY (NE2000_P0_BNRY*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_CNTR0 (NE2000_P0_CNTR0*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_CNTR1 (NE2000_P0_CNTR1*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_DCR (NE2000_P0_DCR*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_CNTR2 (NE2000_P0_CNTR2*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_CR (NE2000_P0_CR*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_IMR (NE2000_P0_IMR*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_ISR (NE2000_P0_ISR*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_NCR (NE2000_P0_NCR*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_PSTART (NE2000_P0_PSTART*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_PSTOP (NE2000_P0_PSTOP*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_RBCR0 (NE2000_P0_RBCR0*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_RBCR1 (NE2000_P0_RBCR1*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_RCR (NE2000_P0_RCR*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_RSAR0 (NE2000_P0_RSAR0*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_RSAR1 (NE2000_P0_RSAR1*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_RSR (NE2000_P0_RSR*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_TBCR0 (NE2000_P0_TBCR0*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_TBCR1 (NE2000_P0_TBCR1*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_TCR (NE2000_P0_TCR*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_TPSR (NE2000_P0_TPSR*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_TSR (NE2000_P0_TSR*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P1_CR (NE2000_P1_CR*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P1_CURR (NE2000_P1_CURR*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P1_MAR0 (NE2000_P1_MAR0*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P1_MAR1 (NE2000_P1_MAR1*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P1_MAR2 (NE2000_P1_MAR2*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P1_MAR3 (NE2000_P1_MAR3*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P1_MAR4 (NE2000_P1_MAR4*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P1_MAR5 (NE2000_P1_MAR5*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P1_MAR6 (NE2000_P1_MAR6*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P1_MAR7 (NE2000_P1_MAR7*2 +CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P1_PAR0 (NE2000_P1_PAR0*2 +CFG_NE2000_IOBASE)
#else
#define REF_ASIC_ADDR(X) X
#define ASSIGN_ASIC_ADDR(OFFSET, POINTER)
#define asic_addr_NE2000_NOVELL_DATA (CFG_NE2000_IOBASE+NE2000_NOVELL_ASIC_OFFSET+NE2000_NOVELL_DATA)
#define asic_addr_NE2000_NOVELL_RESET (CFG_NE2000_IOBASE+NE2000_NOVELL_ASIC_OFFSET+NE2000_NOVELL_RESET)
#define REF_REG_ADDR(X) X
#define ASSIGN_REG_ADDR(OFFSET, POINTER)
#define nic_addr_NE2000_P0_BNRY (NE2000_P0_BNRY+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_CNTR0 (NE2000_P0_CNTR0+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_CNTR1 (NE2000_P0_CNTR1+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_DCR (NE2000_P0_DCR+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_CNTR2 (NE2000_P0_CNTR2+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_CR (NE2000_P0_CR+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_IMR (NE2000_P0_IMR+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_ISR (NE2000_P0_ISR+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_NCR (NE2000_P0_NCR+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_PSTART (NE2000_P0_PSTART+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_PSTOP (NE2000_P0_PSTOP+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_RBCR0 (NE2000_P0_RBCR0+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_RBCR1 (NE2000_P0_RBCR1+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_RCR (NE2000_P0_RCR+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_RSAR0 (NE2000_P0_RSAR0+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_RSAR1 (NE2000_P0_RSAR1+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_RSR (NE2000_P0_RSR+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_TBCR0 (NE2000_P0_TBCR0+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_TBCR1 (NE2000_P0_TBCR1+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_TCR (NE2000_P0_TCR+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_TPSR (NE2000_P0_TPSR+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P0_TSR (NE2000_P0_TSR+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P1_CR (NE2000_P1_CR+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P1_CURR (NE2000_P1_CURR+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P1_MAR0 (NE2000_P1_MAR0+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P1_MAR1 (NE2000_P1_MAR1+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P1_MAR2 (NE2000_P1_MAR2+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P1_MAR3 (NE2000_P1_MAR3+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P1_MAR4 (NE2000_P1_MAR4+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P1_MAR5 (NE2000_P1_MAR5+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P1_MAR6 (NE2000_P1_MAR6+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P1_MAR7 (NE2000_P1_MAR7+CFG_NE2000_IOBASE)
#define nic_addr_NE2000_P1_PAR0 (NE2000_P1_PAR0+CFG_NE2000_IOBASE)
#endif
/* ******************************************************************** */
/* ne2000_softc: per line info and status */
/* ******************************************************************** */
/* statistics structure locally by ethernet (ED, SMCX etc) drivers */
struct ether_statistics
{
long packets_in;
long packets_out;
long bytes_in;
long bytes_out;
long errors_in;
long errors_out;
long packets_lost;
long one_collision; /* one collison occurred, xmit ok */
long multiple_collisions; /* more than one collision, xmit ok */
long owc_collision; /* out of window collison occurred, */
/* xmit ok */
long collision_errors; /* excessive collisions, xmit aborted */
long rx_overwrite_errors; /* ring buffer overflow */
long rx_frame_errors; /* packet to large */
long rx_crc_errors;
long rx_fifo_errors; /* rx fifo overrun */
long rx_other_errors; /* other errors not counted in SNMP */
/* statistics (includes ring buffer */
/* corrupt, ring buffer overflow, */
/* frame alignment error, FIFO */
/* overrun, missed packet */
long tx_carrier_errors; /* carrier sense errors */
long tx_fifo_errors; /* fifo underrun */
long tx_delayed; /* xmit delayed due to medium busy */
long tx_sqe_errors; /* SQE Error */
long tx_other_errors; /* other errors not counted in SNMP */
/* statistics (includes xmit timeout, */
/* remote transmit DMA failed to complete, */
};
typedef struct ether_statistics KS_FAR * PETHER_STATS;
/* ne2000_softc: per line info and status */
typedef struct _ne2000_softc
{
//PIFACE iface;
IOADDRESS ia_iobase;
int ia_irq;
IOADDRESS asic_addr; /* ASIC I/O bus address */
IOADDRESS nic_addr; /* NIC (DS8390) I/O bus address */
struct ether_statistics stats;
byte isa16bit; /* width of access to card 0=8 or 1=16 */
word mem_start; /* NIC memory start address */
word mem_end; /* NIC memory end address */
word mem_ring; /* start of RX ring-buffer (in NIC mem) */
dword mem_size; /* total NIC memory size */
word tx_page_start; /* first page of TX buffer area */
word rec_page_start; /* first page of RX ring-buffer */
word rec_page_stop; /* last page of RX ring-buffer */
word next_packet; /* pointer to next unread RX packet */
dword do_recovery; /* ring buffer overflow recovery needs to be done */
/* we put in the tick count when it happened so we */
/* can count down to recover */
int tpx; /* xmit in progress for ring buffer overflow recovery */
} NE2000_SOFTC;
typedef struct _ne2000_softc KS_FAR *PNE2000_SOFTC;
#endif
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -