📄 ne2000.h
字号:
/*
* National Semiconductor DS8390 NIC register definitions.
*
* Copyright (C) 1993, David Greenman. This software may be used, modified,
* copied, distributed, and sold, in both source and binary form provided that
* the above copyright and these terms are retained. Under no circumstances is
* the author responsible for the proper functioning of this software, nor does
* the author assume any responsibility for damages incurred with its use.
*
* $Id: ne2000.h,v 1.1.1.1 2003/11/10 17:00:55 meterchen Exp $
*/
#ifndef __NE2000__
#define __NE2000__ 1
/* Page 0 register offsets */
#define NE2000_P0_CR (0x00) /* Command Register */
#define NE2000_P0_CLDA0 (0x01) /* Current Local DMA Addr low (read) */
#define NE2000_P0_PSTART (0x01) /* Page Start register (write) */
#define NE2000_P0_CLDA1 (0x02) /* Current Local DMA Addr high (read) */
#define NE2000_P0_PSTOP (0x02) /* Page Stop register (write) */
#define NE2000_P0_BNRY (0x03) /* Boundary Pointer */
#define NE2000_P0_TSR (0x04) /* Transmit Status Register (read) */
#define NE2000_P0_TPSR (0x04) /* Transmit Page Start (write) */
#define NE2000_P0_NCR (0x05) /* Number of Collisions Reg (read) */
#define NE2000_P0_TBCR0 (0x05) /* Transmit Byte count, low (write) */
#define NE2000_P0_FIFO (0x06) /* FIFO register (read) */
#define NE2000_P0_TBCR1 (0x06) /* Transmit Byte count, high (write) */
#define NE2000_P0_ISR (0x07) /* Interrupt Status Register */
#define NE2000_P0_CRDA0 (0x08) /* Current Remote DMA Addr low (read) */
#define NE2000_P0_RSAR0 (0x08) /* Remote Start Address low (write) */
#define NE2000_P0_CRDA1 (0x09) /* Current Remote DMA Addr high (read) */
#define NE2000_P0_RSAR1 (0x09) /* Remote Start Address high (write) */
#define NE2000_P0_RBCR0 (0x0a) /* Remote Byte Count low (write) */
#define NE2000_P0_RBCR1 (0x0b) /* Remote Byte Count high (write) */
#define NE2000_P0_RSR (0x0c) /* Receive Status (read) */
#define NE2000_P0_RCR (0x0c) /* Receive Configuration Reg (write) */
#define NE2000_P0_CNTR0 (0x0d) /* frame alignment error counter (read) */
#define NE2000_P0_TCR (0x0d) /* Transmit Configuration Reg (write) */
#define NE2000_P0_CNTR1 (0x0e) /* CRC error counter (read) */
#define NE2000_P0_DCR (0x0e) /* Data Configuration Reg (write) */
#define NE2000_P0_CNTR2 (0x0f) /* missed packet counter (read) */
#define NE2000_P0_IMR (0x0f) /* Interrupt Mask Register (write) */
/* Page 1 register offsets */
#define NE2000_P1_CR (0x00) /* Command Register */
#define NE2000_P1_PAR0 (0x01) /* Physical Address Register 0 */
#define NE2000_P1_PAR1 (0x02) /* Physical Address Register 1 */
#define NE2000_P1_PAR2 (0x03) /* Physical Address Register 2 */
#define NE2000_P1_PAR3 (0x04) /* Physical Address Register 3 */
#define NE2000_P1_PAR4 (0x05) /* Physical Address Register 4 */
#define NE2000_P1_PAR5 (0x06) /* Physical Address Register 5 */
#define NE2000_P1_CURR (0x07) /* Current RX ring-buffer page */
#define NE2000_P1_MAR0 (0x08) /* Multicast Address Register 0 */
#define NE2000_P1_MAR1 (0x09) /* Multicast Address Register 1 */
#define NE2000_P1_MAR2 (0x0a) /* Multicast Address Register 2 */
#define NE2000_P1_MAR3 (0x0b) /* Multicast Address Register 3 */
#define NE2000_P1_MAR4 (0x0c) /* Multicast Address Register 4 */
#define NE2000_P1_MAR5 (0x0d) /* Multicast Address Register 5 */
#define NE2000_P1_MAR6 (0x0e) /* Multicast Address Register 6 */
#define NE2000_P1_MAR7 (0x0f) /* Multicast Address Register 7 */
/* Page 2 register offsets */
#define NE2000_P2_CR (0x00) /* Command Register */
#define NE2000_P2_PSTART (0x01) /* Page Start (read) */
#define NE2000_P2_CLDA0 (0x01) /* Current Local DMA Addr 0 (write) */
#define NE2000_P2_PSTOP (0x02) /* Page Stop (read) */
#define NE2000_P2_CLDA1 (0x02) /* Current Local DMA Addr 1 (write) */
#define NE2000_P2_RNPP (0x03) /* Remote Next Packet Pointer */
#define NE2000_P2_TPSR (0x04) /* Transmit Page Start (read) */
#define NE2000_P2_LNPP (0x05) /* Local Next Packet Pointer */
#define NE2000_P2_ACU (0x06) /* Address Counter Upper */
#define NE2000_P2_ACL (0x07) /* Address Counter Lower */
#define NE2000_P2_RCR (0x0c) /* Receive Configuration Register (read) */
#define NE2000_P2_TCR (0x0d) /* Transmit Configuration Register (read) */
#define NE2000_P2_DCR (0x0e) /* Data Configuration Register (read) */
#define NE2000_P2_IMR (0x0f) /* Interrupt Mask Register (read) */
/* ******************************************************************** */
/* Command Register (CR) definitions */
/*
* STP: SToP. Software reset command. Takes the controller offline. No
* packets will be received or transmitted. Any reception or transmission in
* progress will continue to completion before entering reset state. To exit
* this state, the STP bit must reset and the STA bit must be set. The
* software reset has executed only when indicated by the RST bit in the ISR
* being set.
*/
#define NE2000_CR_STP 0x01
/*
* STA: STArt. This bit is used to activate the NIC after either power-up, or
* when the NIC has been put in reset mode by software command or error.
*/
#define NE2000_CR_STA 0x02
/*
* TXP: Transmit Packet. This bit must be set to indicate transmission of a
* packet. TXP is internally reset either after the transmission is completed
* or aborted. This bit should be set only after the Transmit Byte Count and
* Transmit Page Start register have been programmed.
*/
#define NE2000_CR_TXP 0x04
/*
* RD0, RD1, RD2: Remote DMA Command. These three bits control the operation
* of the remote DMA channel. RD2 can be set to abort any remote DMA command
* in progress. The Remote Byte Count registers should be cleared when a
* remote DMA has been aborted. The Remote Start Addresses are not restored
* to the starting address if the remote DMA is aborted.
*
* RD2 RD1 RD0 function
* 0 0 0 not allowed
* 0 0 1 remote read
* 0 1 0 remote write
* 0 1 1 send packet
* 1 X X abort
*/
#define NE2000_CR_RD0 0x08
#define NE2000_CR_RD1 0x10
#define NE2000_CR_RD2 0x20
/*
* PS0, PS1: Page Select. The two bits select which register set or 'page' to
* access.
*
* PS1 PS0 page
* 0 0 0
* 0 1 1
* 1 0 2
* 1 1 reserved
*/
#define NE2000_CR_PS0 0x40
#define NE2000_CR_PS1 0x80
/* bit encoded aliases */
#define NE2000_CR_PAGE_0 0x00 /* (for consistency) */
#define NE2000_CR_PAGE_1 0x40
#define NE2000_CR_PAGE_2 0x80
/* ******************************************************************** */
/* Interrupt Status Register (ISR) definitions */
/* PRX: Packet Received. Indicates packet received with no errors. */
#define NE2000_ISR_PRX 0x01
/* PTX: Packet Transmitted. Indicates packet transmitted with no errors. */
#define NE2000_ISR_PTX 0x02
/*
* RXE: Receive Error. Indicates that a packet was received with one or more
* the following errors: CRC error, frame alignment error, FIFO overrun,
* missed packet.
*/
#define NE2000_ISR_RXE 0x04
/*
* TXE: Transmission Error. Indicates that an attempt to transmit a packet
* resulted in one or more of the following errors: excessive collisions, FIFO
* underrun.
*/
#define NE2000_ISR_TXE 0x08
/*
* OVW: OverWrite. Indicates a receive ring-buffer overrun. Incoming network
* would exceed (has exceeded?) the boundary pointer, resulting in data that
* was previously received and not yet read from the buffer to be overwritten.
*/
#define NE2000_ISR_OVW 0x10
/*
* CNT: Counter Overflow. Set when the MSB of one or more of the Network Tally
* Counters has been set.
*/
#define NE2000_ISR_CNT 0x20
/*
* RDC: Remote Data Complete. Indicates that a Remote DMA operation has
* completed.
*/
#define NE2000_ISR_RDC 0x40
/*
* RST: Reset status. Set when the NIC enters the reset state and cleared when
* a Start Command is issued to the CR. This bit is also set when a receive
* ring-buffer overrun (OverWrite) occurs and is cleared when one or more
* packets have been removed from the ring. This is a read-only bit.
*/
#define NE2000_ISR_RST 0x80
/* ******************************************************************** */
/* Interrupt Mask Register (IMR) definitions */
/*
* PRXE: Packet Received interrupt Enable. If set, a received packet will
* cause an interrupt.
*/
#define NE2000_IMR_PRXE 0x01
/*
* PTXE: Packet Transmit interrupt Enable. If set, an interrupt is generated
* when a packet transmission completes.
*/
#define NE2000_IMR_PTXE 0x02
/*
* RXEE: Receive Error interrupt Enable. If set, an interrupt will occur
* whenever a packet is received with an error.
*/
#define NE2000_IMR_RXEE 0x04
/*
* TXEE: Transmit Error interrupt Enable. If set, an interrupt will occur
* whenever a transmission results in an error.
*/
#define NE2000_IMR_TXEE 0x08
/*
* OVWE: OverWrite error interrupt Enable. If set, an interrupt is generated
* whenever the receive ring-buffer is overrun. i.e. when the boundary pointer
* is exceeded.
*/
#define NE2000_IMR_OVWE 0x10
/*
* CNTE: Counter overflow interrupt Enable. If set, an interrupt is generated
* whenever the MSB of one or more of the Network Statistics counters has been
* set.
*/
#define NE2000_IMR_CNTE 0x20
/*
* RDCE: Remote DMA Complete interrupt Enable. If set, an interrupt is
* generated when a remote DMA transfer has completed.
*/
#define NE2000_IMR_RDCE 0x40
/* Bit 7 is unused/reserved. */
/* flags used to set mask register; i.e. all interrupts enabled */
/* except counter overflow and DMA complete */
#define NORMAL_NE2000_INTS \
(NE2000_IMR_PRXE | NE2000_IMR_PTXE | NE2000_IMR_RXEE | NE2000_IMR_TXEE | NE2000_IMR_OVWE)
/* ******************************************************************** */
/* Data Configuration Register (DCR) definitions */
/*
* WTS: Word Transfer Select. WTS establishes byte or word transfers for both
* remote and local DMA transfers
*/
#define NE2000_DCR_WTS 0x01
/*
* BOS: Byte Order Select. BOS sets the byte order for the host. Should be 0
* for 80x86, and 1 for 68000 series processors
*/
#define NE2000_DCR_BOS 0x02
/*
* LAS: Long Address Select. When LAS is 1, the contents of the remote DMA
* registers RSAR0 and RSAR1 are used to provide A16-A31.
*/
#define NE2000_DCR_LAS 0x04
/*
* LS: Loopback Select. When 0, loopback mode is selected. Bits D1 and D2 of
* the TCR must also be programmed for loopback operation. When 1, normal
* operation is selected.
*/
#define NE2000_DCR_LS 0x08
/*
* AR: Auto-initialize Remote. When 0, data must be removed from ring-buffer
* under program control. When 1, remote DMA is automatically initiated and
* the boundary pointer is automatically updated.
*/
#define NE2000_DCR_AR 0x10
/*
* FT0, FT1: Fifo Threshold select.
*
* FT1 FT0 Word-width Byte-width
* 0 0 1 word 2 bytes
* 0 1 2 words 4 bytes
* 1 0 4 words 8 bytes
* 1 1 8 words 12 bytes
*
* During transmission, the FIFO threshold indicates the number of bytes or
* words that the FIFO has filled from the local DMA before BREQ is asserted.
* The transmission threshold is 16 bytes minus the receiver threshold.
*/
#define NE2000_DCR_FT0 0x20
#define NE2000_DCR_FT1 0x40
/* bit 7 (0x80) is unused/reserved */
/* ******************************************************************** */
/* Transmit Configuration Register (TCR) definitions */
/*
* CRC: Inhibit CRC. If this bit is not set, CRC will be appended by the
* transmitter, if set, CRC is not appended by the transmitter.
*/
#define NE2000_TCR_CRC 0x01
/*
* LB0, LB1: Loopback control. These two bits set the type of loopback that is
* to be performed.
*
* LB1 LB0 mode
* 0 0 0 - normal operation (DCR_LS = 0)
* 0 1 1 - internal loopback (DCR_LS = 0)
* 1 0 2 - external loopback (DCR_LS = 1)
* 1 1 3 - external loopback (DCR_LS = 0)
*/
#define NE2000_TCR_LB0 0x02
#define NE2000_TCR_LB1 0x04
/*
* ATD: Auto Transmit Disable. Clear for normal operation. When set, allows
* another station to disable the NIC's transmitter by transmitting to a
* multicast address hashing to bit 62. Reception of a multicast address
* hashing to bit 63 enables the transmitter.
*/
#define NE2000_TCR_ATD 0x08
/*
* OFST: Collision Offset enable. This bit when set modifies the backoff
* algorithm to allow prioritization of nodes.
*/
#define NE2000_TCR_OFST 0x10
/* bits 5, 6, and 7 are unused/reserved */
/* ******************************************************************** */
/* Transmit Status Register (TSR) definitions */
/* PTX: Packet Transmitted. Indicates successful transmission of packet. */
#define NE2000_TSR_PTX 0x01
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -