📄 simulink—qpsk.mdl
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ExtModeMexFile "ext_comm"
RTWCAPISignals off
RTWCAPIParams off
RTWCAPIStates off
GenerateASAP2 off
}
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OutDataType "sfix(16)"
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RndMeth "Floor"
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SampleTime "-1"
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Block {
BlockType Reference
Name "AWGN\nChannel"
Ports [1, 1]
Position [924, 320, 966, 400]
Orientation "down"
NamePlacement "alternate"
SourceBlock "commchan2/AWGN\nChannel"
SourceType "AWGN Channel"
ShowPortLabels on
seed "67"
noiseMode "Signal to noise ratio (Eb/No)"
EbNodB "100000"
EsNodB "10"
SNRdB "10"
bitsPerSym "1"
Ps "1"
Tsym "1/255"
variance "1"
}
Block {
BlockType Reference
Name "Bipolar to\nUnipolar\nConverter1"
Ports [1, 1]
Position [520, 108, 600, 152]
SourceBlock "commutil2/Bipolar to\nUnipolar\nConverter"
SourceType "Bipolar to Unipolar Converter"
ShowPortLabels on
M "2"
polarity "Positive"
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Block {
BlockType Reference
Name "Bipolar to\nUnipolar\nConverter2"
Ports [1, 1]
Position [520, 198, 600, 242]
SourceBlock "commutil2/Bipolar to\nUnipolar\nConverter"
SourceType "Bipolar to Unipolar Converter"
ShowPortLabels on
M "2"
polarity "Positive"
}
Block {
BlockType Reference
Name "Bit to Integer\nConverter1"
Ports [1, 1]
Position [690, 118, 770, 162]
SourceBlock "commutil2/Bit to Integer\nConverter"
SourceType "Bit to Integer Converter"
nbits "2"
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Block {
BlockType Reference
Name "Integer to Bit\nConverter"
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Position [695, 428, 775, 472]
Orientation "left"
NamePlacement "alternate"
SourceBlock "commutil2/Integer to Bit\nConverter"
SourceType "Integer to Bit Converter"
nbits "2"
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BlockType Reference
Name "PN Sequence\nGenerator"
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Position [165, 283, 245, 327]
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SourceType "PN Sequence Generator"
poly "[1 0 1 1 1 0 0 0 1]"
ini_sta "[0 0 0 0 0 0 0 1 ]"
shift "0"
Ts "1/255"
frameBased off
sampPerFrame "1"
reset off
}
Block {
BlockType Reference
Name "PN Sequence\nGenerator1"
Ports [0, 1]
Position [305, 558, 385, 602]
SourceBlock "commseqgen2/PN Sequence\nGenerator"
SourceType "PN Sequence Generator"
poly "[1 0 1 1 1 0 0 0 1]"
ini_sta "[0 0 0 0 0 0 0 1 ]"
shift "0"
Ts "1/255"
frameBased off
sampPerFrame "1"
reset off
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Block {
BlockType Product
Name "Product"
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Position [415, 112, 445, 143]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
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Block {
BlockType Product
Name "Product1"
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Position [415, 202, 445, 233]
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OutDataTypeMode "Inherit via internal rule"
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Block {
BlockType Product
Name "Product2"
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Position [460, 432, 490, 463]
Orientation "left"
NamePlacement "alternate"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product3"
Ports [2, 1]
Position [460, 512, 490, 543]
Orientation "left"
NamePlacement "alternate"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Reference
Name "QPSK\nDemodulator\nBaseband1"
Ports [1, 1]
Position [810, 425, 885, 475]
Orientation "left"
NamePlacement "alternate"
SourceBlock "commdigbbndpm2/QPSK\nDemodulator\nBaseband"
SourceType "QPSK Demodulator Baseband"
ShowPortLabels on
OutType "Integer"
Dec "Binary"
Ph "0"
numSamp "1"
}
Block {
BlockType Reference
Name "QPSK\nModulator\nBaseband"
Ports [1, 1]
Position [850, 116, 925, 164]
SourceBlock "commdigbbndpm2/QPSK\nModulator\nBaseband"
SourceType "QPSK Modulator Baseband"
ShowPortLabels on
InType "Integer"
Enc "Binary"
Ph "0"
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