📄 arm1176-shutdownmode-example_c.s
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; you can re-enable them now.) MRC p15,0,r0,c1,c1,0 ; Read S Config BIC r0,r0,#1 ; Clear NS bit MCR p15,0,r0,c1,c1,0 ; Write S Config ; If we have a DMA, save DMA state (both channels) and ; stop running and queued DMA channels. ; If either channel has stopped with an error, we cannot ; restore this error status. This code will abandon entry to ; shutdown mode and return. Alternatively you can change this ; code to process the DMA error(s) and continue. ; This code checks if the DMA is present by reading the DMA ID ; & Status reg. If your code runs on a system that never has ; an internal DMA engine you can remove this code section. MRC p15,0,r0,c11,c0,0 ; Read DMA ID & Status CMP r0,#3 ; Do we have a DMA? BNE no_DMA ; No - skip DMA save MRC p15,0,r2,c11,c1,0 ; User Accessibility Reg MRC p15,0,r3,c11,c2,0 ; Channel Number MOV r0,#0 MCR p15,0,r0,c11,c2,0 ; Select Channel 0 MRC p15,0,r4,c11,c8,0 ; DMA channel status CMP r4,#3 ; Is there an error? BHI quit_shutdown_entry ; Yes: quit MCR p15,0,r0,c11,c3,0 ; No: stop the channel MOV r0,#1 MCR p15,0,r0,c11,c2,0 ; Select Channel 1 MRC p15,0,r10,c11,c8,0 ; DMA channel status CMP r10,#3 ; Is there an error? BHI quit_shutdown_entry ; Yes: quit MCR p15,0,r0,c11,c3,0 ; No: stop the channel MOV r0,#0 MCR p15,0,r0,c11,c2,0 ; Select Channel 0wait_DMA0idle MRC p15,0,r0,c11,c8,0 ; DMA channel status ANDS r0,r0,#3 ; Is the channel idle CMPNE r0,#3 ; or Complete/Error? BNE wait_DMA0idle ; Poll until it is MRC p15,0,r5,c11,c4,0 ; Control Register MRC p15,0,r6,c11,c5,0 ; Internal Start Address MRC p15,0,r7,c11,c6,0 ; External Start Address MRC p15,0,r8,c11,c7,0 ; Internal End Address MRC p15,0,r9,c11,c15,0 ; Context ID STMIA r1!,{r2-r9} ; Save MCR p15,0,r0,c11,c3,2 ; Clear channel 0 MOV r0,#1 MCR p15,0,r0,c11,c2,0 ; Select Channel 1 MOV r4,r10 ; Prior channel statuswait_DMA1idle MRC p15,0,r0,c11,c8,0 ; DMA channel status ANDS r0,r0,#3 ; Is the channel idle CMPNE r0,#3 ; or Complete/Error? BNE wait_DMA1idle ; Poll until it is MRC p15,0,r5,c11,c4,0 ; Control Register MRC p15,0,r6,c11,c5,0 ; Internal Start Address MRC p15,0,r7,c11,c6,0 ; External Start Address MRC p15,0,r8,c11,c7,0 ; Internal End Address MRC p15,0,r9,c11,c15,0 ; Context ID STMIA r1!,{r4-r9} ; Save MCR p15,0,r0,c11,c3,2 ; Clear channel 1no_DMA ; If I and/or D TCM(s) are enabled we need to preserve the contents of these ; TCM(s). This is done using the internal DMA engine (if present) to save the ; entire contents of the enabled TCM(s) to main memory. You must define ; virtual addresses to save the TCM contents to. These addresses must have ; valid page table entries that produce a physical address suitable for the ; DMA. These addresses are defined at the top of this file. ; If you wish to preserve the contents of TCMs but your system does not have ; the internal DMA engine, you must rewrite this code to use an external DMA ; engine or some other method to save the TCMs' contents. ; If your code runs on a system that never has TCMs, or you do not want to ; preserve the TCM contents, you can remove this section of code. ; This code assumes that all TCMs have flat address mappings: the virtual ; address of the base of each TCM is the same as the physical base address of ; that TCM. This assumption allows the code to get the TCM base address from ; the TCM Region register. If this assumption is not true, you must change the ; code to obtain the virtual address for the base of each TCM by a different ; method. MRC p15,0,r0,c11,c0,0 ; Read DMA ID & Status CMP r0,#3 ; Do we have a DMA? BNE end_TCMsave ; No: skip TCM save MRC p15,0,r0,c0,c0,2 ; Read TCM Status MOV r12,r0,LSR #16 ; Get # D TCMs (0-2) AND r13,r0,#3 ; Get # I TCMs (0-2) ADDS r0,r12,r13 ; 0 TCMs in total? BEQ end_TCMsave ; Skip TCM saveDTCM0save MOV r0,#0 MCR p15,0,r0,c9,c2,0 ; Select TCM bank 0 CMP r12,#0 ; >0 D TCMs? BEQ ITCM0save ; No: skip D TCM 0 save MRC p15,0,r2,c9,c1,0 ; D TCM 0 Region TST r2,#1 ; D TCM 0 enabled? BEQ ITCM0save ; No: skip D TCM 0 save BIC r3,r2,#0xFF ; Get base address AND r4,r2,#0x7C ; Get TCM size MOV r4,r4,LSR #2 ; Move TCM size to LSBs MOV r5,#0xF << 5 ; Addr bits [15:12] mask BIC r3,r3,r5,LSL r4 ; Mask invalid addr bits MOV r6,#1 << 9 MOV r6,r6,LSL r4 ; Get TCM size in bytes ADD r7,r3,r6 ; Base addr + TCM size LDR r8,=DTCM0STORE ; Get save addr MOV r9,#0 MCR p15,0,r9,c11,c2,0 ; Select DMA channel 0 ; Note: you may wish to adjust the DMA Control reg setup below. LDR r10,=0x58000803 ; Control MCR p15,0,r10,c11,c4,0 ; Control Register MCR p15,0,r3,c11,c5,0 ; Internal Start Address MCR p15,0,r8,c11,c6,0 ; External Start Address MCR p15,0,r7,c11,c7,0 ; Internal End Address MRC p15,0,r11,c13,c0,1 ; Read Context ID MCR p15,0,r11,c11,c15,0 ; DMA Context ID MCR p15,0,r0,c11,c3,1 ; Start DMA channel 0ITCM0save CMP r13,#0 ; >0 I TCMs? BEQ DTCM1save ; No: skip I TCM 0 save MRC p15,0,r2,c9,c1,1 ; I TCM 0 Region TST r2,#1 ; I TCM 0 enabled? BEQ DTCM1save ; No: skip I TCM 0 save BIC r3,r2,#0xFF ; Get base address AND r4,r2,#0x7C ; Get TCM size MOV r4,r4,LSR #2 ; Move TCM size to LSBs MOV r5,#0xF << 5 ; Addr bits [15:12] mask BIC r3,r3,r5,LSL r4 ; Mask invalid addr bits MOV r6,#1 << 9 MOV r6,r6,LSL r4 ; Get TCM size in bytes ADD r7,r3,r6 ; Base addr + TCM size LDR r8,=ITCM0STORE ; Get save addr MOV r9,#1 MCR p15,0,r9,c11,c2,0 ; Select DMA channel 1 ; Note: you may wish to adjust the DMA Control reg setup below. LDR r10,=0xD8000803 ; Control MCR p15,0,r10,c11,c4,0 ; Control Register MCR p15,0,r3,c11,c5,0 ; Internal Start Address MCR p15,0,r8,c11,c6,0 ; External Start Address MCR p15,0,r7,c11,c7,0 ; Internal End Address MRC p15,0,r11,c13,c0,1 ; Read Context ID MCR p15,0,r11,c11,c15,0 ; DMA Context ID MCR p15,0,r0,c11,c3,1 ; Start DMA channel 1DTCM1save ORR r0,r12,r13 TST r0,#2 ; 2 I TCMs or 2 D TCMs? BEQ end_TCMsave ; No: skip TCM 1 save MOV r0,#1 MCR p15,0,r0,c9,c2,0 ; Select TCM bank 1 CMP r12,#2 ; 2 D TCMs? BNE ITCM1save ; No: skip D TCM 1 save MRC p15,0,r2,c9,c1,0 ; D TCM 1 Region TST r2,#1 ; D TCM 1 enabled? BEQ ITCM1save ; No: skip D TCM 1 save BIC r3,r2,#0xFF ; Get base address AND r4,r2,#0x7C ; Get TCM size MOV r4,r4,LSR #2 ; Move TCM size to LSBs MOV r5,#0xF << 5 ; Addr bits [15:12] mask BIC r3,r3,r5,LSL r4 ; Mask invalid addr bits MOV r6,#1 << 9 MOV r6,r6,LSL r4 ; Get TCM size in bytes ADD r7,r3,r6 ; Base addr + TCM size LDR r8,=DTCM1STORE ; Get save addr MOV r9,#0 MCR p15,0,r9,c11,c2,0 ; Select DMA channel 0 ; We must wait until DMA channel 0 is idle or complete, in case ; saving D TCM 0 is still in progress.wait_DTCM1save MRC p15,0,r0,c11,c8,0 ; DMA Status AND r0,r0,#3 ; Get status bits CMP r0,#2_01 ; Channel queued? CMPNE r0,#2_10 ; Or channel running? BEQ wait_DTCM1save ; Yes - wait MCR p15,0,r0,c11,c3,2 ; Clear channel 0 ; Note: you may wish to adjust the DMA Control reg setup below. LDR r10,=0x58000803 ; Control MCR p15,0,r10,c11,c4,0 ; Control Register MCR p15,0,r3,c11,c5,0 ; Internal Start Address MCR p15,0,r8,c11,c6,0 ; External Start Address MCR p15,0,r7,c11,c7,0 ; Internal End Address MRC p15,0,r11,c13,c0,1 ; Read Context ID MCR p15,0,r11,c11,c15,0 ; DMA Context ID MCR p15,0,r0,c11,c3,1 ; Start DMA channel 0ITCM1save CMP r13,#2 ; 2 I TCMs? BNE end_TCMsave ; No: skip I TCM 1 save MRC p15,0,r2,c9,c1,1 ; I TCM 1 Region TST r2,#1 ; I TCM 1 enabled? BEQ end_TCMsave ; No: skip I TCM 1 save BIC r3,r2,#0xFF ; Get base address AND r4,r2,#0x7C ; Get TCM size MOV r4,r4,LSR #2 ; Move TCM size to LSBs MOV r5,#0xF << 5 ; Addr bits [15:12] mask BIC r3,r3,r5,LSL r4 ; Mask invalid addr bits MOV r6,#1 << 9 MOV r6,r6,LSL r4 ; Get TCM size in bytes ADD r7,r3,r6 ; Base addr + TCM size LDR r8,=ITCM1STORE ; Get save addr MOV r9,#1 MCR p15,0,r9,c11,c2,0 ; Select DMA channel 1 ; We must wait until DMA channel 1 is idle or complete, in case ; saving I TCM 0 is still in progress.wait_ITCM1save MRC p15,0,r0,c11,c8,0 ; DMA Status AND r0,r0,#3 ; Get status bits CMP r0,#2_01 ; Channel queued? CMPNE r0,#2_10 ; Or channel running? BEQ wait_ITCM1save ; Yes - wait MCR p15,0,r0,c11,c3,2 ; Clear channel 1 ; Note: you may wish to adjust the DMA Control reg setup below. LDR r10,=0xD8000803 ; Control MCR p15,0,r10,c11,c4,0 ; Control Register MCR p15,0,r3,c11,c5,0 ; Internal Start Address MCR p15,0,r8,c11,c6,0 ; External Start Address MCR p15,0,r7,c11,c7,0 ; Internal End Address MRC p15,0,r11,c13,c0,1 ; Read Context ID MCR p15,0,r11,c11,c15,0 ; DMA Context ID⌨️ 快捷键说明
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