ucb1400.h

老外的一个开源项目

// Copyright (c) David Vescovi.  All rights reserved.
// Part of Project DrumStix
// Windows Embedded Developers Interest Group (WE-DIG) community project.
// http://www.we-dig.org
// Copyright (c) Microsoft Corporation.  All rights reserved.
//------------------------------------------------------------------------------
//
//  Header: ucb1400.h
//
//  Defines the ucb1400 register layout and associated types and constants.
//
//------------------------------------------------------------------------------
#ifndef _UCB1400_H_
#define _UCB1400_H_

#if __cplusplus
extern "C" {
#endif

//
// UCB1x00 CODEC register defines
//
#define UCB_IO_DATA					0x005A
#define UCB_IO_DIR					0x005C
#define UCB_RE_IE					0x005E
#define UCB_FE_IE					0x0060
#define UCB_INT_CS					0x0062
#define UCB_TCH_CR					0x0064
#define UCB_ADC_CR					0x0066
#define UCB_ADC_DATA				0x0068

#define UCB_ADC_X					0x8008
#define UCB_ADC_XSTART				0x8088
#define UCB_ADC_Y					0x8000
#define UCB_ADC_YSTART				0x8080
#define UCB_ADC_RES					0x0000
#define UCB_ADC_DONE				0x8000
#define UCB_PEN_DOWN				0x3000

//
// mask definitions for touch control register 
//
#define TSMX_POW					0x0001
#define TSPX_POW					(0x0001 << 1)
#define TSMY_POW					(0x0001 << 2)
#define TSPY_POW					(0x0001 << 3)
#define TSMX_GND					(0x0001 << 4)
#define TSPX_GND					(0x0001 << 5)
#define TSMY_GND					(0x0001 << 6)	
#define TSPY_GND					(0x0001 << 7)
#define TSC_MODE_PREASSURE			(0x0001 << 8)
#define TSC_MODE_POSITION			(0x0001 << 9)
#define TSC_MODE_INT				0x0000
#define TSC_BIAS_ENA				(0x0001	<< 11)
#define TSPX_LOW					(0x0001 << 12)
#define TSMX_LOW					(0x0001 << 13)

//
// mask definitions for ier register
//
#define TSPX_INT					(0x0001 << 12)	
#define ADC_INT						(0x0001 << 11)
#define TSMX_INT					(0x0001	<< 13)
#define TCLIP_INT					(0x0001 << 14)
#define ACLIP_INT					(0x0001 << 15)
#define IO_INT_CLR					0x3FF

//
// mask definitions for ADC control register 
//
#define ADC_SYNC_ENA				0x0001
#define VREFBYP_CON					(0x0001 << 1)
#define ADC_INPUT_TSPX				0x0000
#define ADC_INPUT_TSMX				0x0004
#define ADC_INPUT_TSPY				0x0008
#define ADC_INPUT_TSMY				0x000C
#define ADC_INPUT_AD0				0x0010
#define ADC_INPUT_AD1				0x0014
#define ADC_INPUT_AD2				0x0018
#define ADC_INPUT_AD3				0x001C
#define EXT_REF_ENA					(0x0001 << 5)
#define ADC_START					(0x0001 << 7)
#define ADC_ENA						(0x0001 << 15) 

//
//mask definitions for ADC Data Bits
//
#define ADC_DATA					0x3FF
#define ADC_DATA_VAL				(0x00000001 << 15)

//
// mask definitions for GPIO register 
//
#define	UCB_IO_GPIO_0				0x0001
#define	UCB_IO_GPIO_1				0x0002
#define	UCB_IO_GPIO_2				0x0004
#define	UCB_IO_GPIO_3				0x0008
#define	UCB_IO_GPIO_4				0x0010
#define	UCB_IO_GPIO_5				0x0020
#define	UCB_IO_GPIO_6				0x0040
#define	UCB_IO_GPIO_7				0x0080
#define	UCB_IO_GPIO_8				0x0100
#define	UCB_IO_GPIO_9				0x0200

//
// Audio DAC & ADC Sample Rate Control Register (ADR & AAR) definitions
//
#define UCB_DR_8000					0x1F40  //  8000 samples/sec
#define UCB_DR_11025				0x2B11  // 11025 samples/sec
#define UCB_DR_16000				0x3E80  // 16000 samples/sec
#define UCB_DR_22050				0x5622  // 22050 samples/sec
#define UCB_DR_32000				0x7D00  // 32000 samples/sec
#define UCB_DR_44100				0xAC44  // 44100 samples/sec
#define UCB_DR_48000				0xBB80  // 48000 samples/sec

//------------------------------------------------------------------------------

#if __cplusplus
}
#endif

#endif