pxa255_ac97.h

老外的一个开源项目

// Copyright (c) David Vescovi.  All rights reserved.
// Part of Project DrumStix
// Windows Embedded Developers Interest Group (WE-DIG) community project.
// http://www.we-dig.org
// Copyright (c) Microsoft Corporation.  All rights reserved.
//------------------------------------------------------------------------------
//
//  Header: pxa255_ac97.h
//
//  Defines the AC97 register layout and associated types and constants.
//
//------------------------------------------------------------------------------
#ifndef _PXA255_AC97_H_
#define _PXA255_AC97_H_

#if __cplusplus
extern "C" {
#endif

//------------------------------------------------------------------------------
//
//  Type:  AC97_REG_T
//
//  Defines the AC97 control register layout.
//
//------------------------------------------------------------------------------

typedef	struct
{
	VUINT32_T	POCR;			//PCM out control register
	VUINT32_T	PICR;			//PCM in control register
	VUINT32_T	MCCR;			//Mic in control register
	VUINT32_T	GCR;			//Global Control Register
	VUINT32_T	POSR;			//PCM out status register
	VUINT32_T	PISR;			//PCM in status	register
	VUINT32_T	MCSR;			//Mic in status	register
	VUINT32_T	GSR;			//global status	register
	VUINT32_T	CAR;			//CODEC	access register
	VUINT32_T	RSVD0[7];
	VUINT32_T	PCDR;			//audio	fifo data register
	VUINT32_T	RSVD1[7];
	VUINT32_T	MCDR;			//mic in fifo data register
	VUINT32_T	RSVD2[39];
	VUINT32_T	MOCR;			//Modem	out	control	register
	VUINT32_T	RSVD3;
	VUINT32_T	MICR;			//Modem	in control register
	VUINT32_T	RSVD4;
	VUINT32_T	MOSR;			//Modem	out	status register
	VUINT32_T	RSVD5;
	VUINT32_T	MISR;			//modem	in status register
	VUINT32_T	RSVD6[9];
	VUINT32_T	MODR;			//Modem	fifo data register
	VUINT32_T	RSVD7[47];
	P_VUINT32_T	pPRICODECAUD[64];//Primary audio CODEC
	P_VUINT32_T	pSECCODECAUD[64];//Secondary audio CODEC
	P_VUINT32_T	pPRICODECMDM[64];//Primary modem CODEC
	P_VUINT32_T	pSECCODECMDM[64];//Secondary modem CODEC
} AC97_REG_T, *PAC97_REG_T;



//
// AC97	CODEC Access Register (CAR) bit mask constants
//
#define	CAR_CAIP		0x00000001

//
// AC97	Global Control Register	bit	mask constants
//
#define	GCR_GIE			0x00000001
#define	GCR_nCOLD_RST	0x00000002
#define	GCR_WARM_RST	0x00000004
#define	GCR_LINK_OFF	0x00000008
#define	GCR_PRIRES_IEN	0x00000010
#define	GCR_SECRES_IEN	0x00000020

#define	GCR_PRIRDY_IEN	0x00000100
#define	GCR_SECRDY_IEN	0x00000200

#define	GCR_SDONE_IE	0x00040000
#define	GCR_CDONE_IE	0x00080000


//
// AC97	Global Status Register bit mask	constants
//
#define	GSR_GSCI		0x00000001
#define	GSR_MIINT		0x00000002
#define	GSR_MOINT		0x00000004

#define	GSR_PIINT		0x00000020
#define	GSR_POINT		0x00000040
#define	GSR_MINT		0x00000080
#define	GSR_PCR			0x00000100
#define	GSR_SCR			0x00000200
#define	GSR_PRIRES		0x00000400
#define	GSR_SECRES		0x00000800
#define	GSR_SLT12_BITS	0x00001000
#define	GSR_RDCS		0x00008000

#define	GSR_SDONE		0x00040000
#define	GSR_CDONE		0x00080000


//
// AC97	PCM FIFO Register bit mask constants
//
#define AC97_FIFOSTAT_FEIE	0x00000008
#define AC97_FIFOSTAT_FIFOE	0x00000010

//------------------------------------------------------------------------------

#if __cplusplus
}
#endif

#endif