gumio.c

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		//
		pCLKRegs->CKEN |= CKEN_HWUART ;

    }
    else if (UARTPhysAddr == PXA255_BASE_REG_PA_BTUART)
    {
        // Initialize GPIO pins.
	    // Write 0 on GPIO pins 43 and 45 before configuring them as outputs.
	    pGPIORegs->GPCR1 = (GPIO_43 | GPIO_45);

	    // Configure direction of GPIO pins 42 and 44 as input 
	    // and GPIO pins 43 and 45 as output.
        //
	    pGPIORegs->GPDR1 &= ~( GPIO_42 | GPIO_44); 
	    pGPIORegs->GPDR1 |=  ( GPIO_43 | GPIO_45);

	    // Configure GPIO pins 42 and 44 for Alt_fn1. And pins 43 and 45 for Alt_fn2.
        //
	    pGPIORegs->GAFR1_L |= ( GPIO_42_AF1_BTRXD | GPIO_44_AF1_BTCTS |
                                GPIO_43_AF2_BTTXD | GPIO_45_AF2_BTRTS );

        // Enable the BTUART clock.
        //
        pCLKRegs->CKEN |= CKEN_BTUART ;

    }

    // Enable the UART.
    //
    pUARTRegs->IER_DLH = 0x40;

    return(TRUE);

}


//------------------------------------------------------------------------------
//
//  Function: OEMInitBT
//
//  Initializes the Bluetooth specific IO
//  Uses HWUART for ROK module, BTUART for PBA module
//
//------------------------------------------------------------------------------

BOOL OEMInitBT(UINT32 btModule) 
{
	volatile GPIO_REG_T *pGPIORegs = (volatile GPIO_REG_T *) OALPAtoVA(PXA255_BASE_REG_PA_GPIO, FALSE);

	pGPIORegs->GPCR0 = (GPIO_7_nBTRESET);

	// Configure direction of GPIO pins 7 and 12 as outputs
    // reset state to start
	pGPIORegs->GPDR0 |=  (GPIO_7_nBTRESET | GPIO_12_BT32khzCLK);
	pGPIORegs->GAFR0_L |= GPIO_12_AF1_32KHz;	// 32khz clock out

	if (btModule == 1)
	{ // ROK module
		InitHWUartAF3();	// needs to use HWUART AF3 for auto-handshake
	}
	else if (btModule == 2)
	{ // PBA module
        OEMInitUart(PXA255_BASE_REG_PA_BTUART);
	}
	else
	{
		return FALSE;
	}
	OALStall(200);

// radio off till driver loads
//	// now release reset
//	pGPIORegs->GPSR0 = (GPIO_7_nBTRESET);

    return(TRUE);

}

	
//------------------------------------------------------------------------------
//
//  Function: OEMInitEth
//
//  Initializes the Ethernet controler
//
//------------------------------------------------------------------------------

BOOL OEMInitEth(UINT32 GumEthDevice) 
{
//	UINT32 temp;
	volatile MEMC_REG_T *pMEMCRegs = (volatile MEMC_REG_T *)OALPAtoVA(PXA255_BASE_REG_PA_MEMC, FALSE);
	volatile GPIO_REG_T *pGPIORegs = (volatile GPIO_REG_T *)OALPAtoVA(PXA255_BASE_REG_PA_GPIO, FALSE);

	if ( GumEthDevice < 1 || GumEthDevice > 2)
		return FALSE;

/* not needed .. set in startup
	// Initialize timing
	if (GumEthDevice == 1)
	{ // set CS1 timing
        pMEMCRegs->MSC0 = (pMEMCRegs->MSC0 & 0x0000ffff) | (MSCX_ETHTIMING << 16);
		temp = pMEMCRegs->MSC0;		// read it back to make sure it set
	}
	else 
	{ // set CS2 timing
        pMEMCRegs->MSC1 = (pMEMCRegs->MSC2 & 0xffff0000) | (MSCX_ETHTIMING);
		temp = pMEMCRegs->MSC1;		// read it back to make sure it set
	}
*/

	// Initialize GPIO pins
    //
	// Configure GPIO pins for Ethx functions
	if (GumEthDevice == 1)
	{ // Eth1 device
		// Write 1 on GPIO pins 15, 49 and 80 before configuring them as outputs.
		pGPIORegs->GPSR0 = ( GPIO_15 );			// CS
		pGPIORegs->GPSR1 = ( GPIO_49 );			// nPWE
		pGPIORegs->GPSR2 = ( GPIO_80_E1RESET );	// RESET

		pGPIORegs->GPDR0 |= ( GPIO_15 );
		pGPIORegs->GPDR1 |= ( GPIO_49 );
		pGPIORegs->GPDR2 |= ( GPIO_80_E1RESET );

		// Configure GPIO pins for Alt_fnX to support Eth.
		// assume relevent bit are already preset to 0's.
		pGPIORegs->GAFR0_L |= ( GPIO_15_AF2_nCS1 );
		pGPIORegs->GAFR0_U |= ( GPIO_18_AF1_RDY );
		pGPIORegs->GAFR1_U |= ( GPIO_49_AF2_nPWE | GPIO_57_AF1_nIOIS16);

		OALStall(500);
		pGPIORegs->GPCR2 = ( GPIO_80_E1RESET );	// release RESET

	}
	else
	{ // Eth2 device ... dependent on Eth1
		// Write 1 on GPIO pins 78, 49 and 36 before configuring them as outputs.
		pGPIORegs->GPSR2 = ( GPIO_78 );			// CS
		pGPIORegs->GPSR1 = ( GPIO_49 );			// nPWE
		pGPIORegs->GPSR1 = ( GPIO_52_E2RESET );	// RESET

		pGPIORegs->GPDR2 |= ( GPIO_78 );
		pGPIORegs->GPDR1 |= ( GPIO_49 );
		pGPIORegs->GPDR1 |= ( GPIO_52_E2RESET );

		// Configure GPIO pins for Alt_fnX to support Eth.
		// assume relevent bit are already preset to 0's.
		pGPIORegs->GAFR1_U |= ( GPIO_49_AF2_nPWE );
		pGPIORegs->GAFR2_L |= ( GPIO_78_AF2_nCS2 );

		OALStall(100);
		pGPIORegs->GPCR1 = ( GPIO_52_E2RESET );	// release RESET

	}

    return(TRUE);
}


//------------------------------------------------------------------------------
//
//  Function: OEMResetEth
//
//  Resets the Ethernet controler
//
//------------------------------------------------------------------------------

BOOL OEMResetEth(UINT32 GumEthDevice) 
{
	volatile GPIO_REG_T *pGPIORegs = (volatile GPIO_REG_T *) OALPAtoVA(PXA255_BASE_REG_PA_GPIO, FALSE);

	if ( GumEthDevice < 1 || GumEthDevice > 2)
		return FALSE;

	if (GumEthDevice == 1)
	{ // Eth1 device
		pGPIORegs->GPSR2 = ( GPIO_80_E1RESET );	// assert RESET
		OALStall(100000);							// 100ms should be enought
		pGPIORegs->GPCR2 = ( GPIO_80_E1RESET );	// release RESET
		OALStall(10000);							// 10ms just to be safe
	}
	else
	{ // Eth2 device
		pGPIORegs->GPSR1 = ( GPIO_52_E2RESET );	// assert RESET
		OALStall(100000);							// 100ms should be enought
		pGPIORegs->GPCR1 = ( GPIO_52_E2RESET );	// release RESET
		OALStall(10000);							// 10ms just to be safe
	}
	return TRUE;
}


//------------------------------------------------------------------------------
//
//  Function: OEMInitUSBFN
//
//  Initializes the USB function controler
//
//------------------------------------------------------------------------------

BOOL OEMInitUSBFN(void) 
{
    volatile GPIO_REG_T *pGPIORegs = (volatile GPIO_REG_T *) OALPAtoVA(PXA255_BASE_REG_PA_GPIO, FALSE);
    volatile CLK_REG_T  *pCLKRegs =  (volatile CLK_REG_T *)  OALPAtoVA(PXA255_BASE_REG_PA_CLK, FALSE);

	pGPIORegs->GPDR1 &= ~( GPIO_35_CABLE_DETECT | GPIO_41_USB_CONTROL );
	pCLKRegs->CKEN |= CKEN_USB;
	return(TRUE);
}


//------------------------------------------------------------------------------
//
//  Function: OEMInitAC97
//
//  Initializes the AC97 controler
//
//------------------------------------------------------------------------------

BOOL OEMInitAC97(void) 
{
    volatile GPIO_REG_T *pGPIORegs = (volatile GPIO_REG_T *) OALPAtoVA(PXA255_BASE_REG_PA_GPIO, FALSE);
    volatile CLK_REG_T  *pCLKRegs =  (volatile CLK_REG_T *)  OALPAtoVA(PXA255_BASE_REG_PA_CLK, FALSE);
    volatile AC97_REG_T *pAC97Regs = (volatile AC97_REG_T *) OALPAtoVA(PXA255_BASE_REG_PA_AC97, FALSE);

	pGPIORegs->GPDR0 |= ( GPIO_30 | GPIO_31 );		// SYNC and SDATA_OUT output 
	pGPIORegs->GPDR0 &= ~( GPIO_28 | GPIO_29 );	// BIT_CLK and SDATA_IN_0 input

	pGPIORegs->GAFR0_U |=( GPIO_28_AF1_BITCLK | GPIO_29_AF1_SDATA_IN0 |
						    GPIO_30_AF2_SDATA_OUT | GPIO_31_AF2_SYNC );

	pCLKRegs->CKEN |= CKEN_AC97;

	pAC97Regs->GCR |= GCR_nCOLD_RST;

	OALStall(10000);

	return(TRUE);
}


//------------------------------------------------------------------------------
//
//  Function: OEMInitLCD
//
//  Initializes the LCD display controler
//
//------------------------------------------------------------------------------

BOOL OEMInitLCD(void) 
{
    volatile GPIO_REG_T *pGPIORegs = (volatile GPIO_REG_T *) OALPAtoVA(PXA255_BASE_REG_PA_GPIO, FALSE);
    volatile CLK_REG_T  *pCLKRegs =  (volatile CLK_REG_T *)  OALPAtoVA(PXA255_BASE_REG_PA_CLK, FALSE);

	pGPIORegs->GPDR1 |= ( GPIO_58 | GPIO_59 | GPIO_60 | GPIO_61 | GPIO_62 | GPIO_63 );
	pGPIORegs->GPDR2 |= ( GPIO_64 | GPIO_65 | GPIO_66 | GPIO_67 | GPIO_68 | GPIO_69 | 
						   GPIO_70 | GPIO_71 | GPIO_72 | GPIO_73 | GPIO_74 | GPIO_75 |
						   GPIO_76 | GPIO_77 );


	pGPIORegs->GAFR1_U |= ( GPIO_58_AF2_LDD0 | GPIO_59_AF2_LDD1 | GPIO_60_AF2_LDD2 |
							 GPIO_61_AF2_LDD3 | GPIO_62_AF2_LDD4 | GPIO_63_AF2_LDD5 );	
	pGPIORegs->GAFR2_L |= ( GPIO_64_AF2_LDD6 | GPIO_65_AF2_LDD7 | GPIO_66_AF2_LDD8 |
							 GPIO_67_AF2_LDD9 | GPIO_68_AF2_LDD10 | GPIO_69_AF2_LDD11 |
							 GPIO_70_AF2_LDD12 | GPIO_71_AF2_LDD13 | GPIO_72_AF2_LDD14 |
							 GPIO_73_AF2_LDD15 | GPIO_74_AF2_LCD_FCLK | GPIO_75_AF2_LCD_LCLK |
							 GPIO_76_AF2_LCD_PCLK | GPIO_77_AF2_LCD_ACBIAS );	

	pCLKRegs->CKEN |= CKEN_LCD;
	return(TRUE);
}


//------------------------------------------------------------------------------
//
//  Function: OEMInitPWM
//
//  Initializes the PWM controler
//
//------------------------------------------------------------------------------

BOOL OEMInitPWM(UINT32 PwmDevice) 
{
	volatile GPIO_REG_T *pGPIORegs = (volatile GPIO_REG_T *) OALPAtoVA(PXA255_BASE_REG_PA_GPIO, FALSE);
    volatile CLK_REG_T  *pCLKRegs  = (volatile CLK_REG_T *)  OALPAtoVA(PXA255_BASE_REG_PA_CLK, FALSE);
    volatile PWM_REG_T  *pPWM0Regs = (volatile PWM_REG_T *)  OALPAtoVA(PXA255_BASE_REG_PA_PWM0, FALSE);
    volatile PWM_REG_T  *pPWM1Regs = (volatile PWM_REG_T *)  OALPAtoVA(PXA255_BASE_REG_PA_PWM1, FALSE);

	if ( PwmDevice > 1)
		return FALSE;

	if (PwmDevice == 0)
	{ // PWM0 device
	    pGPIORegs->GPDR0 |=  ( GPIO_16 );
		pGPIORegs->GAFR0_U |= GPIO_16_AF2_PWM0;
		pCLKRegs->CKEN |= CKEN_PWM0;
	}
	else
	{ // PWM1 device
	    pGPIORegs->GPDR0 |=  ( GPIO_17 );
		pGPIORegs->GAFR0_U |= GPIO_17_AF2_PWM1;
		pCLKRegs->CKEN |= CKEN_PWM1;
	}
	return(TRUE);
}





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