📄 mmcsd.h
字号:
// Copyright (c) David Vescovi. All rights reserved.
// Part of Project DrumStix
// Windows Embedded Developers Interest Group (WE-DIG) community project.
// http://www.we-dig.org
// Copyright (c) Microsoft Corporation. All rights reserved.
//------------------------------------------------------------------------------
//
// File: mmcsd.h
//
// This file contains definitions specific to the MMC/SD driver.
//
//
//------------------------------------------------------------------------------
#ifndef __MMCSD_H__
#define __MMCSD_H__
#ifdef __cplusplus
extern "C" {
#endif
#include "mmcapi.h"
/* Current active device flag */
#define DRV_ACTIVE 0x8000
/* Internal READ, WRITE, ERASE Command operations */
#define READING 1
#define WRITING 2
#define ERASING 3
#define SPI_TYPE 0x80000000
#define MMC_TYPE 0x40000000
#define SD_TYPE 0x00000000
#define SINGLE_MODE 0x0001 // Single block
#define MULTIPLE_MODE 0x0002 // Multiple blocks
#define READ_MODE 0x0080
#define WRITE_MODE 0x0100
/* Data block length */
#define DEFAULT_BLK_LEN 512 /* Default block length */
#define DEFAULT_ERASE_GROUP 16
#define BYTE_LENGTH 6 /* Length in bytes of MMC responses */
#define CID_BYTE_LENGTH 17 /* Length in bytes of MMC card id. CID */
#define CMD_BYTE_LENGTH 6 /* Length in bytes of MMC commands */
#define RESPONSE_BIT_LENGTH 48 /* Length in bits of MMC responses */
#define CID_BIT_LENGTH 136 /* Length in bit of MMC card id. CID */
#define SD_SCR_LENGTH 8 /* Length in bytes of SD_SEND_SCR */
#define SD_STATUS_LENGTH 64 /* Length in bytes of SD_STATUS */
/* CLOCK */
#define MMC_Ncr_MAX 64 /* Maximum number of clock cycles to wait for card response */
#define MMC_Ncc_MIN 8 /* Minimum number of clock cycles between commands */
#define MMC_Nwr_MIN 2
#define RESET_DELAY 30 /* Delay for reset */
#define READ_ACCESS_DELAY 550
#define TMPWPBIT_ON 0x10 /* Write protected */
#define TMPWPBIT_OFF 0xEF
/* Card ready flag (CMD1, ACMD41) */
#define CARD_READY_FLAG 0x8000
/* -------------------- TRANSFER OR STAND BY STATE ---------------------------- */
#define STANDBY_STATE 0 /* cmd9, cmd10, cmd14 */
/* NO check response byte 1 and byte 2(bits 31 - 16) */
#define TRANSFER_STATE 1 /* read/write command */
/* ---------------------------------------------------------------------------- */
/* MultiMedia Card command definitions */
#define CMD_START_BIT 0x40
#define APPL_CMD_BIT 0x100 /* Apply to SD ACMD ONLY */
#define SECURITY_CMD_BIT 0x8000 /* Apply to SD security ONLY */
/* ------------------------- CMD's names: ---------------------------- */
#define GO_IDLE_STATE 0x0
#define SEND_OP_COND 0x1
#define ALL_SEND_CID 0x2
#define SET_RELATIVE_ADDR 0x3
#define SET_DSR 0x4
#define SELECT_DESELECT_CARD 0x7
#define SEND_CSD 0x9
#define SEND_CID 0xa
#define READ_DAT_UNTIL_STOP 0xb
#define STOP_TRANSMISSION 0xc
#define SEND_STATUS 0xd
#define SET_BUS_WIDTH_REGISTER 0xe
#define GO_INACTIVE_STATE 0xf
#define SET_BLOCKLEN 0x10
#define READ_BLOCK 0x11
#define READ_MULTIPLE_BLOCK 0x12
#define WRITE_DAT_UNTIL_STOP 0x14
#define WRITE_BLOCK 0x18
#define WRITE_MULTIPLE_BLOCK 0x19
#define PROGRAM_CID 0x1a
#define PROGRAM_CSD 0x1b
#define SET_WRITE_PROT 0x1c
#define CLR_WRITE_PROT 0x1d
#define SEND_WRITE_PROT 0x1e
#define TAG_SECTOR_START 0x20
#define TAG_SECTOR_END 0x21
#define UNTAG_SECTOR 0x22
#define TAG_ERASE_GROUP_START 0x23
#define TAG_ERASE_GROUP_END 0x24
#define UNTAG_ERASE_GROUP 0x25
#define ERASE_SECTORS 0x26
#define CRC_ON_OFF 0x3b
#define APPL_CMD (55 + CMD_START_BIT + APPL_CMD_BIT)
/* ONLY for SD card in MMC mode */
#define SET_BUS_WIDTH (6 + CMD_START_BIT + APPL_CMD_BIT)
#define SD_STATUS (13 + CMD_START_BIT + APPL_CMD_BIT)
#define SD_NUM_WR_SECTORS (22 + CMD_START_BIT + APPL_CMD_BIT)
#define SD_SECTOR_ERASE_COUNT (23 + CMD_START_BIT + APPL_CMD_BIT)
#define SD_SEND_OP_COND (41 + CMD_START_BIT + APPL_CMD_BIT)
#define SD_SET_CLR_DETECT (42 + CMD_START_BIT + APPL_CMD_BIT)
#define SD_SEND_SCR (51 + CMD_START_BIT + APPL_CMD_BIT)
//* CLOCK RATE definitions */
#define CLK_RATE_FULL 0x00 // Master clock
#define CLK_RATE_HALF 0x01 // 1/2 Master clock
#define CLK_RATE_FOUR 0x02 // 1/4 Master clock
#define CLK_RATE_EIGHT 0x03 // 1/8 Master clock
#define CLK_RATE_SIXTEEN 0x04 // 1/16 Master clock
#define CLK_RATE_THIRTY2 0x05 // 1/32 Master clock
#define CLK_RATE_SIXTY4 0x06 // 1/64 Master clock
#define SPDATA_REG 00
#define SPSTAT_REG 01
#define SPCTRL_REG 02
#define EPPADDR_REG 03
#define EPPDATA_REG 04
/* Register definitions */
#define STR_STP_CLK_REG 0x00 // start stop clock
#define STATUS_REG 0x02 // Status
#define CLK_RATE_REG 0x04 // MMC Clock Rate
#define REVISION_REG 0x06 // Revision information
#define SPI_REG 0x08 // SPI control
#define CMD_DAT_CONT_REG 0x0A // Command data control
#define RESPONSE_TOUT_REG 0x0C // Response time out
#define READ_TOUT_REG 0x0E // Read time out
#define BLK_LEN_REG 0x10 // Block length register
#define NOB_REG 0x12 // Number of blocks to transfer
#define PWR_REG 0x14 // Power
#define TEST_REG 0x16 // Test
#define TEST_CLK_COUNT_REG 0x18 // Test Clock count
#define INT_MASK_REG 0x1A // Interrupt Mask
#define CMD_REG 0x1C // Command Index
#define ARGUMENT_HI_REG 0x1E // Argument High word
#define ARGUMENT_LO_REG 0x20 // Argument Low word
#define RES_FIFO_REG 0x22 // Response read address location
#define FIFO_OE_REG 0x24 //
#define FIFO_RD_WR_REG 0x26 //
#define BUF_PART_FULL_REG 0x28 // Buffer partial full
/* START_STOP CLOCK register definitions */
#define STOP_CLOCK 0x01 // Disable the clock
#define START_CLOCK 0x02 // Enable the clock
/* STATUS register definitions (READ ONLY) */
#define TIME_OUT_RECEIVE 0x0001 // TIME_OUT_RCVD - Time out receive data
#define TIME_OUT_RESPONSE 0x0002 // TIME_OUT_RES - Time out response
#define CRC_WR_ERR 0x0004 // CRC_WR_ERR - CRC write error
#define CRC_RD_ERR 0x0008 // CRC_RD_ERR - CRC read error
#define ERR_CRC_NO_RESP 0x0010 // ERR_CRC_NO_RESP - No response CRC
#define RESP_CRC_ERR 0x0020 // RESP_CRC_ERR - Response CRC error
#define FIFO_BUFFER_EMPTY 0x0040 // EFB - Empty fifo1
#define FIFO_BUFFER_FULL 0x0080 // FFB - Full fifo1
#define CLOCK_ENABLE 0x0100 // CLOCK_ENABLE - Clock enable
#define RESERVE_EFB2 0x0200 // EFB2 - Empty fifo2
#define RESERVE_FFB2 0x0400 // FFB2 - Full fifo2
#define RD_DATA_AVAILABLE 0x0800 // READ - Data available
#define DONE_WDATA_XFER 0x0800 // WRITE - Finish WRITE request
#define DONE_PROG_RDWR 0x1000 // For write, End of programming data
#define END_CMD_RES 0x2000 // END_CMD_RES - End command response
#define RESERVE_FIFO1_PAEN 0x4000 // FIFO1_PAEN or FIFO1_PAFN
#define RESERVE_FIFO2_PAEN 0x8000 // FIFO2_PAEN or FIFO2_PAFN
/* Interrupt Mask Definitions */
#define MASK_ON_TXFIFO_WR_REQ (0x3F)
#define MASK_ON_RXFIFO_RD_REQ (0x5F)
#define MASK_ON_PRG_DONE (0x7D)
#define MASK_ON_DATA_TRAN_DONE (0x7E)
#define MASK_OFF_ALL (0x7F)
/* CMD_DAT_CONT register definitions */
#define RESPONSE_TYPE_R0 0x00
#define RESPONSE_TYPE_R1 0x01
#define RESPONSE_TYPE_R2 0x02
#define RESPONSE_TYPE_R3 0x03
#define DATA_ENABLE 0x04
#define DATA_READ_SET 0x00
#define DATA_WRITE_SET 0x08
#define DATA_STREAM_BLK 0x10
#define BUSY_SET 0x20
#define SEND_80_CLOCKS 0x40
#define SSTOP_TRANSMISSION 0x4C
/* Response Time Out register definitions */
#define DEFAULT_RESPONSE_TOUT 0xFF
/* Read Time Out Register definitions */
#define DEFAULT_READ_TOUT 0xFFFF
/* Block Length register definitions */
#define DEFAULT_BLK_LENGTH 0x200 /* 512-byte block length */
/* Number of Block register definition */
#define DEFAULT_NOB 0x01
/* Interrupt Mask Register definitions */
#define DATA_TRANSFER_INT 0x01
#define PROGPRAM_DONE_INT 0x02
#define CMD_RESPONSE_INT 0x04
#define BUFF_READY_INT 0x08
/* Buffer Partial Full register */
#define BUFF_PARTIAL_FULL 0x01
typedef unsigned short * USERADDRESS;
/* MMC completion code, the return value of most of the MMC driver fucntions */
typedef enum MMC_ERROR
{
MMC_NO_ERROR = 0, // 0- Successful completion
MMC_CARD_IS_NOT_RESPONDING=201, // 201- Time out error on card response
MMC_CMD_CRC_ERROR, // 202- CRC error detected on card response
MMC_DATA_CRC_ERROR, // 203- CRC error detected on incoming data block
MMC_DATA_STATUS_CRC_ERROR, // 204- Card is reporting CRC error on outgoing data block.
MMC_CARD_IS_BUSY, // 205- Card is busy programming
MMC_CARD_IS_NOT_READY, // 206- Card did not complete its initialization and is not ready.
MMC_COMUNC_CRC_ERROR, // 207- Card is reporting CRC error
MMC_COMUNC_ILLEG_COM, // 208- Card is reporting illegal command
MMC_ERASE_PARAM, // 209- Erase parameters error
MMC_WP_VIOLATION, // 210- Attempt to write a WP sector
MMC_ERROR, // 211- MMC card internal error
MMC_WP_ERASE_SKIP, // 212- Attempt to erase WP sector
MMC_ADDRESS_ERROR, // 213- Sector messaligned error
MMC_CARD_READ_FAILURE, // 214- Card is reporting Read command failed
MMC_INTERFACE_ERROR, // 215- Error detected by the MMC HW driver
MMC_ILLEGAL_MODE, // 216- Not support in the current mode
MMC_COMMAND_PARAMETER_ERROR, // 217- Card is reporting Address-out-of-range error
MMC_ERASE_SEQ_ERROR, // 218- Error in the sequence of erase command
MMC_ERASE_RESET, // 219- Erase command canceled before execution
MMC_NO_CRC_STATUS, // 220- Time out on CRC status for Write
MMC_OVERRUN, // 221- Overrun
MMC_UNDERRUN, // 222- Underrun
MMC_CIDCSD_OVERWRITE, // 223- a) The CID register has been already
// written and can be overwriten.
// b) The read only section of CSD does not
// match the card content.
// c) An attempt to reverse the copy (set
// as original) or permanent WP bits was made.
MMC_CARD_ECC_DISABLED, // 224- The command has been executed without
// using the internal ECC.
MMC_READ_FOR_DATA, // 225- Corresponds to buffer empty signalling
// on the bus.
MMC_DATA_LENGTH_ERROR, // 226- Data Length more then 512 bytes.
MMC_TIME_OUT_RCVD, // 227- Time out recive data (B0 for controller)
MMC_OUT_OF_RANGE, // 228- Address out of range error
MMC_CARD_ECC_FAILED, // 229- Internal Card ECC failed
MMC_CARD_IS_LOCKED, // 230- Card is locked by host
MMC_LOCK_UNLOCK_FAILED // 231- Lock/unlock card failed or access to locked card
} MMC_CC;
/* MMC response types */
typedef enum
{
R0 = 0, /* NONE response */
R1 = 1, /* Basic MMC response format */
R2 = 2, /* R2 response. Used by ALL_SEND_CID(CMD2),
SEND_CID(CMD10) and SEND_CSD(CMD9)
*/
R3 = 3, /* R3 response. Used by SEND_OP_COND(CMD1) */
R6 = 6 /* R6 response. Used by SD for SEND_OP_COND(ACMD41) */
} RESP_TYPE;
/* MMC card states */
typedef enum
{
IDLE = 0,
READY,
IDENT,
STANDBY,
TRANSFER,
DATA,
RCV,
PRG,
DIS,
RES1,
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -