bsp_cfg.h

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// Copyright (c) David Vescovi.  All rights reserved.
// Part of Project DrumStix
// Windows Embedded Developers Interest Group (WE-DIG) community project.
// http://www.we-dig.org
// Copyright (c) Microsoft Corporation.  All rights reserved.
//------------------------------------------------------------------------------
//
//  File:  bsp_cfg.h
//
//  This file contains system constant specific for board.
//
//------------------------------------------------------------------------------
#ifndef _BSP_CFG_H_
#define _BSP_CFG_H_

//------------------------------------------------------------------------------
//
//  Define:  BSP_DEVICE_PREFIX
//
//  Prefix used to generate device name for bootload/KITL
//
#define BSP_DEVICE_PREFIX       "GUM"      // Device name prefix

//------------------------------------------------------------------------------
// Board clock
//------------------------------------------------------------------------------

// OSCR0 is used for the system tick timer.  Use the 3.686MHz clock.
//
#define OEM_CLOCK_FREQ          3686400        // 3.68M ticks/sec
#define OEM_TICKS_1MS           3686           // 1ms in ticks
#define OEM_TICKS_1US           4              // 1us in ticks
#define RESCHED_PERIOD          1              // Reschedule period in ms
#define RESCHED_INCREMENT       (RESCHED_PERIOD * OEM_TICKS_1MS)    // Reschedule
                                               // period in ticks
#define OEM_TICK_COUNT_MARGIN   450

//------------------------------------------------------------------------------
// Static SYSINTR Mapping for driver.
#define SYSINTR_TOUCH			(SYSINTR_FIRMWARE+1)  // 17
#define SYSINTR_TOUCH_CHANGED	(SYSINTR_FIRMWARE+2)  // 18
//------------------------------------------------------------------------------

#define IRQ_GPIO84_2_PCCARD_S0		(IRQ_PXA255_MAX + 6)   // 37
#define IRQ_GPIO84_2_PCCARD_S1		(IRQ_PXA255_MAX + 5)   // 36
#define IRQ_GPIO84_2_CDMMC			(IRQ_PXA255_MAX + 4)   // 35
#define IRQ_GPIO84_2_UCB1400		(IRQ_PXA255_MAX + 3)   // 34
#define IRQ_GPIO84_2_ETH2			(IRQ_PXA255_MAX + 2)   // 33
#define IRQ_GPIO84_2_ETH1			(IRQ_PXA255_MAX + 1)   // 32

#define IRQ_PXA255_GPIO84_2_MIN		IRQ_GPIO84_2_ETH1
#define IRQ_PXA255_GPIO84_2_MAX		IRQ_GPIO84_2_PCCARD_S0


#endif