hdefs.c

unix下调试内存泄露的工具源代码

   switch (am->tag) {
   case Pam_IR: 
      am->Pam.IR.base = lookupHRegRemap(m, am->Pam.IR.base);
      return;
   case Pam_RR:
      am->Pam.RR.base = lookupHRegRemap(m, am->Pam.RR.base);
      am->Pam.RR.index = lookupHRegRemap(m, am->Pam.RR.index);
      return;
   default:
      vpanic("mapRegs_PPC32AMode");
   }
}

/* --------- Operand, which can be a reg or a u16/s16. --------- */

PPC32RH* PPC32RH_Imm ( Bool syned, UShort imm16 ) {
   PPC32RH* op       = LibVEX_Alloc(sizeof(PPC32RH));
   op->tag           = Prh_Imm;
   op->Prh.Imm.syned = syned;
   op->Prh.Imm.imm16 = imm16;
   /* If this is a signed value, ensure it's not -32768, so that we
      are guaranteed always to be able to negate if needed. */
   if (syned)
      vassert(imm16 != 0x8000);
   vassert(syned == True || syned == False);
   return op;
}
PPC32RH* PPC32RH_Reg ( HReg reg ) {
   PPC32RH* op     = LibVEX_Alloc(sizeof(PPC32RH));
   op->tag         = Prh_Reg;
   op->Prh.Reg.reg = reg;
   return op;
}

void ppPPC32RH ( PPC32RH* op ) {
   switch (op->tag) {
   case Prh_Imm: 
      if (op->Prh.Imm.syned)
         vex_printf("%d", (Int)(Short)op->Prh.Imm.imm16);
      else
         vex_printf("%d", (UInt)(UShort)op->Prh.Imm.imm16);
      return;
   case Prh_Reg: 
      ppHRegPPC32(op->Prh.Reg.reg);
      return;
   default: 
      vpanic("ppPPC32RH");
   }
}

/* An PPC32RH can only be used in a "read" context (what would it mean
   to write or modify a literal?) and so we enumerate its registers
   accordingly. */
static void addRegUsage_PPC32RH ( HRegUsage* u, PPC32RH* op ) {
   switch (op->tag) {
   case Prh_Imm: 
      return;
   case Prh_Reg: 
      addHRegUse(u, HRmRead, op->Prh.Reg.reg);
      return;
   default: 
      vpanic("addRegUsage_PPC32RH");
   }
}

static void mapRegs_PPC32RH ( HRegRemap* m, PPC32RH* op ) {
   switch (op->tag) {
   case Prh_Imm: 
      return;
   case Prh_Reg: 
      op->Prh.Reg.reg = lookupHRegRemap(m, op->Prh.Reg.reg);
      return;
   default: 
      vpanic("mapRegs_PPC32RH");
   }
}


/* --------- Operand, which can be a reg or a u32. --------- */

PPC32RI* PPC32RI_Imm ( UInt imm32 ) {
   PPC32RI* op = LibVEX_Alloc(sizeof(PPC32RI));
   op->tag       = Pri_Imm;
   op->Pri.Imm   = imm32;
   return op;
}
PPC32RI* PPC32RI_Reg ( HReg reg ) {
   PPC32RI* op = LibVEX_Alloc(sizeof(PPC32RI));
   op->tag       = Pri_Reg;
   op->Pri.Reg   = reg;
   return op;
}

void ppPPC32RI ( PPC32RI* dst ) {
   switch (dst->tag) {
      case Pri_Imm: 
         vex_printf("0x%x", dst->Pri.Imm);
         break;
      case Pri_Reg: 
         ppHRegPPC32(dst->Pri.Reg);
         break;
      default: 
         vpanic("ppPPC32RI");
   }
}

/* An PPC32RI can only be used in a "read" context (what would it
   mean to write or modify a literal?) and so we enumerate its
   registers accordingly. */
static void addRegUsage_PPC32RI ( HRegUsage* u, PPC32RI* dst ) {
   switch (dst->tag) {
      case Pri_Imm: 
         return;
      case Pri_Reg: 
         addHRegUse(u, HRmRead, dst->Pri.Reg);
         return;
      default: 
         vpanic("addRegUsage_PPC32RI");
   }
}

static void mapRegs_PPC32RI ( HRegRemap* m, PPC32RI* dst ) {
   switch (dst->tag) {
      case Pri_Imm: 
         return;
      case Pri_Reg: 
         dst->Pri.Reg = lookupHRegRemap(m, dst->Pri.Reg);
         return;
      default: 
         vpanic("mapRegs_PPC32RI");
   }
}


/* --------- Instructions. --------- */

HChar* showPPC32UnaryOp ( PPC32UnaryOp op ) {
   switch (op) {
   case Pun_NOT: return "not";
   case Pun_NEG: return "neg";
   case Pun_CLZ: return "cntlzw";
   default: vpanic("showPPC32UnaryOp");
   }
}

HChar* showPPC32AluOp ( PPC32AluOp op, Bool immR ) {
   switch (op) {
      case Palu_ADD: return immR ? "addi"  : "add";
      case Palu_SUB: return immR ? "subi"  : "sub";
      case Palu_AND: return immR ? "andi." : "and";
      case Palu_OR:  return immR ? "ori"   : "or";
      case Palu_XOR: return immR ? "xori"  : "xor";
      case Palu_SHL: return immR ? "slwi"  : "slw";
      case Palu_SHR: return immR ? "srwi"  : "srw";
      case Palu_SAR: return immR ? "srawi" : "sraw";
      default: vpanic("showPPC32AluOp");
   }
}

HChar* showPPC32FpOp ( PPC32FpOp op ) {
   switch (op) {
      case Pfp_ADD:    return "fadd";
      case Pfp_SUB:    return "fsub";
      case Pfp_MUL:    return "fmul";
      case Pfp_DIV:    return "fdiv";
      case Pfp_SQRT:   return "fsqrt";
      case Pfp_ABS:    return "fabs";
      case Pfp_NEG:    return "fneg";
      case Pfp_MOV:    return "fmr";
      default: vpanic("showPPC32FpOp");
   }
}

HChar* showPPC32AvOp ( PPC32AvOp op ) {
   switch (op) {

   /* Unary */
   case Pav_MOV:       return "vmr";      /* Mov */
     
   case Pav_AND:       return "vand";     /* Bitwise */
   case Pav_OR:        return "vor";
   case Pav_XOR:       return "vxor";
   case Pav_NOT:       return "vnot";

   case Pav_UNPCKH8S:  return "vupkhsb";  /* Unpack */
   case Pav_UNPCKH16S: return "vupkhsh";
   case Pav_UNPCKL8S:  return "vupklsb";
   case Pav_UNPCKL16S: return "vupklsh";
   case Pav_UNPCKHPIX: return "vupkhpx";
   case Pav_UNPCKLPIX: return "vupklpx";

   /* Integer binary */
   case Pav_ADDUM:     return "vaddu_m";  // b,h,w
   case Pav_ADDUS:     return "vaddu_s";  // b,h,w
   case Pav_ADDSS:     return "vadds_s";  // b,h,w
     
   case Pav_SUBUM:     return "vsubu_m";  // b,h,w
   case Pav_SUBUS:     return "vsubu_s";  // b,h,w
   case Pav_SUBSS:     return "vsubs_s";  // b,h,w
     
   case Pav_OMULU:     return "vmulou";   // b,h
   case Pav_OMULS:     return "vmulos";   // b,h
   case Pav_EMULU:     return "vmuleu";   // b,h
   case Pav_EMULS:     return "vmules";   // b,h
  
   case Pav_AVGU:      return "vavgu";    // b,h,w
   case Pav_AVGS:      return "vavgs";    // b,h,w
     
   case Pav_MAXU:      return "vmaxu";    // b,h,w
   case Pav_MAXS:      return "vmaxs";    // b,h,w
     
   case Pav_MINU:      return "vminu";    // b,h,w
   case Pav_MINS:      return "vmins";    // b,h,w
     
   /* Compare (always affects CR field 6) */
   case Pav_CMPEQU:    return "vcmpequ";  // b,h,w
   case Pav_CMPGTU:    return "vcmpgtu";  // b,h,w
   case Pav_CMPGTS:    return "vcmpgts";  // b,h,w

   /* Shift */
   case Pav_SHL:       return "vsl";      // ' ',b,h,w
   case Pav_SHR:       return "vsr";      // ' ',b,h,w
   case Pav_SAR:       return "vsra";     // b,h,w
   case Pav_ROTL:      return "vrl";      // b,h,w

   /* Pack */
   case Pav_PACKUUM:   return "vpku_um";  // h,w
   case Pav_PACKUUS:   return "vpku_us";  // h,w
   case Pav_PACKSUS:   return "vpks_us";  // h,w
   case Pav_PACKSSS:   return "vpks_ss";  // h,w
   case Pav_PACKPXL:   return "vpkpx";

   /* Merge */
   case Pav_MRGHI:     return "vmrgh";    // b,h,w
   case Pav_MRGLO:     return "vmrgl";    // b,h,w


   /* Floating Point Binary */
   case Pav_ADDF:      return "vaddfp";
   case Pav_SUBF:      return "vsubfp";
   case Pav_MULF:      return "vmaddfp";
   case Pav_MAXF:      return "vmaxfp";
   case Pav_MINF:      return "vminfp";
   case Pav_CMPEQF:    return "vcmpeqfp";
   case Pav_CMPGTF:    return "vcmpgtfp";
   case Pav_CMPGEF:    return "vcmpgefp";
     
   default: vpanic("showPPC32AvOp");
   }
}

PPC32Instr* PPC32Instr_LI32 ( HReg dst, UInt imm32 )
{
   PPC32Instr* i     = LibVEX_Alloc(sizeof(PPC32Instr));
   i->tag            = Pin_LI32;
   i->Pin.LI32.dst   = dst;
   i->Pin.LI32.imm32 = imm32;
   return i;
}
PPC32Instr* PPC32Instr_Alu32 ( PPC32AluOp op, HReg dst, 
                               HReg srcL, PPC32RH* srcR ) {
   PPC32Instr* i     = LibVEX_Alloc(sizeof(PPC32Instr));
   i->tag            = Pin_Alu32;
   i->Pin.Alu32.op   = op;
   i->Pin.Alu32.dst  = dst;
   i->Pin.Alu32.srcL = srcL;
   i->Pin.Alu32.srcR = srcR;
   return i;
}
PPC32Instr* PPC32Instr_Cmp32 ( Bool syned, UInt crfD, 
                               HReg srcL, PPC32RH* srcR ) {
   PPC32Instr* i      = LibVEX_Alloc(sizeof(PPC32Instr));
   i->tag             = Pin_Cmp32;
   i->Pin.Cmp32.syned = syned;
   i->Pin.Cmp32.crfD  = crfD;
   i->Pin.Cmp32.srcL  = srcL;
   i->Pin.Cmp32.srcR  = srcR;
   return i;
}
PPC32Instr* PPC32Instr_Unary32  ( PPC32UnaryOp op, HReg dst, HReg src ) {
   PPC32Instr* i      = LibVEX_Alloc(sizeof(PPC32Instr));
   i->tag             = Pin_Unary32;
   i->Pin.Unary32.op  = op;
   i->Pin.Unary32.dst = dst;
   i->Pin.Unary32.src = src;
   return i;
}
PPC32Instr* PPC32Instr_MulL ( Bool syned, Bool hi32, 
                              HReg dst, HReg srcL, HReg srcR ) {
   PPC32Instr* i = LibVEX_Alloc(sizeof(PPC32Instr));
   i->tag            = Pin_MulL;
   i->Pin.MulL.syned = syned;
   i->Pin.MulL.hi32  = hi32;
   i->Pin.MulL.dst   = dst;
   i->Pin.MulL.srcL  = srcL;
   i->Pin.MulL.srcR  = srcR;
   /* if doing the low 32, the signedness is irrelevant, but tie it
      down anyway. */
   if (!hi32) vassert(!syned);
   return i;
}
PPC32Instr* PPC32Instr_Div ( Bool syned, HReg dst, HReg srcL, HReg srcR ) {
   PPC32Instr* i      = LibVEX_Alloc(sizeof(PPC32Instr));
   i->tag             = Pin_Div;
   i->Pin.Div.syned   = syned;
   i->Pin.Div.dst     = dst;
   i->Pin.Div.srcL    = srcL;
   i->Pin.Div.srcR    = srcR;
   return i;
}
PPC32Instr* PPC32Instr_Call ( PPC32CondCode cond, 
                              Addr32 target, Int regparms ) {
   PPC32Instr* i        = LibVEX_Alloc(sizeof(PPC32Instr));
   i->tag               = Pin_Call;
   i->Pin.Call.cond     = cond;
   i->Pin.Call.target   = target;
   i->Pin.Call.regparms = regparms;
   vassert(regparms >= 0 && regparms < PPC32_N_REGPARMS);
   return i;
}
PPC32Instr* PPC32Instr_Goto ( IRJumpKind jk, 
                              PPC32CondCode cond, PPC32RI* dst ) {
   PPC32Instr* i    = LibVEX_Alloc(sizeof(PPC32Instr));
   i->tag           = Pin_Goto;
   i->Pin.Goto.cond = cond;
   i->Pin.Goto.dst  = dst;
   i->Pin.Goto.jk   = jk;
   return i;
}
PPC32Instr* PPC32Instr_CMov32  ( PPC32CondCode cond, 
                                 HReg dst, PPC32RI* src ) {
   PPC32Instr* i      = LibVEX_Alloc(sizeof(PPC32Instr));
   i->tag             = Pin_CMov32;
   i->Pin.CMov32.cond = cond;
   i->Pin.CMov32.src  = src;
   i->Pin.CMov32.dst  = dst;
   vassert(cond.test != Pct_ALWAYS);
   return i;
}
PPC32Instr* PPC32Instr_Load ( UChar sz, Bool syned,
                              HReg dst, PPC32AMode* src ) {
   PPC32Instr* i     = LibVEX_Alloc(sizeof(PPC32Instr));
   i->tag            = Pin_Load;
   i->Pin.Load.sz    = sz;
   i->Pin.Load.syned = syned;
   i->Pin.Load.src   = src;
   i->Pin.Load.dst   = dst;
   vassert(sz == 1 || sz == 2 || sz == 4);
   return i;
}
PPC32Instr* PPC32Instr_Store ( UChar sz, PPC32AMode* dst, HReg src ) {
   PPC32Instr* i    = LibVEX_Alloc(sizeof(PPC32Instr));
   i->tag           = Pin_Store;
   i->Pin.Store.sz  = sz;
   i->Pin.Store.src = src;
   i->Pin.Store.dst = dst;
   vassert(sz == 1 || sz == 2 || sz == 4);
   return i;
}
PPC32Instr* PPC32Instr_Set32 ( PPC32CondCode cond, HReg dst ) {
   PPC32Instr* i     = LibVEX_Alloc(sizeof(PPC32Instr));
   i->tag            = Pin_Set32;
   i->Pin.Set32.cond = cond;
   i->Pin.Set32.dst  = dst;
   return i;
}
PPC32Instr* PPC32Instr_MfCR ( HReg dst )
{
   PPC32Instr* i     = LibVEX_Alloc(sizeof(PPC32Instr));
   i->tag            = Pin_MfCR;
   i->Pin.MfCR.dst   = dst;
   return i;
}
PPC32Instr* PPC32Instr_MFence ( void )
{
   PPC32Instr* i     = LibVEX_Alloc(sizeof(PPC32Instr));
   i->tag            = Pin_MFence;
   return i;
}

PPC32Instr* PPC32Instr_FpUnary ( PPC32FpOp op, HReg dst, HReg src ) {
   PPC32Instr* i      = LibVEX_Alloc(sizeof(PPC32Instr));
   i->tag             = Pin_FpUnary;
   i->Pin.FpUnary.op  = op;
   i->Pin.FpUnary.dst = dst;
   i->Pin.FpUnary.src = src;
   return i;
}
PPC32Instr* PPC32Instr_FpBinary ( PPC32FpOp op, HReg dst, HReg srcL, HReg srcR ) {
   PPC32Instr* i        = LibVEX_Alloc(sizeof(PPC32Instr));
   i->tag               = Pin_FpBinary;
   i->Pin.FpBinary.op   = op;
   i->Pin.FpBinary.dst  = dst;
   i->Pin.FpBinary.srcL = srcL;
   i->Pin.FpBinary.srcR = srcR;
   return i;
}