📄 hdefs.h
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/*---------------------------------------------------------------*//*--- ---*//*--- This file (host-ppc32/hdefs.h) is ---*//*--- Copyright (C) OpenWorks LLP. All rights reserved. ---*//*--- ---*//*---------------------------------------------------------------*//* This file is part of LibVEX, a library for dynamic binary instrumentation and translation. Copyright (C) 2004-2005 OpenWorks LLP. All rights reserved. This library is made available under a dual licensing scheme. If you link LibVEX against other code all of which is itself licensed under the GNU General Public License, version 2 dated June 1991 ("GPL v2"), then you may use LibVEX under the terms of the GPL v2, as appearing in the file LICENSE.GPL. If the file LICENSE.GPL is missing, you can obtain a copy of the GPL v2 from the Free Software Foundation Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. For any other uses of LibVEX, you must first obtain a commercial license from OpenWorks LLP. Please contact info@open-works.co.uk for information about commercial licensing. This software is provided by OpenWorks LLP "as is" and any express or implied warranties, including, but not limited to, the implied warranties of merchantability and fitness for a particular purpose are disclaimed. In no event shall OpenWorks LLP be liable for any direct, indirect, incidental, special, exemplary, or consequential damages (including, but not limited to, procurement of substitute goods or services; loss of use, data, or profits; or business interruption) however caused and on any theory of liability, whether in contract, strict liability, or tort (including negligence or otherwise) arising in any way out of the use of this software, even if advised of the possibility of such damage. Neither the names of the U.S. Department of Energy nor the University of California nor the names of its contributors may be used to endorse or promote products derived from this software without prior written permission.*/#ifndef __LIBVEX_HOST_PPC32_HDEFS_H#define __LIBVEX_HOST_PPC32_HDEFS_H/* Num registers used for function calls */#define PPC32_N_REGPARMS 8/* --------- Registers. --------- *//* The usual HReg abstraction. There are 32 real int regs, 32 real float regs, and 0 real vector regs. */extern void ppHRegPPC32 ( HReg );extern HReg hregPPC32_GPR0 ( void ); // scratch reg / zero regextern HReg hregPPC32_GPR1 ( void ); // Stack Frame Pointerextern HReg hregPPC32_GPR2 ( void ); // TOC pointer - not usedextern HReg hregPPC32_GPR3 ( void );extern HReg hregPPC32_GPR4 ( void );extern HReg hregPPC32_GPR5 ( void );extern HReg hregPPC32_GPR6 ( void );extern HReg hregPPC32_GPR7 ( void );extern HReg hregPPC32_GPR8 ( void );extern HReg hregPPC32_GPR9 ( void );extern HReg hregPPC32_GPR10 ( void );extern HReg hregPPC32_GPR11 ( void );extern HReg hregPPC32_GPR12 ( void );extern HReg hregPPC32_GPR13 ( void ); // thread specific pointer - not usedextern HReg hregPPC32_GPR14 ( void );extern HReg hregPPC32_GPR15 ( void );extern HReg hregPPC32_GPR16 ( void );extern HReg hregPPC32_GPR17 ( void );extern HReg hregPPC32_GPR18 ( void );extern HReg hregPPC32_GPR19 ( void );extern HReg hregPPC32_GPR20 ( void );extern HReg hregPPC32_GPR21 ( void );extern HReg hregPPC32_GPR22 ( void );extern HReg hregPPC32_GPR23 ( void );extern HReg hregPPC32_GPR24 ( void );extern HReg hregPPC32_GPR25 ( void );extern HReg hregPPC32_GPR26 ( void );extern HReg hregPPC32_GPR27 ( void );extern HReg hregPPC32_GPR28 ( void );extern HReg hregPPC32_GPR29 ( void );extern HReg hregPPC32_GPR30 ( void );extern HReg hregPPC32_GPR31 ( void ); // GuestStatePtrextern HReg hregPPC32_FPR0 ( void );extern HReg hregPPC32_FPR1 ( void );extern HReg hregPPC32_FPR2 ( void );extern HReg hregPPC32_FPR3 ( void );extern HReg hregPPC32_FPR4 ( void );extern HReg hregPPC32_FPR5 ( void );extern HReg hregPPC32_FPR6 ( void );extern HReg hregPPC32_FPR7 ( void );extern HReg hregPPC32_FPR8 ( void );extern HReg hregPPC32_FPR9 ( void );extern HReg hregPPC32_FPR10 ( void );extern HReg hregPPC32_FPR11 ( void );extern HReg hregPPC32_FPR12 ( void );extern HReg hregPPC32_FPR13 ( void );extern HReg hregPPC32_FPR14 ( void );extern HReg hregPPC32_FPR15 ( void );extern HReg hregPPC32_FPR16 ( void );extern HReg hregPPC32_FPR17 ( void );extern HReg hregPPC32_FPR18 ( void );extern HReg hregPPC32_FPR19 ( void );extern HReg hregPPC32_FPR20 ( void );extern HReg hregPPC32_FPR21 ( void );extern HReg hregPPC32_FPR22 ( void );extern HReg hregPPC32_FPR23 ( void );extern HReg hregPPC32_FPR24 ( void );extern HReg hregPPC32_FPR25 ( void );extern HReg hregPPC32_FPR26 ( void );extern HReg hregPPC32_FPR27 ( void );extern HReg hregPPC32_FPR28 ( void );extern HReg hregPPC32_FPR29 ( void );extern HReg hregPPC32_FPR30 ( void );extern HReg hregPPC32_FPR31 ( void );extern HReg hregPPC32_VR0 ( void );extern HReg hregPPC32_VR1 ( void );extern HReg hregPPC32_VR2 ( void );extern HReg hregPPC32_VR3 ( void );extern HReg hregPPC32_VR4 ( void );extern HReg hregPPC32_VR5 ( void );extern HReg hregPPC32_VR6 ( void );extern HReg hregPPC32_VR7 ( void );extern HReg hregPPC32_VR8 ( void );extern HReg hregPPC32_VR9 ( void );extern HReg hregPPC32_VR10 ( void );extern HReg hregPPC32_VR11 ( void );extern HReg hregPPC32_VR12 ( void );extern HReg hregPPC32_VR13 ( void );extern HReg hregPPC32_VR14 ( void );extern HReg hregPPC32_VR15 ( void );extern HReg hregPPC32_VR16 ( void );extern HReg hregPPC32_VR17 ( void );extern HReg hregPPC32_VR18 ( void );extern HReg hregPPC32_VR19 ( void );extern HReg hregPPC32_VR20 ( void );extern HReg hregPPC32_VR21 ( void );extern HReg hregPPC32_VR22 ( void );extern HReg hregPPC32_VR23 ( void );extern HReg hregPPC32_VR24 ( void );extern HReg hregPPC32_VR25 ( void );extern HReg hregPPC32_VR26 ( void );extern HReg hregPPC32_VR27 ( void );extern HReg hregPPC32_VR28 ( void );extern HReg hregPPC32_VR29 ( void );extern HReg hregPPC32_VR30 ( void );extern HReg hregPPC32_VR31 ( void );#define StackFramePtr hregPPC32_GPR1()#define GuestStatePtr hregPPC32_GPR31()/* --------- Condition codes --------- *//* This gives names from bitfields in CR; hence it names BI numbers *//* Using IBM/hardware indexing convention */typedef enum { // CR7, which we use for integer compares Pcf_7LT = 28, /* neg | lt */ Pcf_7GT = 29, /* pos | gt */ Pcf_7EQ = 30, /* zero | equal */ Pcf_7SO = 31 /* summary overflow */ } PPC32CondFlag;typedef enum { /* Maps bc bitfield BO */ Pct_FALSE = 0x4, Pct_TRUE = 0xC, Pct_ALWAYS = 0x14 } PPC32CondTest;typedef struct { PPC32CondFlag flag; PPC32CondTest test; } PPC32CondCode;extern HChar* showPPC32CondCode ( PPC32CondCode );/* constructor */extern PPC32CondCode mk_PPCCondCode ( PPC32CondTest, PPC32CondFlag );/* false->true, true->false */extern PPC32CondTest invertCondTest ( PPC32CondTest );/* --------- Memory address expressions (amodes). --------- */typedef enum { Pam_IR, /* Immediate (signed 16-bit) + Reg */ Pam_RR /* Reg1 + Reg2 */ } PPC32AModeTag;typedef struct { PPC32AModeTag tag; union { struct { HReg base; Int index; } IR; struct { HReg base; HReg index; } RR; } Pam; } PPC32AMode;extern PPC32AMode* PPC32AMode_IR ( Int, HReg );extern PPC32AMode* PPC32AMode_RR ( HReg, HReg );extern PPC32AMode* dopyPPC32AMode ( PPC32AMode* );extern void ppPPC32AMode ( PPC32AMode* );/* --------- Operand, which can be a reg or a u16/s16. --------- *//* ("RH" == "Register or Halfword immediate") */typedef enum { Prh_Imm=1, Prh_Reg=2 } PPC32RHTag;typedef struct { PPC32RHTag tag; union { struct { Bool syned; UShort imm16; } Imm; struct { HReg reg; } Reg; } Prh; } PPC32RH;extern PPC32RH* PPC32RH_Imm ( Bool, UShort );extern PPC32RH* PPC32RH_Reg ( HReg );extern void ppPPC32RH ( PPC32RH* );/* --------- Operand, which can be a reg or a u32. --------- */typedef enum { Pri_Imm=3, Pri_Reg=4 } PPC32RITag;typedef struct { PPC32RITag tag; union { UInt Imm; HReg Reg; } Pri; } PPC32RI;extern PPC32RI* PPC32RI_Imm ( UInt );extern PPC32RI* PPC32RI_Reg ( HReg );extern void ppPPC32RI ( PPC32RI* );/* --------- Instructions. --------- *//* --------- */typedef enum { Pun_NEG, Pun_NOT, Pun_CLZ } PPC32UnaryOp;extern HChar* showPPC32UnaryOp ( PPC32UnaryOp );/* --------- */typedef enum { Palu_INVALID, Palu_ADD, Palu_SUB, Palu_AND, Palu_OR, Palu_XOR, Palu_SHL, Palu_SHR, Palu_SAR, } PPC32AluOp;extern HChar* showPPC32AluOp ( PPC32AluOp, Bool /* is the 2nd operand an immediate? */ );/* --------- */typedef enum { Pfp_INVALID, /* Binary */ Pfp_ADD, Pfp_SUB, Pfp_MUL, Pfp_DIV, /* Unary */ Pfp_SQRT, Pfp_ABS, Pfp_NEG, Pfp_MOV } PPC32FpOp;extern HChar* showPPC32FpOp ( PPC32FpOp );/* --------- */typedef enum { Pav_INVALID, /* Integer Unary */ Pav_MOV, /* Mov */ Pav_NOT, /* Bitwise */ Pav_UNPCKH8S, Pav_UNPCKH16S, /* Unpack */ Pav_UNPCKL8S, Pav_UNPCKL16S, Pav_UNPCKHPIX, Pav_UNPCKLPIX, /* Integer Binary */ Pav_AND, Pav_OR, Pav_XOR, /* Bitwise */ Pav_ADDUM, Pav_ADDUS,Pav_ADDSS, Pav_SUBUM, Pav_SUBUS, Pav_SUBSS, Pav_OMULU, Pav_OMULS, Pav_EMULU, Pav_EMULS, Pav_AVGU, Pav_AVGS, Pav_MAXU, Pav_MAXS, Pav_MINU, Pav_MINS, /* Compare (always affects CR field 6) */ Pav_CMPEQU, Pav_CMPGTU, Pav_CMPGTS, /* Shift */ Pav_SHL, Pav_SHR, Pav_SAR, Pav_ROTL, /* Pack */
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